Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / arch / x86 / kernel / apic / x2apic_cluster.c
1 #include <linux/threads.h>
2 #include <linux/cpumask.h>
3 #include <linux/string.h>
4 #include <linux/kernel.h>
5 #include <linux/ctype.h>
6 #include <linux/dmar.h>
7 #include <linux/cpu.h>
8
9 #include <asm/smp.h>
10 #include <asm/x2apic.h>
11
12 static DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid);
13 static DEFINE_PER_CPU(cpumask_var_t, cpus_in_cluster);
14 static DEFINE_PER_CPU(cpumask_var_t, ipi_mask);
15
16 static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
17 {
18         return x2apic_enabled();
19 }
20
21 static inline u32 x2apic_cluster(int cpu)
22 {
23         return per_cpu(x86_cpu_to_logical_apicid, cpu) >> 16;
24 }
25
26 static void
27 __x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
28 {
29         struct cpumask *cpus_in_cluster_ptr;
30         struct cpumask *ipi_mask_ptr;
31         unsigned int cpu, this_cpu;
32         unsigned long flags;
33         u32 dest;
34
35         x2apic_wrmsr_fence();
36
37         local_irq_save(flags);
38
39         this_cpu = smp_processor_id();
40
41         /*
42          * We are to modify mask, so we need an own copy
43          * and be sure it's manipulated with irq off.
44          */
45         ipi_mask_ptr = this_cpu_cpumask_var_ptr(ipi_mask);
46         cpumask_copy(ipi_mask_ptr, mask);
47
48         /*
49          * The idea is to send one IPI per cluster.
50          */
51         for_each_cpu(cpu, ipi_mask_ptr) {
52                 unsigned long i;
53
54                 cpus_in_cluster_ptr = per_cpu(cpus_in_cluster, cpu);
55                 dest = 0;
56
57                 /* Collect cpus in cluster. */
58                 for_each_cpu_and(i, ipi_mask_ptr, cpus_in_cluster_ptr) {
59                         if (apic_dest == APIC_DEST_ALLINC || i != this_cpu)
60                                 dest |= per_cpu(x86_cpu_to_logical_apicid, i);
61                 }
62
63                 if (!dest)
64                         continue;
65
66                 __x2apic_send_IPI_dest(dest, vector, apic->dest_logical);
67                 /*
68                  * Cluster sibling cpus should be discared now so
69                  * we would not send IPI them second time.
70                  */
71                 cpumask_andnot(ipi_mask_ptr, ipi_mask_ptr, cpus_in_cluster_ptr);
72         }
73
74         local_irq_restore(flags);
75 }
76
77 static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
78 {
79         __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
80 }
81
82 static void
83 x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
84 {
85         __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
86 }
87
88 static void x2apic_send_IPI_allbutself(int vector)
89 {
90         __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT);
91 }
92
93 static void x2apic_send_IPI_all(int vector)
94 {
95         __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);
96 }
97
98 static int
99 x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
100                               const struct cpumask *andmask,
101                               unsigned int *apicid)
102 {
103         u32 dest = 0;
104         u16 cluster;
105         int i;
106
107         for_each_cpu_and(i, cpumask, andmask) {
108                 if (!cpumask_test_cpu(i, cpu_online_mask))
109                         continue;
110                 dest = per_cpu(x86_cpu_to_logical_apicid, i);
111                 cluster = x2apic_cluster(i);
112                 break;
113         }
114
115         if (!dest)
116                 return -EINVAL;
117
118         for_each_cpu_and(i, cpumask, andmask) {
119                 if (!cpumask_test_cpu(i, cpu_online_mask))
120                         continue;
121                 if (cluster != x2apic_cluster(i))
122                         continue;
123                 dest |= per_cpu(x86_cpu_to_logical_apicid, i);
124         }
125
126         *apicid = dest;
127
128         return 0;
129 }
130
131 static void init_x2apic_ldr(void)
132 {
133         unsigned int this_cpu = smp_processor_id();
134         unsigned int cpu;
135
136         per_cpu(x86_cpu_to_logical_apicid, this_cpu) = apic_read(APIC_LDR);
137
138         cpumask_set_cpu(this_cpu, per_cpu(cpus_in_cluster, this_cpu));
139         for_each_online_cpu(cpu) {
140                 if (x2apic_cluster(this_cpu) != x2apic_cluster(cpu))
141                         continue;
142                 cpumask_set_cpu(this_cpu, per_cpu(cpus_in_cluster, cpu));
143                 cpumask_set_cpu(cpu, per_cpu(cpus_in_cluster, this_cpu));
144         }
145 }
146
147  /*
148   * At CPU state changes, update the x2apic cluster sibling info.
149   */
150 static int
151 update_clusterinfo(struct notifier_block *nfb, unsigned long action, void *hcpu)
152 {
153         unsigned int this_cpu = (unsigned long)hcpu;
154         unsigned int cpu;
155         int err = 0;
156
157         switch (action) {
158         case CPU_UP_PREPARE:
159                 if (!zalloc_cpumask_var(&per_cpu(cpus_in_cluster, this_cpu),
160                                         GFP_KERNEL)) {
161                         err = -ENOMEM;
162                 } else if (!zalloc_cpumask_var(&per_cpu(ipi_mask, this_cpu),
163                                                GFP_KERNEL)) {
164                         free_cpumask_var(per_cpu(cpus_in_cluster, this_cpu));
165                         err = -ENOMEM;
166                 }
167                 break;
168         case CPU_UP_CANCELED:
169         case CPU_UP_CANCELED_FROZEN:
170         case CPU_DEAD:
171                 for_each_online_cpu(cpu) {
172                         if (x2apic_cluster(this_cpu) != x2apic_cluster(cpu))
173                                 continue;
174                         cpumask_clear_cpu(this_cpu, per_cpu(cpus_in_cluster, cpu));
175                         cpumask_clear_cpu(cpu, per_cpu(cpus_in_cluster, this_cpu));
176                 }
177                 free_cpumask_var(per_cpu(cpus_in_cluster, this_cpu));
178                 free_cpumask_var(per_cpu(ipi_mask, this_cpu));
179                 break;
180         }
181
182         return notifier_from_errno(err);
183 }
184
185 static struct notifier_block __refdata x2apic_cpu_notifier = {
186         .notifier_call = update_clusterinfo,
187 };
188
189 static int x2apic_init_cpu_notifier(void)
190 {
191         int cpu = smp_processor_id();
192
193         zalloc_cpumask_var(&per_cpu(cpus_in_cluster, cpu), GFP_KERNEL);
194         zalloc_cpumask_var(&per_cpu(ipi_mask, cpu), GFP_KERNEL);
195
196         BUG_ON(!per_cpu(cpus_in_cluster, cpu) || !per_cpu(ipi_mask, cpu));
197
198         cpumask_set_cpu(cpu, per_cpu(cpus_in_cluster, cpu));
199         register_hotcpu_notifier(&x2apic_cpu_notifier);
200         return 1;
201 }
202
203 static int x2apic_cluster_probe(void)
204 {
205         if (x2apic_mode)
206                 return x2apic_init_cpu_notifier();
207         else
208                 return 0;
209 }
210
211 static const struct cpumask *x2apic_cluster_target_cpus(void)
212 {
213         return cpu_all_mask;
214 }
215
216 /*
217  * Each x2apic cluster is an allocation domain.
218  */
219 static void cluster_vector_allocation_domain(int cpu, struct cpumask *retmask,
220                                              const struct cpumask *mask)
221 {
222         /*
223          * To minimize vector pressure, default case of boot, device bringup
224          * etc will use a single cpu for the interrupt destination.
225          *
226          * On explicit migration requests coming from irqbalance etc,
227          * interrupts will be routed to the x2apic cluster (cluster-id
228          * derived from the first cpu in the mask) members specified
229          * in the mask.
230          */
231         if (mask == x2apic_cluster_target_cpus())
232                 cpumask_copy(retmask, cpumask_of(cpu));
233         else
234                 cpumask_and(retmask, mask, per_cpu(cpus_in_cluster, cpu));
235 }
236
237 static struct apic apic_x2apic_cluster = {
238
239         .name                           = "cluster x2apic",
240         .probe                          = x2apic_cluster_probe,
241         .acpi_madt_oem_check            = x2apic_acpi_madt_oem_check,
242         .apic_id_valid                  = x2apic_apic_id_valid,
243         .apic_id_registered             = x2apic_apic_id_registered,
244
245         .irq_delivery_mode              = dest_LowestPrio,
246         .irq_dest_mode                  = 1, /* logical */
247
248         .target_cpus                    = x2apic_cluster_target_cpus,
249         .disable_esr                    = 0,
250         .dest_logical                   = APIC_DEST_LOGICAL,
251         .check_apicid_used              = NULL,
252
253         .vector_allocation_domain       = cluster_vector_allocation_domain,
254         .init_apic_ldr                  = init_x2apic_ldr,
255
256         .ioapic_phys_id_map             = NULL,
257         .setup_apic_routing             = NULL,
258         .cpu_present_to_apicid          = default_cpu_present_to_apicid,
259         .apicid_to_cpu_present          = NULL,
260         .check_phys_apicid_present      = default_check_phys_apicid_present,
261         .phys_pkg_id                    = x2apic_phys_pkg_id,
262
263         .get_apic_id                    = x2apic_get_apic_id,
264         .set_apic_id                    = x2apic_set_apic_id,
265         .apic_id_mask                   = 0xFFFFFFFFu,
266
267         .cpu_mask_to_apicid_and         = x2apic_cpu_mask_to_apicid_and,
268
269         .send_IPI_mask                  = x2apic_send_IPI_mask,
270         .send_IPI_mask_allbutself       = x2apic_send_IPI_mask_allbutself,
271         .send_IPI_allbutself            = x2apic_send_IPI_allbutself,
272         .send_IPI_all                   = x2apic_send_IPI_all,
273         .send_IPI_self                  = x2apic_send_IPI_self,
274
275         .wait_for_init_deassert         = false,
276         .inquire_remote_apic            = NULL,
277
278         .read                           = native_apic_msr_read,
279         .write                          = native_apic_msr_write,
280         .eoi_write                      = native_apic_msr_eoi_write,
281         .icr_read                       = native_x2apic_icr_read,
282         .icr_write                      = native_x2apic_icr_write,
283         .wait_icr_idle                  = native_x2apic_wait_icr_idle,
284         .safe_wait_icr_idle             = native_safe_x2apic_wait_icr_idle,
285 };
286
287 apic_driver(apic_x2apic_cluster);