5 * KVM x86 specific structures and definitions
9 #include <linux/types.h>
10 #include <linux/ioctl.h>
31 /* Select x86 specific features in <linux/kvm.h> */
32 #define __KVM_HAVE_PIT
33 #define __KVM_HAVE_IOAPIC
34 #define __KVM_HAVE_IRQ_LINE
35 #define __KVM_HAVE_MSI
36 #define __KVM_HAVE_USER_NMI
37 #define __KVM_HAVE_GUEST_DEBUG
38 #define __KVM_HAVE_MSIX
39 #define __KVM_HAVE_MCE
40 #define __KVM_HAVE_PIT_STATE2
41 #define __KVM_HAVE_XEN_HVM
42 #define __KVM_HAVE_VCPU_EVENTS
43 #define __KVM_HAVE_DEBUGREGS
44 #define __KVM_HAVE_XSAVE
45 #define __KVM_HAVE_XCRS
46 #define __KVM_HAVE_READONLY_MEM
48 /* Architectural interrupt line count. */
49 #define KVM_NR_INTERRUPTS 256
51 struct kvm_memory_alias {
52 __u32 slot; /* this has a different namespace than memory slots */
54 __u64 guest_phys_addr;
56 __u64 target_phys_addr;
59 /* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
60 struct kvm_pic_state {
61 __u8 last_irr; /* edge detection */
62 __u8 irr; /* interrupt request register */
63 __u8 imr; /* interrupt mask register */
64 __u8 isr; /* interrupt service register */
65 __u8 priority_add; /* highest irq priority */
72 __u8 rotate_on_auto_eoi;
73 __u8 special_fully_nested_mode;
74 __u8 init4; /* true if 4 byte init */
75 __u8 elcr; /* PIIX edge/trigger selection */
79 #define KVM_IOAPIC_NUM_PINS 24
80 struct kvm_ioapic_state {
92 __u8 delivery_status:1;
101 } redirtbl[KVM_IOAPIC_NUM_PINS];
104 #define KVM_IRQCHIP_PIC_MASTER 0
105 #define KVM_IRQCHIP_PIC_SLAVE 1
106 #define KVM_IRQCHIP_IOAPIC 2
107 #define KVM_NR_IRQCHIPS 3
109 /* for KVM_GET_REGS and KVM_SET_REGS */
111 /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
112 __u64 rax, rbx, rcx, rdx;
113 __u64 rsi, rdi, rsp, rbp;
114 __u64 r8, r9, r10, r11;
115 __u64 r12, r13, r14, r15;
119 /* for KVM_GET_LAPIC and KVM_SET_LAPIC */
120 #define KVM_APIC_REG_SIZE 0x400
121 struct kvm_lapic_state {
122 char regs[KVM_APIC_REG_SIZE];
130 __u8 present, dpl, db, s, l, g, avl;
142 /* for KVM_GET_SREGS and KVM_SET_SREGS */
144 /* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
145 struct kvm_segment cs, ds, es, fs, gs, ss;
146 struct kvm_segment tr, ldt;
147 struct kvm_dtable gdt, idt;
148 __u64 cr0, cr2, cr3, cr4, cr8;
151 __u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
154 /* for KVM_GET_FPU and KVM_SET_FPU */
159 __u8 ftwx; /* in fxsave format */
169 struct kvm_msr_entry {
175 /* for KVM_GET_MSRS and KVM_SET_MSRS */
177 __u32 nmsrs; /* number of msrs in entries */
180 struct kvm_msr_entry entries[0];
183 /* for KVM_GET_MSR_INDEX_LIST */
184 struct kvm_msr_list {
185 __u32 nmsrs; /* number of msrs in entries */
190 struct kvm_cpuid_entry {
199 /* for KVM_SET_CPUID */
203 struct kvm_cpuid_entry entries[0];
206 struct kvm_cpuid_entry2 {
217 #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX BIT(0)
218 #define KVM_CPUID_FLAG_STATEFUL_FUNC BIT(1)
219 #define KVM_CPUID_FLAG_STATE_READ_NEXT BIT(2)
221 /* for KVM_SET_CPUID2 */
225 struct kvm_cpuid_entry2 entries[0];
228 /* for KVM_GET_PIT and KVM_SET_PIT */
229 struct kvm_pit_channel_state {
230 __u32 count; /* can be 65536 */
242 __s64 count_load_time;
245 struct kvm_debug_exit_arch {
253 #define KVM_GUESTDBG_USE_SW_BP 0x00010000
254 #define KVM_GUESTDBG_USE_HW_BP 0x00020000
255 #define KVM_GUESTDBG_INJECT_DB 0x00040000
256 #define KVM_GUESTDBG_INJECT_BP 0x00080000
258 /* for KVM_SET_GUEST_DEBUG */
259 struct kvm_guest_debug_arch {
263 struct kvm_pit_state {
264 struct kvm_pit_channel_state channels[3];
267 #define KVM_PIT_FLAGS_HPET_LEGACY 0x00000001
269 struct kvm_pit_state2 {
270 struct kvm_pit_channel_state channels[3];
275 struct kvm_reinject_control {
280 /* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */
281 #define KVM_VCPUEVENT_VALID_NMI_PENDING 0x00000001
282 #define KVM_VCPUEVENT_VALID_SIPI_VECTOR 0x00000002
283 #define KVM_VCPUEVENT_VALID_SHADOW 0x00000004
285 /* Interrupt shadow states */
286 #define KVM_X86_SHADOW_INT_MOV_SS 0x01
287 #define KVM_X86_SHADOW_INT_STI 0x02
289 /* for KVM_GET/SET_VCPU_EVENTS */
290 struct kvm_vcpu_events {
315 /* for KVM_GET/SET_DEBUGREGS */
316 struct kvm_debugregs {
324 /* for KVM_CAP_XSAVE */
329 #define KVM_MAX_XCRS 16
340 struct kvm_xcr xcrs[KVM_MAX_XCRS];
344 /* definition of registers in kvm_run */
345 struct kvm_sync_regs {
348 #endif /* _ASM_X86_KVM_H */