kernel/arch/x86/include/asm/paravirt.h

   1 #ifndef _ASM_X86_PARAVIRT_H
   2 #define _ASM_X86_PARAVIRT_H
   3 /* Various instructions on x86 need to be replaced for
   4  * para-virtualization: those hooks are defined here. */
   5
   6 #ifdef CONFIG_PARAVIRT
   7 #include <asm/pgtable_types.h>
   8 #include <asm/asm.h>
   9
  10 #include <asm/paravirt_types.h>
  11
  12 #ifndef __ASSEMBLY__
  13 #include <linux/bug.h>
  14 #include <linux/types.h>
  15 #include <linux/cpumask.h>
  16
  17 static inline int paravirt_enabled(void)
  18 {
  19         return pv_info.paravirt_enabled;
  20 }
  21
  22 static inline int paravirt_has_feature(unsigned int feature)
  23 {
  24         WARN_ON_ONCE(!pv_info.paravirt_enabled);
  25         return (pv_info.features & feature);
  26 }
  27
  28 static inline void load_sp0(struct tss_struct *tss,
  29                              struct thread_struct *thread)
  30 {
  31         PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
  32 }
  33
  34 /* The paravirtualized CPUID instruction. */
  35 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
  36                            unsigned int *ecx, unsigned int *edx)
  37 {
  38         PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
  39 }
  40
  41 /*
  42  * These special macros can be used to get or set a debugging register
  43  */
  44 static inline unsigned long paravirt_get_debugreg(int reg)
  45 {
  46         return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
  47 }
  48 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
  49 static inline void set_debugreg(unsigned long val, int reg)
  50 {
  51         PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
  52 }
  53
  54 static inline void clts(void)
  55 {
  56         PVOP_VCALL0(pv_cpu_ops.clts);
  57 }
  58
  59 static inline unsigned long read_cr0(void)
  60 {
  61         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
  62 }
  63
  64 static inline void write_cr0(unsigned long x)
  65 {
  66         PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
  67 }
  68
  69 static inline unsigned long read_cr2(void)
  70 {
  71         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
  72 }
  73
  74 static inline void write_cr2(unsigned long x)
  75 {
  76         PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
  77 }
  78
  79 static inline unsigned long read_cr3(void)
  80 {
  81         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
  82 }
  83
  84 static inline void write_cr3(unsigned long x)
  85 {
  86         PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
  87 }
  88
  89 static inline unsigned long __read_cr4(void)
  90 {
  91         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
  92 }
  93 static inline unsigned long __read_cr4_safe(void)
  94 {
  95         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
  96 }
  97
  98 static inline void __write_cr4(unsigned long x)
  99 {
 100         PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
 101 }
 102
 103 #ifdef CONFIG_X86_64
 104 static inline unsigned long read_cr8(void)
 105 {
 106         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
 107 }
 108
 109 static inline void write_cr8(unsigned long x)
 110 {
 111         PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
 112 }
 113 #endif
 114
 115 static inline void arch_safe_halt(void)
 116 {
 117         PVOP_VCALL0(pv_irq_ops.safe_halt);
 118 }
 119
 120 static inline void halt(void)
 121 {
 122         PVOP_VCALL0(pv_irq_ops.halt);
 123 }
 124
 125 static inline void wbinvd(void)
 126 {
 127         PVOP_VCALL0(pv_cpu_ops.wbinvd);
 128 }
 129
 130 #define get_kernel_rpl()  (pv_info.kernel_rpl)
 131
 132 static inline u64 paravirt_read_msr(unsigned msr, int *err)
 133 {
 134         return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
 135 }
 136
 137 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
 138 {
 139         return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
 140 }
 141
 142 /* These should all do BUG_ON(_err), but our headers are too tangled. */
 143 #define rdmsr(msr, val1, val2)                  \
 144 do {                                            \
 145         int _err;                               \
 146         u64 _l = paravirt_read_msr(msr, &_err); \
 147         val1 = (u32)_l;                         \
 148         val2 = _l >> 32;                        \
 149 } while (0)
 150
 151 #define wrmsr(msr, val1, val2)                  \
 152 do {                                            \
 153         paravirt_write_msr(msr, val1, val2);    \
 154 } while (0)
 155
 156 #define rdmsrl(msr, val)                        \
 157 do {                                            \
 158         int _err;                               \
 159         val = paravirt_read_msr(msr, &_err);    \
 160 } while (0)
 161
 162 static inline void wrmsrl(unsigned msr, u64 val)
 163 {
 164         wrmsr(msr, (u32)val, (u32)(val>>32));
 165 }
 166
 167 #define wrmsr_safe(msr, a, b)   paravirt_write_msr(msr, a, b)
 168
 169 /* rdmsr with exception handling */
 170 #define rdmsr_safe(msr, a, b)                   \
 171 ({                                              \
 172         int _err;                               \
 173         u64 _l = paravirt_read_msr(msr, &_err); \
 174         (*a) = (u32)_l;                         \
 175         (*b) = _l >> 32;                        \
 176         _err;                                   \
 177 })
 178
 179 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
 180 {
 181         int err;
 182
 183         *p = paravirt_read_msr(msr, &err);
 184         return err;
 185 }
 186
 187 static inline unsigned long long paravirt_sched_clock(void)
 188 {
 189         return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
 190 }
 191
 192 struct static_key;
 193 extern struct static_key paravirt_steal_enabled;
 194 extern struct static_key paravirt_steal_rq_enabled;
 195
 196 static inline u64 paravirt_steal_clock(int cpu)
 197 {
 198         return PVOP_CALL1(u64, pv_time_ops.steal_clock, cpu);
 199 }
 200
 201 static inline unsigned long long paravirt_read_pmc(int counter)
 202 {
 203         return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
 204 }
 205
 206 #define rdpmc(counter, low, high)               \
 207 do {                                            \
 208         u64 _l = paravirt_read_pmc(counter);    \
 209         low = (u32)_l;                          \
 210         high = _l >> 32;                        \
 211 } while (0)
 212
 213 #define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
 214
 215 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
 216 {
 217         PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
 218 }
 219
 220 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
 221 {
 222         PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
 223 }
 224
 225 static inline void load_TR_desc(void)
 226 {
 227         PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
 228 }
 229 static inline void load_gdt(const struct desc_ptr *dtr)
 230 {
 231         PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
 232 }
 233 static inline void load_idt(const struct desc_ptr *dtr)
 234 {
 235         PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
 236 }
 237 static inline void set_ldt(const void *addr, unsigned entries)
 238 {
 239         PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
 240 }
 241 static inline void store_idt(struct desc_ptr *dtr)
 242 {
 243         PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
 244 }
 245 static inline unsigned long paravirt_store_tr(void)
 246 {
 247         return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
 248 }
 249 #define store_tr(tr)    ((tr) = paravirt_store_tr())
 250 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
 251 {
 252         PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
 253 }
 254
 255 #ifdef CONFIG_X86_64
 256 static inline void load_gs_index(unsigned int gs)
 257 {
 258         PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
 259 }
 260 #endif
 261
 262 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
 263                                    const void *desc)
 264 {
 265         PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
 266 }
 267
 268 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
 269                                    void *desc, int type)
 270 {
 271         PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
 272 }
 273
 274 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
 275 {
 276         PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
 277 }
 278 static inline void set_iopl_mask(unsigned mask)
 279 {
 280         PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
 281 }
 282
 283 /* The paravirtualized I/O functions */
 284 static inline void slow_down_io(void)
 285 {
 286         pv_cpu_ops.io_delay();
 287 #ifdef REALLY_SLOW_IO
 288         pv_cpu_ops.io_delay();
 289         pv_cpu_ops.io_delay();
 290         pv_cpu_ops.io_delay();
 291 #endif
 292 }
 293
 294 #ifdef CONFIG_SMP
 295 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
 296                                     unsigned long start_esp)
 297 {
 298         PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
 299                     phys_apicid, start_eip, start_esp);
 300 }
 301 #endif
 302
 303 static inline void paravirt_activate_mm(struct mm_struct *prev,
 304                                         struct mm_struct *next)
 305 {
 306         PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
 307 }
 308
 309 static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
 310                                           struct mm_struct *mm)
 311 {
 312         PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
 313 }
 314
 315 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
 316 {
 317         PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
 318 }
 319
 320 static inline void __flush_tlb(void)
 321 {
 322         PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
 323 }
 324 static inline void __flush_tlb_global(void)
 325 {
 326         PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
 327 }
 328 static inline void __flush_tlb_single(unsigned long addr)
 329 {
 330         PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
 331 }
 332
 333 static inline void flush_tlb_others(const struct cpumask *cpumask,
 334                                     struct mm_struct *mm,
 335                                     unsigned long start,
 336                                     unsigned long end)
 337 {
 338         PVOP_VCALL4(pv_mmu_ops.flush_tlb_others, cpumask, mm, start, end);
 339 }
 340
 341 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
 342 {
 343         return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
 344 }
 345
 346 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
 347 {
 348         PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
 349 }
 350
 351 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
 352 {
 353         PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
 354 }
 355 static inline void paravirt_release_pte(unsigned long pfn)
 356 {
 357         PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
 358 }
 359
 360 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
 361 {
 362         PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
 363 }
 364
 365 static inline void paravirt_release_pmd(unsigned long pfn)
 366 {
 367         PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
 368 }
 369
 370 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
 371 {
 372         PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
 373 }
 374 static inline void paravirt_release_pud(unsigned long pfn)
 375 {
 376         PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
 377 }
 378
 379 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
 380                               pte_t *ptep)
 381 {
 382         PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
 383 }
 384 static inline void pmd_update(struct mm_struct *mm, unsigned long addr,
 385                               pmd_t *pmdp)
 386 {
 387         PVOP_VCALL3(pv_mmu_ops.pmd_update, mm, addr, pmdp);
 388 }
 389
 390 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
 391                                     pte_t *ptep)
 392 {
 393         PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
 394 }
 395
 396 static inline void pmd_update_defer(struct mm_struct *mm, unsigned long addr,
 397                                     pmd_t *pmdp)
 398 {
 399         PVOP_VCALL3(pv_mmu_ops.pmd_update_defer, mm, addr, pmdp);
 400 }
 401
 402 static inline pte_t __pte(pteval_t val)
 403 {
 404         pteval_t ret;
 405
 406         if (sizeof(pteval_t) > sizeof(long))
 407                 ret = PVOP_CALLEE2(pteval_t,
 408                                    pv_mmu_ops.make_pte,
 409                                    val, (u64)val >> 32);
 410         else
 411                 ret = PVOP_CALLEE1(pteval_t,
 412                                    pv_mmu_ops.make_pte,
 413                                    val);
 414
 415         return (pte_t) { .pte = ret };
 416 }
 417
 418 static inline pteval_t pte_val(pte_t pte)
 419 {
 420         pteval_t ret;
 421
 422         if (sizeof(pteval_t) > sizeof(long))
 423                 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
 424                                    pte.pte, (u64)pte.pte >> 32);
 425         else
 426                 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
 427                                    pte.pte);
 428
 429         return ret;
 430 }
 431
 432 static inline pgd_t __pgd(pgdval_t val)
 433 {
 434         pgdval_t ret;
 435
 436         if (sizeof(pgdval_t) > sizeof(long))
 437                 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
 438                                    val, (u64)val >> 32);
 439         else
 440                 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
 441                                    val);
 442
 443         return (pgd_t) { ret };
 444 }
 445
 446 static inline pgdval_t pgd_val(pgd_t pgd)
 447 {
 448         pgdval_t ret;
 449
 450         if (sizeof(pgdval_t) > sizeof(long))
 451                 ret =  PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
 452                                     pgd.pgd, (u64)pgd.pgd >> 32);
 453         else
 454                 ret =  PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
 455                                     pgd.pgd);
 456
 457         return ret;
 458 }
 459
 460 #define  __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
 461 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
 462                                            pte_t *ptep)
 463 {
 464         pteval_t ret;
 465
 466         ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
 467                          mm, addr, ptep);
 468
 469         return (pte_t) { .pte = ret };
 470 }
 471
 472 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
 473                                            pte_t *ptep, pte_t pte)
 474 {
 475         if (sizeof(pteval_t) > sizeof(long))
 476                 /* 5 arg words */
 477                 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
 478         else
 479                 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
 480                             mm, addr, ptep, pte.pte);
 481 }
 482
 483 static inline void set_pte(pte_t *ptep, pte_t pte)
 484 {
 485         if (sizeof(pteval_t) > sizeof(long))
 486                 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
 487                             pte.pte, (u64)pte.pte >> 32);
 488         else
 489                 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
 490                             pte.pte);
 491 }
 492
 493 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
 494                               pte_t *ptep, pte_t pte)
 495 {
 496         if (sizeof(pteval_t) > sizeof(long))
 497                 /* 5 arg words */
 498                 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
 499         else
 500                 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
 501 }
 502
 503 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
 504                               pmd_t *pmdp, pmd_t pmd)
 505 {
 506         if (sizeof(pmdval_t) > sizeof(long))
 507                 /* 5 arg words */
 508                 pv_mmu_ops.set_pmd_at(mm, addr, pmdp, pmd);
 509         else
 510                 PVOP_VCALL4(pv_mmu_ops.set_pmd_at, mm, addr, pmdp,
 511                             native_pmd_val(pmd));
 512 }
 513
 514 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
 515 {
 516         pmdval_t val = native_pmd_val(pmd);
 517
 518         if (sizeof(pmdval_t) > sizeof(long))
 519                 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
 520         else
 521                 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
 522 }
 523
 524 #if CONFIG_PGTABLE_LEVELS >= 3
 525 static inline pmd_t __pmd(pmdval_t val)
 526 {
 527         pmdval_t ret;
 528
 529         if (sizeof(pmdval_t) > sizeof(long))
 530                 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
 531                                    val, (u64)val >> 32);
 532         else
 533                 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
 534                                    val);
 535
 536         return (pmd_t) { ret };
 537 }
 538
 539 static inline pmdval_t pmd_val(pmd_t pmd)
 540 {
 541         pmdval_t ret;
 542
 543         if (sizeof(pmdval_t) > sizeof(long))
 544                 ret =  PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
 545                                     pmd.pmd, (u64)pmd.pmd >> 32);
 546         else
 547                 ret =  PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
 548                                     pmd.pmd);
 549
 550         return ret;
 551 }
 552
 553 static inline void set_pud(pud_t *pudp, pud_t pud)
 554 {
 555         pudval_t val = native_pud_val(pud);
 556
 557         if (sizeof(pudval_t) > sizeof(long))
 558                 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
 559                             val, (u64)val >> 32);
 560         else
 561                 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
 562                             val);
 563 }
 564 #if CONFIG_PGTABLE_LEVELS == 4
 565 static inline pud_t __pud(pudval_t val)
 566 {
 567         pudval_t ret;
 568
 569         if (sizeof(pudval_t) > sizeof(long))
 570                 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
 571                                    val, (u64)val >> 32);
 572         else
 573                 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
 574                                    val);
 575
 576         return (pud_t) { ret };
 577 }
 578
 579 static inline pudval_t pud_val(pud_t pud)
 580 {
 581         pudval_t ret;
 582
 583         if (sizeof(pudval_t) > sizeof(long))
 584                 ret =  PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
 585                                     pud.pud, (u64)pud.pud >> 32);
 586         else
 587                 ret =  PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
 588                                     pud.pud);
 589
 590         return ret;
 591 }
 592
 593 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
 594 {
 595         pgdval_t val = native_pgd_val(pgd);
 596
 597         if (sizeof(pgdval_t) > sizeof(long))
 598                 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
 599                             val, (u64)val >> 32);
 600         else
 601                 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
 602                             val);
 603 }
 604
 605 static inline void pgd_clear(pgd_t *pgdp)
 606 {
 607         set_pgd(pgdp, __pgd(0));
 608 }
 609
 610 static inline void pud_clear(pud_t *pudp)
 611 {
 612         set_pud(pudp, __pud(0));
 613 }
 614
 615 #endif  /* CONFIG_PGTABLE_LEVELS == 4 */
 616
 617 #endif  /* CONFIG_PGTABLE_LEVELS >= 3 */
 618
 619 #ifdef CONFIG_X86_PAE
 620 /* Special-case pte-setting operations for PAE, which can't update a
 621    64-bit pte atomically */
 622 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
 623 {
 624         PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
 625                     pte.pte, pte.pte >> 32);
 626 }
 627
 628 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
 629                              pte_t *ptep)
 630 {
 631         PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
 632 }
 633
 634 static inline void pmd_clear(pmd_t *pmdp)
 635 {
 636         PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
 637 }
 638 #else  /* !CONFIG_X86_PAE */
 639 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
 640 {
 641         set_pte(ptep, pte);
 642 }
 643
 644 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
 645                              pte_t *ptep)
 646 {
 647         set_pte_at(mm, addr, ptep, __pte(0));
 648 }
 649
 650 static inline void pmd_clear(pmd_t *pmdp)
 651 {
 652         set_pmd(pmdp, __pmd(0));
 653 }
 654 #endif  /* CONFIG_X86_PAE */
 655
 656 #define  __HAVE_ARCH_START_CONTEXT_SWITCH
 657 static inline void arch_start_context_switch(struct task_struct *prev)
 658 {
 659         PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
 660 }
 661
 662 static inline void arch_end_context_switch(struct task_struct *next)
 663 {
 664         PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
 665 }
 666
 667 #define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
 668 static inline void arch_enter_lazy_mmu_mode(void)
 669 {
 670         PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
 671 }
 672
 673 static inline void arch_leave_lazy_mmu_mode(void)
 674 {
 675         PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
 676 }
 677
 678 static inline void arch_flush_lazy_mmu_mode(void)
 679 {
 680         PVOP_VCALL0(pv_mmu_ops.lazy_mode.flush);
 681 }
 682
 683 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
 684                                 phys_addr_t phys, pgprot_t flags)
 685 {
 686         pv_mmu_ops.set_fixmap(idx, phys, flags);
 687 }
 688
 689 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
 690
 691 #ifdef CONFIG_QUEUED_SPINLOCKS
 692
 693 static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock *lock,
 694                                                         u32 val)
 695 {
 696         PVOP_VCALL2(pv_lock_ops.queued_spin_lock_slowpath, lock, val);
 697 }
 698
 699 static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock)
 700 {
 701         PVOP_VCALLEE1(pv_lock_ops.queued_spin_unlock, lock);
 702 }
 703
 704 static __always_inline void pv_wait(u8 *ptr, u8 val)
 705 {
 706         PVOP_VCALL2(pv_lock_ops.wait, ptr, val);
 707 }
 708
 709 static __always_inline void pv_kick(int cpu)
 710 {
 711         PVOP_VCALL1(pv_lock_ops.kick, cpu);
 712 }
 713
 714 #else /* !CONFIG_QUEUED_SPINLOCKS */
 715
 716 static __always_inline void __ticket_lock_spinning(struct arch_spinlock *lock,
 717                                                         __ticket_t ticket)
 718 {
 719         PVOP_VCALLEE2(pv_lock_ops.lock_spinning, lock, ticket);
 720 }
 721
 722 static __always_inline void __ticket_unlock_kick(struct arch_spinlock *lock,
 723                                                         __ticket_t ticket)
 724 {
 725         PVOP_VCALL2(pv_lock_ops.unlock_kick, lock, ticket);
 726 }
 727
 728 #endif /* CONFIG_QUEUED_SPINLOCKS */
 729
 730 #endif /* SMP && PARAVIRT_SPINLOCKS */
 731
 732 #ifdef CONFIG_X86_32
 733 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
 734 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
 735
 736 /* save and restore all caller-save registers, except return value */
 737 #define PV_SAVE_ALL_CALLER_REGS         "pushl %ecx;"
 738 #define PV_RESTORE_ALL_CALLER_REGS      "popl  %ecx;"
 739
 740 #define PV_FLAGS_ARG "0"
 741 #define PV_EXTRA_CLOBBERS
 742 #define PV_VEXTRA_CLOBBERS
 743 #else
 744 /* save and restore all caller-save registers, except return value */
 745 #define PV_SAVE_ALL_CALLER_REGS                                         \
 746         "push %rcx;"                                                    \
 747         "push %rdx;"                                                    \
 748         "push %rsi;"                                                    \
 749         "push %rdi;"                                                    \
 750         "push %r8;"                                                     \
 751         "push %r9;"                                                     \
 752         "push %r10;"                                                    \
 753         "push %r11;"
 754 #define PV_RESTORE_ALL_CALLER_REGS                                      \
 755         "pop %r11;"                                                     \
 756         "pop %r10;"                                                     \
 757         "pop %r9;"                                                      \
 758         "pop %r8;"                                                      \
 759         "pop %rdi;"                                                     \
 760         "pop %rsi;"                                                     \
 761         "pop %rdx;"                                                     \
 762         "pop %rcx;"
 763
 764 /* We save some registers, but all of them, that's too much. We clobber all
 765  * caller saved registers but the argument parameter */
 766 #define PV_SAVE_REGS "pushq %%rdi;"
 767 #define PV_RESTORE_REGS "popq %%rdi;"
 768 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
 769 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
 770 #define PV_FLAGS_ARG "D"
 771 #endif
 772
 773 /*
 774  * Generate a thunk around a function which saves all caller-save
 775  * registers except for the return value.  This allows C functions to
 776  * be called from assembler code where fewer than normal registers are
 777  * available.  It may also help code generation around calls from C
 778  * code if the common case doesn't use many registers.
 779  *
 780  * When a callee is wrapped in a thunk, the caller can assume that all
 781  * arg regs and all scratch registers are preserved across the
 782  * call. The return value in rax/eax will not be saved, even for void
 783  * functions.
 784  */
 785 #define PV_CALLEE_SAVE_REGS_THUNK(func)                                 \
 786         extern typeof(func) __raw_callee_save_##func;                   \
 787                                                                         \
 788         asm(".pushsection .text;"                                       \
 789             ".globl __raw_callee_save_" #func " ; "                     \
 790             "__raw_callee_save_" #func ": "                             \
 791             PV_SAVE_ALL_CALLER_REGS                                     \
 792             "call " #func ";"                                           \
 793             PV_RESTORE_ALL_CALLER_REGS                                  \
 794             "ret;"                                                      \
 795             ".popsection")
 796
 797 /* Get a reference to a callee-save function */
 798 #define PV_CALLEE_SAVE(func)                                            \
 799         ((struct paravirt_callee_save) { __raw_callee_save_##func })
 800
 801 /* Promise that "func" already uses the right calling convention */
 802 #define __PV_IS_CALLEE_SAVE(func)                       \
 803         ((struct paravirt_callee_save) { func })
 804
 805 static inline notrace unsigned long arch_local_save_flags(void)
 806 {
 807         return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl);
 808 }
 809
 810 static inline notrace void arch_local_irq_restore(unsigned long f)
 811 {
 812         PVOP_VCALLEE1(pv_irq_ops.restore_fl, f);
 813 }
 814
 815 static inline notrace void arch_local_irq_disable(void)
 816 {
 817         PVOP_VCALLEE0(pv_irq_ops.irq_disable);
 818 }
 819
 820 static inline notrace void arch_local_irq_enable(void)
 821 {
 822         PVOP_VCALLEE0(pv_irq_ops.irq_enable);
 823 }
 824
 825 static inline notrace unsigned long arch_local_irq_save(void)
 826 {
 827         unsigned long f;
 828
 829         f = arch_local_save_flags();
 830         arch_local_irq_disable();
 831         return f;
 832 }
 833
 834
 835 /* Make sure as little as possible of this mess escapes. */
 836 #undef PARAVIRT_CALL
 837 #undef __PVOP_CALL
 838 #undef __PVOP_VCALL
 839 #undef PVOP_VCALL0
 840 #undef PVOP_CALL0
 841 #undef PVOP_VCALL1
 842 #undef PVOP_CALL1
 843 #undef PVOP_VCALL2
 844 #undef PVOP_CALL2
 845 #undef PVOP_VCALL3
 846 #undef PVOP_CALL3
 847 #undef PVOP_VCALL4
 848 #undef PVOP_CALL4
 849
 850 extern void default_banner(void);
 851
 852 #else  /* __ASSEMBLY__ */
 853
 854 #define _PVSITE(ptype, clobbers, ops, word, algn)       \
 855 771:;                                           \
 856         ops;                                    \
 857 772:;                                           \
 858         .pushsection .parainstructions,"a";     \
 859          .align algn;                           \
 860          word 771b;                             \
 861          .byte ptype;                           \
 862          .byte 772b-771b;                       \
 863          .short clobbers;                       \
 864         .popsection
 865
 866
 867 #define COND_PUSH(set, mask, reg)                       \
 868         .if ((~(set)) & mask); push %reg; .endif
 869 #define COND_POP(set, mask, reg)                        \
 870         .if ((~(set)) & mask); pop %reg; .endif
 871
 872 #ifdef CONFIG_X86_64
 873
 874 #define PV_SAVE_REGS(set)                       \
 875         COND_PUSH(set, CLBR_RAX, rax);          \
 876         COND_PUSH(set, CLBR_RCX, rcx);          \
 877         COND_PUSH(set, CLBR_RDX, rdx);          \
 878         COND_PUSH(set, CLBR_RSI, rsi);          \
 879         COND_PUSH(set, CLBR_RDI, rdi);          \
 880         COND_PUSH(set, CLBR_R8, r8);            \
 881         COND_PUSH(set, CLBR_R9, r9);            \
 882         COND_PUSH(set, CLBR_R10, r10);          \
 883         COND_PUSH(set, CLBR_R11, r11)
 884 #define PV_RESTORE_REGS(set)                    \
 885         COND_POP(set, CLBR_R11, r11);           \
 886         COND_POP(set, CLBR_R10, r10);           \
 887         COND_POP(set, CLBR_R9, r9);             \
 888         COND_POP(set, CLBR_R8, r8);             \
 889         COND_POP(set, CLBR_RDI, rdi);           \
 890         COND_POP(set, CLBR_RSI, rsi);           \
 891         COND_POP(set, CLBR_RDX, rdx);           \
 892         COND_POP(set, CLBR_RCX, rcx);           \
 893         COND_POP(set, CLBR_RAX, rax)
 894
 895 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 8)
 896 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
 897 #define PARA_INDIRECT(addr)     *addr(%rip)
 898 #else
 899 #define PV_SAVE_REGS(set)                       \
 900         COND_PUSH(set, CLBR_EAX, eax);          \
 901         COND_PUSH(set, CLBR_EDI, edi);          \
 902         COND_PUSH(set, CLBR_ECX, ecx);          \
 903         COND_PUSH(set, CLBR_EDX, edx)
 904 #define PV_RESTORE_REGS(set)                    \
 905         COND_POP(set, CLBR_EDX, edx);           \
 906         COND_POP(set, CLBR_ECX, ecx);           \
 907         COND_POP(set, CLBR_EDI, edi);           \
 908         COND_POP(set, CLBR_EAX, eax)
 909
 910 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 4)
 911 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
 912 #define PARA_INDIRECT(addr)     *%cs:addr
 913 #endif
 914
 915 #define INTERRUPT_RETURN                                                \
 916         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE,       \
 917                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
 918
 919 #define DISABLE_INTERRUPTS(clobbers)                                    \
 920         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
 921                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
 922                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable);    \
 923                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
 924
 925 #define ENABLE_INTERRUPTS(clobbers)                                     \
 926         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers,  \
 927                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
 928                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable);     \
 929                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
 930
 931 #define USERGS_SYSRET32                                                 \
 932         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32),       \
 933                   CLBR_NONE,                                            \
 934                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
 935
 936 #ifdef CONFIG_X86_32
 937 #define GET_CR0_INTO_EAX                                \
 938         push %ecx; push %edx;                           \
 939         call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
 940         pop %edx; pop %ecx
 941
 942 #define ENABLE_INTERRUPTS_SYSEXIT                                       \
 943         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit),    \
 944                   CLBR_NONE,                                            \
 945                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
 946
 947
 948 #else   /* !CONFIG_X86_32 */
 949
 950 /*
 951  * If swapgs is used while the userspace stack is still current,
 952  * there's no way to call a pvop.  The PV replacement *must* be
 953  * inlined, or the swapgs instruction must be trapped and emulated.
 954  */
 955 #define SWAPGS_UNSAFE_STACK                                             \
 956         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
 957                   swapgs)
 958
 959 /*
 960  * Note: swapgs is very special, and in practise is either going to be
 961  * implemented with a single "swapgs" instruction or something very
 962  * special.  Either way, we don't need to save any registers for
 963  * it.
 964  */
 965 #define SWAPGS                                                          \
 966         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
 967                   call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs)          \
 968                  )
 969
 970 #define GET_CR2_INTO_RAX                                \
 971         call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2)
 972
 973 #define PARAVIRT_ADJUST_EXCEPTION_FRAME                                 \
 974         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
 975                   CLBR_NONE,                                            \
 976                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
 977
 978 #define USERGS_SYSRET64                                                 \
 979         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64),       \
 980                   CLBR_NONE,                                            \
 981                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
 982 #endif  /* CONFIG_X86_32 */
 983
 984 #endif /* __ASSEMBLY__ */
 985 #else  /* CONFIG_PARAVIRT */
 986 # define default_banner x86_init_noop
 987 #ifndef __ASSEMBLY__
 988 static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
 989                                           struct mm_struct *mm)
 990 {
 991 }
 992
 993 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
 994 {
 995 }
 996 #endif /* __ASSEMBLY__ */
 997 #endif /* !CONFIG_PARAVIRT */
 998 #endif /* _ASM_X86_PARAVIRT_H */