kernel/arch/powerpc/platforms/85xx/mpc85xx_rdb.c

   1 /*
   2  * MPC85xx RDB Board Setup
   3  *
   4  * Copyright 2009,2012-2013 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 #include <linux/stddef.h>
  13 #include <linux/kernel.h>
  14 #include <linux/pci.h>
  15 #include <linux/kdev_t.h>
  16 #include <linux/delay.h>
  17 #include <linux/seq_file.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/of_platform.h>
  20
  21 #include <asm/time.h>
  22 #include <asm/machdep.h>
  23 #include <asm/pci-bridge.h>
  24 #include <mm/mmu_decl.h>
  25 #include <asm/prom.h>
  26 #include <asm/udbg.h>
  27 #include <asm/mpic.h>
  28 #include <asm/qe.h>
  29 #include <asm/qe_ic.h>
  30 #include <asm/fsl_guts.h>
  31
  32 #include <sysdev/fsl_soc.h>
  33 #include <sysdev/fsl_pci.h>
  34 #include "smp.h"
  35
  36 #include "mpc85xx.h"
  37
  38 #undef DEBUG
  39
  40 #ifdef DEBUG
  41 #define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
  42 #else
  43 #define DBG(fmt, args...)
  44 #endif
  45
  46
  47 void __init mpc85xx_rdb_pic_init(void)
  48 {
  49         struct mpic *mpic;
  50         unsigned long root = of_get_flat_dt_root();
  51
  52 #ifdef CONFIG_QUICC_ENGINE
  53         struct device_node *np;
  54 #endif
  55
  56         if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) {
  57                 mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET |
  58                         MPIC_BIG_ENDIAN |
  59                         MPIC_SINGLE_DEST_CPU,
  60                         0, 256, " OpenPIC  ");
  61         } else {
  62                 mpic = mpic_alloc(NULL, 0,
  63                   MPIC_BIG_ENDIAN |
  64                   MPIC_SINGLE_DEST_CPU,
  65                   0, 256, " OpenPIC  ");
  66         }
  67
  68         BUG_ON(mpic == NULL);
  69         mpic_init(mpic);
  70
  71 #ifdef CONFIG_QUICC_ENGINE
  72         np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
  73         if (np) {
  74                 qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
  75                                 qe_ic_cascade_high_mpic);
  76                 of_node_put(np);
  77
  78         } else
  79                 pr_err("%s: Could not find qe-ic node\n", __func__);
  80 #endif
  81
  82 }
  83
  84 /*
  85  * Setup the architecture
  86  */
  87 static void __init mpc85xx_rdb_setup_arch(void)
  88 {
  89         if (ppc_md.progress)
  90                 ppc_md.progress("mpc85xx_rdb_setup_arch()", 0);
  91
  92         mpc85xx_smp_init();
  93
  94         fsl_pci_assign_primary();
  95
  96 #ifdef CONFIG_QUICC_ENGINE
  97         mpc85xx_qe_init();
  98         mpc85xx_qe_par_io_init();
  99 #if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
 100         if (machine_is(p1025_rdb)) {
 101                 struct device_node *np;
 102
 103                 struct ccsr_guts __iomem *guts;
 104
 105                 np = of_find_node_by_name(NULL, "global-utilities");
 106                 if (np) {
 107                         guts = of_iomap(np, 0);
 108                         if (!guts) {
 109
 110                                 pr_err("mpc85xx-rdb: could not map global utilities register\n");
 111
 112                         } else {
 113                         /* P1025 has pins muxed for QE and other functions. To
 114                         * enable QE UEC mode, we need to set bit QE0 for UCC1
 115                         * in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9
 116                         * and QE12 for QE MII management singals in PMUXCR
 117                         * register.
 118                         */
 119                                 setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |
 120                                                 MPC85xx_PMUXCR_QE(3) |
 121                                                 MPC85xx_PMUXCR_QE(9) |
 122                                                 MPC85xx_PMUXCR_QE(12));
 123                                 iounmap(guts);
 124                         }
 125                         of_node_put(np);
 126                 }
 127
 128         }
 129 #endif
 130 #endif  /* CONFIG_QUICC_ENGINE */
 131
 132         printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
 133 }
 134
 135 machine_arch_initcall(p2020_rdb, mpc85xx_common_publish_devices);
 136 machine_arch_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
 137 machine_arch_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
 138 machine_arch_initcall(p1020_rdb, mpc85xx_common_publish_devices);
 139 machine_arch_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
 140 machine_arch_initcall(p1020_rdb_pd, mpc85xx_common_publish_devices);
 141 machine_arch_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
 142 machine_arch_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
 143 machine_arch_initcall(p1025_rdb, mpc85xx_common_publish_devices);
 144 machine_arch_initcall(p1024_rdb, mpc85xx_common_publish_devices);
 145
 146 /*
 147  * Called very early, device-tree isn't unflattened
 148  */
 149 static int __init p2020_rdb_probe(void)
 150 {
 151         unsigned long root = of_get_flat_dt_root();
 152
 153         if (of_flat_dt_is_compatible(root, "fsl,P2020RDB"))
 154                 return 1;
 155         return 0;
 156 }
 157
 158 static int __init p1020_rdb_probe(void)
 159 {
 160         unsigned long root = of_get_flat_dt_root();
 161
 162         if (of_flat_dt_is_compatible(root, "fsl,P1020RDB"))
 163                 return 1;
 164         return 0;
 165 }
 166
 167 static int __init p1020_rdb_pc_probe(void)
 168 {
 169         unsigned long root = of_get_flat_dt_root();
 170
 171         return of_flat_dt_is_compatible(root, "fsl,P1020RDB-PC");
 172 }
 173
 174 static int __init p1020_rdb_pd_probe(void)
 175 {
 176         unsigned long root = of_get_flat_dt_root();
 177
 178         return of_flat_dt_is_compatible(root, "fsl,P1020RDB-PD");
 179 }
 180
 181 static int __init p1021_rdb_pc_probe(void)
 182 {
 183         unsigned long root = of_get_flat_dt_root();
 184
 185         if (of_flat_dt_is_compatible(root, "fsl,P1021RDB-PC"))
 186                 return 1;
 187         return 0;
 188 }
 189
 190 static int __init p2020_rdb_pc_probe(void)
 191 {
 192         unsigned long root = of_get_flat_dt_root();
 193
 194         if (of_flat_dt_is_compatible(root, "fsl,P2020RDB-PC"))
 195                 return 1;
 196         return 0;
 197 }
 198
 199 static int __init p1025_rdb_probe(void)
 200 {
 201         unsigned long root = of_get_flat_dt_root();
 202
 203         return of_flat_dt_is_compatible(root, "fsl,P1025RDB");
 204 }
 205
 206 static int __init p1020_mbg_pc_probe(void)
 207 {
 208         unsigned long root = of_get_flat_dt_root();
 209
 210         return of_flat_dt_is_compatible(root, "fsl,P1020MBG-PC");
 211 }
 212
 213 static int __init p1020_utm_pc_probe(void)
 214 {
 215         unsigned long root = of_get_flat_dt_root();
 216
 217         return of_flat_dt_is_compatible(root, "fsl,P1020UTM-PC");
 218 }
 219
 220 static int __init p1024_rdb_probe(void)
 221 {
 222         unsigned long root = of_get_flat_dt_root();
 223
 224         return of_flat_dt_is_compatible(root, "fsl,P1024RDB");
 225 }
 226
 227 define_machine(p2020_rdb) {
 228         .name                   = "P2020 RDB",
 229         .probe                  = p2020_rdb_probe,
 230         .setup_arch             = mpc85xx_rdb_setup_arch,
 231         .init_IRQ               = mpc85xx_rdb_pic_init,
 232 #ifdef CONFIG_PCI
 233         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 234         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 235 #endif
 236         .get_irq                = mpic_get_irq,
 237         .restart                = fsl_rstcr_restart,
 238         .calibrate_decr         = generic_calibrate_decr,
 239         .progress               = udbg_progress,
 240 };
 241
 242 define_machine(p1020_rdb) {
 243         .name                   = "P1020 RDB",
 244         .probe                  = p1020_rdb_probe,
 245         .setup_arch             = mpc85xx_rdb_setup_arch,
 246         .init_IRQ               = mpc85xx_rdb_pic_init,
 247 #ifdef CONFIG_PCI
 248         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 249         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 250 #endif
 251         .get_irq                = mpic_get_irq,
 252         .restart                = fsl_rstcr_restart,
 253         .calibrate_decr         = generic_calibrate_decr,
 254         .progress               = udbg_progress,
 255 };
 256
 257 define_machine(p1021_rdb_pc) {
 258         .name                   = "P1021 RDB-PC",
 259         .probe                  = p1021_rdb_pc_probe,
 260         .setup_arch             = mpc85xx_rdb_setup_arch,
 261         .init_IRQ               = mpc85xx_rdb_pic_init,
 262 #ifdef CONFIG_PCI
 263         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 264         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 265 #endif
 266         .get_irq                = mpic_get_irq,
 267         .restart                = fsl_rstcr_restart,
 268         .calibrate_decr         = generic_calibrate_decr,
 269         .progress               = udbg_progress,
 270 };
 271
 272 define_machine(p2020_rdb_pc) {
 273         .name                   = "P2020RDB-PC",
 274         .probe                  = p2020_rdb_pc_probe,
 275         .setup_arch             = mpc85xx_rdb_setup_arch,
 276         .init_IRQ               = mpc85xx_rdb_pic_init,
 277 #ifdef CONFIG_PCI
 278         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 279         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 280 #endif
 281         .get_irq                = mpic_get_irq,
 282         .restart                = fsl_rstcr_restart,
 283         .calibrate_decr         = generic_calibrate_decr,
 284         .progress               = udbg_progress,
 285 };
 286
 287 define_machine(p1025_rdb) {
 288         .name                   = "P1025 RDB",
 289         .probe                  = p1025_rdb_probe,
 290         .setup_arch             = mpc85xx_rdb_setup_arch,
 291         .init_IRQ               = mpc85xx_rdb_pic_init,
 292 #ifdef CONFIG_PCI
 293         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 294         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 295 #endif
 296         .get_irq                = mpic_get_irq,
 297         .restart                = fsl_rstcr_restart,
 298         .calibrate_decr         = generic_calibrate_decr,
 299         .progress               = udbg_progress,
 300 };
 301
 302 define_machine(p1020_mbg_pc) {
 303         .name                   = "P1020 MBG-PC",
 304         .probe                  = p1020_mbg_pc_probe,
 305         .setup_arch             = mpc85xx_rdb_setup_arch,
 306         .init_IRQ               = mpc85xx_rdb_pic_init,
 307 #ifdef CONFIG_PCI
 308         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 309         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 310 #endif
 311         .get_irq                = mpic_get_irq,
 312         .restart                = fsl_rstcr_restart,
 313         .calibrate_decr         = generic_calibrate_decr,
 314         .progress               = udbg_progress,
 315 };
 316
 317 define_machine(p1020_utm_pc) {
 318         .name                   = "P1020 UTM-PC",
 319         .probe                  = p1020_utm_pc_probe,
 320         .setup_arch             = mpc85xx_rdb_setup_arch,
 321         .init_IRQ               = mpc85xx_rdb_pic_init,
 322 #ifdef CONFIG_PCI
 323         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 324         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 325 #endif
 326         .get_irq                = mpic_get_irq,
 327         .restart                = fsl_rstcr_restart,
 328         .calibrate_decr         = generic_calibrate_decr,
 329         .progress               = udbg_progress,
 330 };
 331
 332 define_machine(p1020_rdb_pc) {
 333         .name                   = "P1020RDB-PC",
 334         .probe                  = p1020_rdb_pc_probe,
 335         .setup_arch             = mpc85xx_rdb_setup_arch,
 336         .init_IRQ               = mpc85xx_rdb_pic_init,
 337 #ifdef CONFIG_PCI
 338         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 339         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 340 #endif
 341         .get_irq                = mpic_get_irq,
 342         .restart                = fsl_rstcr_restart,
 343         .calibrate_decr         = generic_calibrate_decr,
 344         .progress               = udbg_progress,
 345 };
 346
 347 define_machine(p1020_rdb_pd) {
 348         .name                   = "P1020RDB-PD",
 349         .probe                  = p1020_rdb_pd_probe,
 350         .setup_arch             = mpc85xx_rdb_setup_arch,
 351         .init_IRQ               = mpc85xx_rdb_pic_init,
 352 #ifdef CONFIG_PCI
 353         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 354         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 355 #endif
 356         .get_irq                = mpic_get_irq,
 357         .restart                = fsl_rstcr_restart,
 358         .calibrate_decr         = generic_calibrate_decr,
 359         .progress               = udbg_progress,
 360 };
 361
 362 define_machine(p1024_rdb) {
 363         .name                   = "P1024 RDB",
 364         .probe                  = p1024_rdb_probe,
 365         .setup_arch             = mpc85xx_rdb_setup_arch,
 366         .init_IRQ               = mpc85xx_rdb_pic_init,
 367 #ifdef CONFIG_PCI
 368         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 369         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 370 #endif
 371         .get_irq                = mpic_get_irq,
 372         .restart                = fsl_rstcr_restart,
 373         .calibrate_decr         = generic_calibrate_decr,
 374         .progress               = udbg_progress,
 375 };