kernel/arch/powerpc/boot/dts/tqm8540.dts

   1 /*
   2  * TQM 8540 Device Tree Source
   3  *
   4  * Copyright 2008 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "tqc,tqm8540";
  16         compatible = "tqc,tqm8540";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 ethernet2 = &enet2;
  24                 serial0 = &serial0;
  25                 serial1 = &serial1;
  26                 pci0 = &pci0;
  27         };
  28
  29         cpus {
  30                 #address-cells = <1>;
  31                 #size-cells = <0>;
  32
  33                 PowerPC,8540@0 {
  34                         device_type = "cpu";
  35                         reg = <0>;
  36                         d-cache-line-size = <32>;
  37                         i-cache-line-size = <32>;
  38                         d-cache-size = <32768>;
  39                         i-cache-size = <32768>;
  40                         timebase-frequency = <0>;
  41                         bus-frequency = <0>;
  42                         clock-frequency = <0>;
  43                         next-level-cache = <&L2>;
  44                 };
  45         };
  46
  47         memory {
  48                 device_type = "memory";
  49                 reg = <0x00000000 0x10000000>;
  50         };
  51
  52         soc@e0000000 {
  53                 #address-cells = <1>;
  54                 #size-cells = <1>;
  55                 device_type = "soc";
  56                 ranges = <0x0 0xe0000000 0x100000>;
  57                 bus-frequency = <0>;
  58                 compatible = "fsl,mpc8540-immr", "simple-bus";
  59
  60                 ecm-law@0 {
  61                         compatible = "fsl,ecm-law";
  62                         reg = <0x0 0x1000>;
  63                         fsl,num-laws = <8>;
  64                 };
  65
  66                 ecm@1000 {
  67                         compatible = "fsl,mpc8540-ecm", "fsl,ecm";
  68                         reg = <0x1000 0x1000>;
  69                         interrupts = <17 2>;
  70                         interrupt-parent = <&mpic>;
  71                 };
  72
  73                 memory-controller@2000 {
  74                         compatible = "fsl,mpc8540-memory-controller";
  75                         reg = <0x2000 0x1000>;
  76                         interrupt-parent = <&mpic>;
  77                         interrupts = <18 2>;
  78                 };
  79
  80                 L2: l2-cache-controller@20000 {
  81                         compatible = "fsl,mpc8540-l2-cache-controller";
  82                         reg = <0x20000 0x1000>;
  83                         cache-line-size = <32>;
  84                         cache-size = <0x40000>; // L2, 256K
  85                         interrupt-parent = <&mpic>;
  86                         interrupts = <16 2>;
  87                 };
  88
  89                 i2c@3000 {
  90                         #address-cells = <1>;
  91                         #size-cells = <0>;
  92                         cell-index = <0>;
  93                         compatible = "fsl-i2c";
  94                         reg = <0x3000 0x100>;
  95                         interrupts = <43 2>;
  96                         interrupt-parent = <&mpic>;
  97                         dfsrr;
  98
  99                         dtt@48 {
 100                                 compatible = "national,lm75";
 101                                 reg = <0x48>;
 102                         };
 103
 104                         rtc@68 {
 105                                 compatible = "dallas,ds1337";
 106                                 reg = <0x68>;
 107                         };
 108                 };
 109
 110                 dma@21300 {
 111                         #address-cells = <1>;
 112                         #size-cells = <1>;
 113                         compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
 114                         reg = <0x21300 0x4>;
 115                         ranges = <0x0 0x21100 0x200>;
 116                         cell-index = <0>;
 117                         dma-channel@0 {
 118                                 compatible = "fsl,mpc8540-dma-channel",
 119                                                 "fsl,eloplus-dma-channel";
 120                                 reg = <0x0 0x80>;
 121                                 cell-index = <0>;
 122                                 interrupt-parent = <&mpic>;
 123                                 interrupts = <20 2>;
 124                         };
 125                         dma-channel@80 {
 126                                 compatible = "fsl,mpc8540-dma-channel",
 127                                                 "fsl,eloplus-dma-channel";
 128                                 reg = <0x80 0x80>;
 129                                 cell-index = <1>;
 130                                 interrupt-parent = <&mpic>;
 131                                 interrupts = <21 2>;
 132                         };
 133                         dma-channel@100 {
 134                                 compatible = "fsl,mpc8540-dma-channel",
 135                                                 "fsl,eloplus-dma-channel";
 136                                 reg = <0x100 0x80>;
 137                                 cell-index = <2>;
 138                                 interrupt-parent = <&mpic>;
 139                                 interrupts = <22 2>;
 140                         };
 141                         dma-channel@180 {
 142                                 compatible = "fsl,mpc8540-dma-channel",
 143                                                 "fsl,eloplus-dma-channel";
 144                                 reg = <0x180 0x80>;
 145                                 cell-index = <3>;
 146                                 interrupt-parent = <&mpic>;
 147                                 interrupts = <23 2>;
 148                         };
 149                 };
 150
 151                 enet0: ethernet@24000 {
 152                         #address-cells = <1>;
 153                         #size-cells = <1>;
 154                         cell-index = <0>;
 155                         device_type = "network";
 156                         model = "TSEC";
 157                         compatible = "gianfar";
 158                         reg = <0x24000 0x1000>;
 159                         ranges = <0x0 0x24000 0x1000>;
 160                         local-mac-address = [ 00 00 00 00 00 00 ];
 161                         interrupts = <29 2 30 2 34 2>;
 162                         interrupt-parent = <&mpic>;
 163                         phy-handle = <&phy2>;
 164
 165                         mdio@520 {
 166                                 #address-cells = <1>;
 167                                 #size-cells = <0>;
 168                                 compatible = "fsl,gianfar-mdio";
 169                                 reg = <0x520 0x20>;
 170
 171                                 phy1: ethernet-phy@1 {
 172                                         interrupt-parent = <&mpic>;
 173                                         interrupts = <8 1>;
 174                                         reg = <1>;
 175                                 };
 176                                 phy2: ethernet-phy@2 {
 177                                         interrupt-parent = <&mpic>;
 178                                         interrupts = <8 1>;
 179                                         reg = <2>;
 180                                 };
 181                                 phy3: ethernet-phy@3 {
 182                                         interrupt-parent = <&mpic>;
 183                                         interrupts = <8 1>;
 184                                         reg = <3>;
 185                                 };
 186                                 tbi0: tbi-phy@11 {
 187                                         reg = <0x11>;
 188                                         device_type = "tbi-phy";
 189                                 };
 190                         };
 191                 };
 192
 193                 enet1: ethernet@25000 {
 194                         #address-cells = <1>;
 195                         #size-cells = <1>;
 196                         cell-index = <1>;
 197                         device_type = "network";
 198                         model = "TSEC";
 199                         compatible = "gianfar";
 200                         reg = <0x25000 0x1000>;
 201                         ranges = <0x0 0x25000 0x1000>;
 202                         local-mac-address = [ 00 00 00 00 00 00 ];
 203                         interrupts = <35 2 36 2 40 2>;
 204                         interrupt-parent = <&mpic>;
 205                         phy-handle = <&phy1>;
 206
 207                         mdio@520 {
 208                                 #address-cells = <1>;
 209                                 #size-cells = <0>;
 210                                 compatible = "fsl,gianfar-tbi";
 211                                 reg = <0x520 0x20>;
 212
 213                                 tbi1: tbi-phy@11 {
 214                                         reg = <0x11>;
 215                                         device_type = "tbi-phy";
 216                                 };
 217                         };
 218                 };
 219
 220                 enet2: ethernet@26000 {
 221                         #address-cells = <1>;
 222                         #size-cells = <1>;
 223                         cell-index = <2>;
 224                         device_type = "network";
 225                         model = "FEC";
 226                         compatible = "gianfar";
 227                         reg = <0x26000 0x1000>;
 228                         ranges = <0x0 0x26000 0x1000>;
 229                         local-mac-address = [ 00 00 00 00 00 00 ];
 230                         interrupts = <41 2>;
 231                         interrupt-parent = <&mpic>;
 232                         phy-handle = <&phy3>;
 233
 234                         mdio@520 {
 235                                 #address-cells = <1>;
 236                                 #size-cells = <0>;
 237                                 compatible = "fsl,gianfar-tbi";
 238                                 reg = <0x520 0x20>;
 239
 240                                 tbi2: tbi-phy@11 {
 241                                         reg = <0x11>;
 242                                         device_type = "tbi-phy";
 243                                 };
 244                         };
 245                 };
 246
 247                 serial0: serial@4500 {
 248                         cell-index = <0>;
 249                         device_type = "serial";
 250                         compatible = "fsl,ns16550", "ns16550";
 251                         reg = <0x4500 0x100>;   // reg base, size
 252                         clock-frequency = <0>;  // should we fill in in uboot?
 253                         interrupts = <42 2>;
 254                         interrupt-parent = <&mpic>;
 255                 };
 256
 257                 serial1: serial@4600 {
 258                         cell-index = <1>;
 259                         device_type = "serial";
 260                         compatible = "fsl,ns16550", "ns16550";
 261                         reg = <0x4600 0x100>;   // reg base, size
 262                         clock-frequency = <0>;  // should we fill in in uboot?
 263                         interrupts = <42 2>;
 264                         interrupt-parent = <&mpic>;
 265                 };
 266
 267                 mpic: pic@40000 {
 268                         interrupt-controller;
 269                         #address-cells = <0>;
 270                         #interrupt-cells = <2>;
 271                         reg = <0x40000 0x40000>;
 272                         device_type = "open-pic";
 273                         compatible = "chrp,open-pic";
 274                 };
 275         };
 276
 277         localbus@e0005000 {
 278                 #address-cells = <2>;
 279                 #size-cells = <1>;
 280                 compatible = "fsl,mpc8540-localbus", "fsl,pq3-localbus",
 281                              "simple-bus";
 282                 reg = <0xe0005000 0x1000>;
 283                 interrupt-parent = <&mpic>;
 284                 interrupts = <19 2>;
 285
 286                 ranges = <0x0 0x0 0xfe000000 0x02000000>;
 287
 288                 nor@0,0 {
 289                         #address-cells = <1>;
 290                         #size-cells = <1>;
 291                         compatible = "cfi-flash";
 292                         reg = <0x0 0x0 0x02000000>;
 293                         bank-width = <4>;
 294                         device-width = <2>;
 295                         partition@0 {
 296                                 label = "kernel";
 297                                 reg = <0x00000000 0x00180000>;
 298                         };
 299                         partition@180000 {
 300                                 label = "root";
 301                                 reg = <0x00180000 0x01dc0000>;
 302                         };
 303                         partition@1f40000 {
 304                                 label = "env1";
 305                                 reg = <0x01f40000 0x00040000>;
 306                         };
 307                         partition@1f80000 {
 308                                 label = "env2";
 309                                 reg = <0x01f80000 0x00040000>;
 310                         };
 311                         partition@1fc0000 {
 312                                 label = "u-boot";
 313                                 reg = <0x01fc0000 0x00040000>;
 314                                 read-only;
 315                         };
 316                 };
 317         };
 318
 319         pci0: pci@e0008000 {
 320                 #interrupt-cells = <1>;
 321                 #size-cells = <2>;
 322                 #address-cells = <3>;
 323                 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
 324                 device_type = "pci";
 325                 reg = <0xe0008000 0x1000>;
 326                 clock-frequency = <66666666>;
 327                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 328                 interrupt-map = <
 329                                 /* IDSEL 28 */
 330                                  0xe000 0 0 1 &mpic 2 1
 331                                  0xe000 0 0 2 &mpic 3 1
 332                                  0xe000 0 0 3 &mpic 6 1
 333                                  0xe000 0 0 4 &mpic 5 1
 334
 335                                 /* IDSEL 11 */
 336                                  0x5800 0 0 1 &mpic 6 1
 337                                  0x5800 0 0 2 &mpic 5 1
 338                                  >;
 339
 340                 interrupt-parent = <&mpic>;
 341                 interrupts = <24 2>;
 342                 bus-range = <0 0>;
 343                 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
 344                           0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
 345         };
 346 };