kernel/arch/powerpc/boot/dts/p1023rdb.dts

   1 /*
   2  * P1023 RDB Device Tree Source
   3  *
   4  * Copyright 2013 - 2014 Freescale Semiconductor Inc.
   5  *
   6  * Author: Chunhe Lan <Chunhe.Lan@freescale.com>
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions are met:
  10  *     * Redistributions of source code must retain the above copyright
  11  *       notice, this list of conditions and the following disclaimer.
  12  *     * Redistributions in binary form must reproduce the above copyright
  13  *       notice, this list of conditions and the following disclaimer in the
  14  *       documentation and/or other materials provided with the distribution.
  15  *     * Neither the name of Freescale Semiconductor nor the
  16  *       names of its contributors may be used to endorse or promote products
  17  *       derived from this software without specific prior written permission.
  18  *
  19  *
  20  * ALTERNATIVELY, this software may be distributed under the terms of the
  21  * GNU General Public License ("GPL") as published by the Free Software
  22  * Foundation, either version 2 of that License or (at your option) any
  23  * later version.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  26  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  27  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  28  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  29  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  30  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  31  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  32  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  33  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  34  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35  */
  36
  37 /include/ "fsl/p1023si-pre.dtsi"
  38
  39 / {
  40         model = "fsl,P1023";
  41         compatible = "fsl,P1023RDB";
  42         #address-cells = <2>;
  43         #size-cells = <2>;
  44         interrupt-parent = <&mpic>;
  45
  46         memory {
  47                 device_type = "memory";
  48         };
  49
  50         reserved-memory {
  51                 #address-cells = <2>;
  52                 #size-cells = <2>;
  53                 ranges;
  54
  55                 bman_fbpr: bman-fbpr {
  56                         size = <0 0x1000000>;
  57                         alignment = <0 0x1000000>;
  58                 };
  59         };
  60
  61         bportals: bman-portals@ff200000 {
  62                 ranges = <0x0 0xf 0xff200000 0x200000>;
  63         };
  64
  65         soc: soc@ff600000 {
  66                 ranges = <0x0 0x0 0xff600000 0x200000>;
  67
  68                 i2c@3000 {
  69                         eeprom@53 {
  70                                 compatible = "at24,24c04";
  71                                 reg = <0x53>;
  72                         };
  73
  74                         rtc@6f {
  75                                 compatible = "microchip,mcp7941x";
  76                                 reg = <0x6f>;
  77                         };
  78                 };
  79
  80                 usb@22000 {
  81                         dr_mode = "host";
  82                         phy_type = "ulpi";
  83                 };
  84         };
  85
  86         lbc: localbus@ff605000 {
  87                 reg = <0 0xff605000 0 0x1000>;
  88
  89                 /* NOR, NAND Flashes */
  90                 ranges = <0x0 0x0 0x0 0xec000000 0x04000000
  91                           0x1 0x0 0x0 0xffa00000 0x08000000>;
  92
  93                 nor@0,0 {
  94                         #address-cells = <1>;
  95                         #size-cells = <1>;
  96                         compatible = "cfi-flash";
  97                         reg = <0x0 0x0 0x04000000>;
  98                         bank-width = <2>;
  99                         device-width = <1>;
 100
 101                         partition@0 {
 102                                 /* 48MB for Root File System */
 103                                 reg = <0x00000000 0x03000000>;
 104                                 label = "NOR Root File System";
 105                         };
 106
 107                         partition@3000000 {
 108                                 /* 1MB for DTB Image */
 109                                 reg = <0x03000000 0x00100000>;
 110                                 label = "NOR DTB Image";
 111                         };
 112
 113                         partition@3100000 {
 114                                 /* 14MB for Linux Kernel Image */
 115                                 reg = <0x03100000 0x00e00000>;
 116                                 label = "NOR Linux Kernel Image";
 117                         };
 118
 119                         partition@3f00000 {
 120                                 /* This location must not be altered  */
 121                                 /* 512KB for u-boot Bootloader Image */
 122                                 /* 512KB for u-boot Environment Variables */
 123                                 reg = <0x03f00000 0x00100000>;
 124                                 label = "NOR U-Boot Image";
 125                                 read-only;
 126                         };
 127                 };
 128
 129                 nand@1,0 {
 130                         #address-cells = <1>;
 131                         #size-cells = <1>;
 132                         compatible = "fsl,elbc-fcm-nand";
 133                         reg = <0x1 0x0 0x40000>;
 134
 135                         partition@0 {
 136                                 /* This location must not be altered  */
 137                                 /* 1MB for u-boot Bootloader Image */
 138                                 reg = <0x0 0x00100000>;
 139                                 label = "NAND U-Boot Image";
 140                                 read-only;
 141                         };
 142
 143                         partition@100000 {
 144                                 /* 1MB for DTB Image */
 145                                 reg = <0x00100000 0x00100000>;
 146                                 label = "NAND DTB Image";
 147                         };
 148
 149                         partition@200000 {
 150                                 /* 14MB for Linux Kernel Image */
 151                                 reg = <0x00200000 0x00e00000>;
 152                                 label = "NAND Linux Kernel Image";
 153                         };
 154
 155                         partition@1000000 {
 156                                 /* 96MB for Root File System Image */
 157                                 reg = <0x01000000 0x06000000>;
 158                                 label = "NAND Root File System";
 159                         };
 160
 161                         partition@7000000 {
 162                                 /* 16MB for User Writable Area */
 163                                 reg = <0x07000000 0x01000000>;
 164                                 label = "NAND Writable User area";
 165                         };
 166                 };
 167         };
 168
 169         pci0: pcie@ff60a000 {
 170                 reg = <0 0xff60a000 0 0x1000>;
 171                 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
 172                           0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
 173                 pcie@0 {
 174                         /* IRQ[0:3] are pulled up on board, set to active-low */
 175                         interrupt-map-mask = <0xf800 0 0 7>;
 176                         interrupt-map = <
 177                                 /* IDSEL 0x0 */
 178                                 0000 0 0 1 &mpic 0 1 0 0
 179                                 0000 0 0 2 &mpic 1 1 0 0
 180                                 0000 0 0 3 &mpic 2 1 0 0
 181                                 0000 0 0 4 &mpic 3 1 0 0
 182                                 >;
 183                         ranges = <0x2000000 0x0 0xc0000000
 184                                   0x2000000 0x0 0xc0000000
 185                                   0x0 0x20000000
 186
 187                                   0x1000000 0x0 0x0
 188                                   0x1000000 0x0 0x0
 189                                   0x0 0x100000>;
 190                 };
 191         };
 192
 193         board_pci1: pci1: pcie@ff609000 {
 194                 reg = <0 0xff609000 0 0x1000>;
 195                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
 196                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
 197                 pcie@0 {
 198                         /*
 199                          * IRQ[4:6] only for PCIe, set to active-high,
 200                          * IRQ[7] is pulled up on board, set to active-low
 201                          */
 202                         interrupt-map-mask = <0xf800 0 0 7>;
 203                         interrupt-map = <
 204                                 /* IDSEL 0x0 */
 205                                 0000 0 0 1 &mpic 4 2 0 0
 206                                 0000 0 0 2 &mpic 5 2 0 0
 207                                 0000 0 0 3 &mpic 6 2 0 0
 208                                 0000 0 0 4 &mpic 7 1 0 0
 209                                 >;
 210                         ranges = <0x2000000 0x0 0xa0000000
 211                                   0x2000000 0x0 0xa0000000
 212                                   0x0 0x20000000
 213
 214                                   0x1000000 0x0 0x0
 215                                   0x1000000 0x0 0x0
 216                                   0x0 0x100000>;
 217                 };
 218         };
 219
 220         pci2: pcie@ff60b000 {
 221                 reg = <0 0xff60b000 0 0x1000>;
 222                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
 223                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
 224                 pcie@0 {
 225                         /*
 226                          * IRQ[8:10] are pulled up on board, set to active-low
 227                          * IRQ[11] only for PCIe, set to active-high,
 228                          */
 229                         interrupt-map-mask = <0xf800 0 0 7>;
 230                         interrupt-map = <
 231                                 /* IDSEL 0x0 */
 232                                 0000 0 0 1 &mpic 8 1 0 0
 233                                 0000 0 0 2 &mpic 9 1 0 0
 234                                 0000 0 0 3 &mpic 10 1 0 0
 235                                 0000 0 0 4 &mpic 11 2 0 0
 236                                 >;
 237                         ranges = <0x2000000 0x0 0x80000000
 238                                   0x2000000 0x0 0x80000000
 239                                   0x0 0x20000000
 240
 241                                   0x1000000 0x0 0x0
 242                                   0x1000000 0x0 0x0
 243                                   0x0 0x100000>;
 244                 };
 245         };
 246 };
 247
 248 /include/ "fsl/p1023si-post.dtsi"