Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / arch / powerpc / boot / dts / lite5200b.dts
1 /*
2  * Lite5200B board Device Tree Source
3  *
4  * Copyright 2006-2007 Secret Lab Technologies Ltd.
5  * Grant Likely <grant.likely@secretlab.ca>
6  *
7  * This program is free software; you can redistribute  it and/or modify it
8  * under  the terms of  the GNU General  Public License as published by the
9  * Free Software Foundation;  either version 2 of the  License, or (at your
10  * option) any later version.
11  */
12
13 /include/ "mpc5200b.dtsi"
14
15 &gpt0 { fsl,has-wdt; };
16 &gpt2 { gpio-controller; };
17 &gpt3 { gpio-controller; };
18
19 / {
20         model = "fsl,lite5200b";
21         compatible = "fsl,lite5200b";
22
23         leds {
24                 compatible = "gpio-leds";
25                 tmr2 {
26                         gpios = <&gpt2 0 1>;
27                 };
28                 tmr3 {
29                         gpios = <&gpt3 0 1>;
30                         linux,default-trigger = "heartbeat";
31                 };
32                 led1 { gpios = <&gpio_wkup 2 1>; };
33                 led2 { gpios = <&gpio_simple 3 1>; };
34                 led3 { gpios = <&gpio_wkup 3 1>; };
35                 led4 { gpios = <&gpio_simple 2 1>; };
36         };
37
38         memory {
39                 reg = <0x00000000 0x10000000>;  // 256MB
40         };
41
42         soc5200@f0000000 {
43                 psc@2000 {              // PSC1
44                         compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
45                         cell-index = <0>;
46                 };
47
48                 psc@2200 {              // PSC2
49                         status = "disabled";
50                 };
51
52                 psc@2400 {              // PSC3
53                         status = "disabled";
54                 };
55
56                 psc@2600 {              // PSC4
57                         status = "disabled";
58                 };
59
60                 psc@2800 {              // PSC5
61                         status = "disabled";
62                 };
63
64                 psc@2c00 {              // PSC6
65                         status = "disabled";
66                 };
67
68                 // PSC2 in ac97 mode example
69                 //ac97@2200 {           // PSC2
70                 //      compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
71                 //      cell-index = <1>;
72                 //};
73
74                 // PSC3 in CODEC mode example
75                 //i2s@2400 {            // PSC3
76                 //      compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible
77                 //      cell-index = <2>;
78                 //};
79
80                 // PSC6 in spi mode example
81                 //spi@2c00 {            // PSC6
82                 //      compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
83                 //      cell-index = <5>;
84                 //};
85
86                 ethernet@3000 {
87                         phy-handle = <&phy0>;
88                 };
89
90                 mdio@3000 {
91                         phy0: ethernet-phy@0 {
92                                 reg = <0>;
93                         };
94                 };
95
96                 i2c@3d40 {
97                         eeprom@50 {
98                                 compatible = "atmel,24c02";
99                                 reg = <0x50>;
100                         };
101                 };
102
103                 sram@8000 {
104                         compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
105                         reg = <0x8000 0x4000>;
106                 };
107         };
108
109         pci@f0000d00 {
110                 interrupt-map-mask = <0xf800 0 0 7>;
111                 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
112                                  0xc000 0 0 2 &mpc5200_pic 1 1 3
113                                  0xc000 0 0 3 &mpc5200_pic 1 2 3
114                                  0xc000 0 0 4 &mpc5200_pic 1 3 3
115
116                                  0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
117                                  0xc800 0 0 2 &mpc5200_pic 1 2 3
118                                  0xc800 0 0 3 &mpc5200_pic 1 3 3
119                                  0xc800 0 0 4 &mpc5200_pic 0 0 3>;
120                 clock-frequency = <0>; // From boot loader
121                 interrupts = <2 8 0 2 9 0 2 10 0>;
122                 bus-range = <0 0>;
123                 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
124                           0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
125                           0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
126         };
127
128         localbus {
129                 ranges = <0 0 0xfe000000 0x02000000>;
130
131                 flash@0,0 {
132                         compatible = "cfi-flash";
133                         reg = <0 0 0x02000000>;
134                         bank-width = <1>;
135                         #size-cells = <1>;
136                         #address-cells = <1>;
137
138                         partition@0 {
139                                 label = "kernel";
140                                 reg = <0x00000000 0x00200000>;
141                         };
142                         partition@200000 {
143                                 label = "rootfs";
144                                 reg = <0x00200000 0x01d00000>;
145                         };
146                         partition@1f00000 {
147                                 label = "u-boot";
148                                 reg = <0x01f00000 0x00060000>;
149                         };
150                         partition@1f60000 {
151                                 label = "u-boot-env";
152                                 reg = <0x01f60000 0x00020000>;
153                         };
154                         partition@1f80000 {
155                                 label = "dtb";
156                                 reg = <0x01f80000 0x00080000>;
157                         };
158                 };
159         };
160
161 };