kernel/arch/powerpc/boot/dts/kmcoge4.dts

   1 /*
   2  * Keymile kmcoge4 Device Tree Source, based on the P2041RDB DTS
   3  *
   4  * (C) Copyright 2014
   5  * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
   6  *
   7  * Copyright 2011 Freescale Semiconductor Inc.
   8  *
   9  * This program is free software; you can redistribute  it and/or modify it
  10  * under  the terms of  the GNU General  Public License as published by the
  11  * Free Software Foundation;  either version 2 of the  License, or (at your
  12  * option) any later version.
  13  */
  14
  15 /include/ "fsl/p2041si-pre.dtsi"
  16
  17 / {
  18         model = "keymile,kmcoge4";
  19         compatible = "keymile,kmcoge4", "keymile,kmp204x";
  20         #address-cells = <2>;
  21         #size-cells = <2>;
  22         interrupt-parent = <&mpic>;
  23
  24         memory {
  25                 device_type = "memory";
  26         };
  27
  28         reserved-memory {
  29                 #address-cells = <2>;
  30                 #size-cells = <2>;
  31                 ranges;
  32
  33                 bman_fbpr: bman-fbpr {
  34                         size = <0 0x1000000>;
  35                         alignment = <0 0x1000000>;
  36                 };
  37         };
  38
  39         dcsr: dcsr@f00000000 {
  40                 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
  41         };
  42
  43         bportals: bman-portals@ff4000000 {
  44                 ranges = <0x0 0xf 0xf4000000 0x200000>;
  45         };
  46
  47         soc: soc@ffe000000 {
  48                 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
  49                 reg = <0xf 0xfe000000 0 0x00001000>;
  50                 spi@110000 {
  51                         flash@0 {
  52                                 #address-cells = <1>;
  53                                 #size-cells = <1>;
  54                                 compatible = "spansion,s25fl256s1";
  55                                 reg = <0>;
  56                                 spi-max-frequency = <20000000>; /* input clock */
  57                         };
  58
  59                         network_clock@1 {
  60                                 compatible = "zarlink,zl30343";
  61                                 reg = <1>;
  62                                 spi-max-frequency = <8000000>;
  63                         };
  64
  65                         flash@2 {
  66                                 #address-cells = <1>;
  67                                 #size-cells = <1>;
  68                                 compatible = "micron,m25p32";
  69                                 reg = <2>;
  70                                 spi-max-frequency = <15000000>;
  71                         };
  72                 };
  73
  74                 i2c@119000 {
  75                         status = "disabled";
  76                 };
  77
  78                 i2c@119100 {
  79                         status = "disabled";
  80                 };
  81
  82                 usb0: usb@210000 {
  83                         status = "disabled";
  84                 };
  85
  86                 usb1: usb@211000 {
  87                         status = "disabled";
  88                 };
  89
  90                 sata@220000 {
  91                         status = "disabled";
  92                 };
  93
  94                 sata@221000 {
  95                         status = "disabled";
  96                 };
  97         };
  98
  99         rio: rapidio@ffe0c0000 {
 100                 status = "disabled";
 101         };
 102
 103         lbc: localbus@ffe124000 {
 104                 reg = <0xf 0xfe124000 0 0x1000>;
 105                 ranges = <0 0 0xf 0xffa00000 0x00040000         /* LB 0 */
 106                           1 0 0xf 0xfb000000 0x00010000         /* LB 1 */
 107                           2 0 0xf 0xd0000000 0x10000000         /* LB 2 */
 108                           3 0 0xf 0xe0000000 0x10000000>;       /* LB 3 */
 109
 110                 nand@0,0 {
 111                         #address-cells = <1>;
 112                         #size-cells = <1>;
 113                         compatible = "fsl,elbc-fcm-nand";
 114                         reg = <0 0 0x40000>;
 115                 };
 116
 117                 board-control@1,0 {
 118                         compatible = "keymile,qriox";
 119                         reg = <1 0 0x80>;
 120                 };
 121
 122                 chassis-mgmt@3,0 {
 123                         compatible = "keymile,bfticu";
 124                         interrupt-controller;
 125                         #interrupt-cells = <2>;
 126                         reg = <3 0 0x100>;
 127                         interrupt-parent = <&mpic>;
 128                         interrupts = <6 1 0 0>;
 129                 };
 130         };
 131
 132         pci0: pcie@ffe200000 {
 133                 reg = <0xf 0xfe200000 0 0x1000>;
 134                 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
 135                           0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
 136                 pcie@0 {
 137                         ranges = <0x02000000 0 0xe0000000
 138                                   0x02000000 0 0xe0000000
 139                                   0 0x20000000
 140
 141                                   0x01000000 0 0x00000000
 142                                   0x01000000 0 0x00000000
 143                                   0 0x00010000>;
 144                 };
 145         };
 146
 147         pci1: pcie@ffe201000 {
 148                 status = "disabled";
 149         };
 150
 151         pci2: pcie@ffe202000 {
 152                 reg = <0xf 0xfe202000 0 0x1000>;
 153                 ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x20000000
 154                           0x01000000 0 0x00000000 0xf 0xf8010000 0 0x00010000>;
 155                 pcie@0 {
 156                         ranges = <0x02000000 0 0xe0000000
 157                                   0x02000000 0 0xe0000000
 158                                   0 0x20000000
 159
 160                                   0x01000000 0 0x00000000
 161                                   0x01000000 0 0x00000000
 162                                   0 0x00010000>;
 163                 };
 164         };
 165 };
 166
 167 /include/ "fsl/p2041si-post.dtsi"