kernel/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi

   1 /*
   2  * T4240 Silicon/SoC Device Tree Source (post include)
   3  *
   4  * Copyright 2012 - 2014 Freescale Semiconductor Inc.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are met:
   8  *     * Redistributions of source code must retain the above copyright
   9  *       notice, this list of conditions and the following disclaimer.
  10  *     * Redistributions in binary form must reproduce the above copyright
  11  *       notice, this list of conditions and the following disclaimer in the
  12  *       documentation and/or other materials provided with the distribution.
  13  *     * Neither the name of Freescale Semiconductor nor the
  14  *       names of its contributors may be used to endorse or promote products
  15  *       derived from this software without specific prior written permission.
  16  *
  17  *
  18  * ALTERNATIVELY, this software may be distributed under the terms of the
  19  * GNU General Public License ("GPL") as published by the Free Software
  20  * Foundation, either version 2 of that License or (at your option) any
  21  * later version.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34
  35 &bman_fbpr {
  36         compatible = "fsl,bman-fbpr";
  37         alloc-ranges = <0 0 0x10000 0>;
  38 };
  39
  40 &ifc {
  41         #address-cells = <2>;
  42         #size-cells = <1>;
  43         compatible = "fsl,ifc", "simple-bus";
  44         interrupts = <25 2 0 0>;
  45 };
  46
  47 /* controller at 0x240000 */
  48 &pci0 {
  49         compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
  50         device_type = "pci";
  51         #size-cells = <2>;
  52         #address-cells = <3>;
  53         bus-range = <0x0 0xff>;
  54         interrupts = <20 2 0 0>;
  55         pcie@0 {
  56                 #interrupt-cells = <1>;
  57                 #size-cells = <2>;
  58                 #address-cells = <3>;
  59                 device_type = "pci";
  60                 reg = <0 0 0 0 0>;
  61                 interrupts = <20 2 0 0>;
  62                 interrupt-map-mask = <0xf800 0 0 7>;
  63                 interrupt-map = <
  64                         /* IDSEL 0x0 */
  65                         0000 0 0 1 &mpic 40 1 0 0
  66                         0000 0 0 2 &mpic 1 1 0 0
  67                         0000 0 0 3 &mpic 2 1 0 0
  68                         0000 0 0 4 &mpic 3 1 0 0
  69                         >;
  70         };
  71 };
  72
  73 /* controller at 0x250000 */
  74 &pci1 {
  75         compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
  76         device_type = "pci";
  77         #size-cells = <2>;
  78         #address-cells = <3>;
  79         bus-range = <0 0xff>;
  80         interrupts = <21 2 0 0>;
  81         pcie@0 {
  82                 #interrupt-cells = <1>;
  83                 #size-cells = <2>;
  84                 #address-cells = <3>;
  85                 device_type = "pci";
  86                 reg = <0 0 0 0 0>;
  87                 interrupts = <21 2 0 0>;
  88                 interrupt-map-mask = <0xf800 0 0 7>;
  89                 interrupt-map = <
  90                         /* IDSEL 0x0 */
  91                         0000 0 0 1 &mpic 41 1 0 0
  92                         0000 0 0 2 &mpic 5 1 0 0
  93                         0000 0 0 3 &mpic 6 1 0 0
  94                         0000 0 0 4 &mpic 7 1 0 0
  95                         >;
  96         };
  97 };
  98
  99 /* controller at 0x260000 */
 100 &pci2 {
 101         compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
 102         device_type = "pci";
 103         #size-cells = <2>;
 104         #address-cells = <3>;
 105         bus-range = <0x0 0xff>;
 106         interrupts = <22 2 0 0>;
 107         pcie@0 {
 108                 #interrupt-cells = <1>;
 109                 #size-cells = <2>;
 110                 #address-cells = <3>;
 111                 device_type = "pci";
 112                 reg = <0 0 0 0 0>;
 113                 interrupts = <22 2 0 0>;
 114                 interrupt-map-mask = <0xf800 0 0 7>;
 115                 interrupt-map = <
 116                         /* IDSEL 0x0 */
 117                         0000 0 0 1 &mpic 42 1 0 0
 118                         0000 0 0 2 &mpic 9 1 0 0
 119                         0000 0 0 3 &mpic 10 1 0 0
 120                         0000 0 0 4 &mpic 11 1 0 0
 121                         >;
 122         };
 123 };
 124
 125 /* controller at 0x270000 */
 126 &pci3 {
 127         compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
 128         device_type = "pci";
 129         #size-cells = <2>;
 130         #address-cells = <3>;
 131         bus-range = <0x0 0xff>;
 132         interrupts = <23 2 0 0>;
 133         pcie@0 {
 134                 #interrupt-cells = <1>;
 135                 #size-cells = <2>;
 136                 #address-cells = <3>;
 137                 device_type = "pci";
 138                 reg = <0 0 0 0 0>;
 139                 interrupts = <23 2 0 0>;
 140                 interrupt-map-mask = <0xf800 0 0 7>;
 141                 interrupt-map = <
 142                         /* IDSEL 0x0 */
 143                         0000 0 0 1 &mpic 43 1 0 0
 144                         0000 0 0 2 &mpic 0 1 0 0
 145                         0000 0 0 3 &mpic 4 1 0 0
 146                         0000 0 0 4 &mpic 8 1 0 0
 147                         >;
 148         };
 149 };
 150
 151 &rio {
 152         compatible = "fsl,srio";
 153         interrupts = <16 2 1 11>;
 154         #address-cells = <2>;
 155         #size-cells = <2>;
 156         ranges;
 157
 158         port1 {
 159                 #address-cells = <2>;
 160                 #size-cells = <2>;
 161                 cell-index = <1>;
 162         };
 163
 164         port2 {
 165                 #address-cells = <2>;
 166                 #size-cells = <2>;
 167                 cell-index = <2>;
 168         };
 169 };
 170
 171 &dcsr {
 172         #address-cells = <1>;
 173         #size-cells = <1>;
 174         compatible = "fsl,dcsr", "simple-bus";
 175
 176         dcsr-epu@0 {
 177                 compatible = "fsl,t4240-dcsr-epu", "fsl,dcsr-epu";
 178                 interrupts = <52 2 0 0
 179                               84 2 0 0
 180                               85 2 0 0
 181                               94 2 0 0
 182                               95 2 0 0>;
 183                 reg = <0x0 0x1000>;
 184         };
 185         dcsr-npc {
 186                 compatible = "fsl,t4240-dcsr-cnpc", "fsl,dcsr-cnpc";
 187                 reg = <0x1000 0x1000 0x1002000 0x10000>;
 188         };
 189         dcsr-nxc@2000 {
 190                 compatible = "fsl,dcsr-nxc";
 191                 reg = <0x2000 0x1000>;
 192         };
 193         dcsr-corenet {
 194                 compatible = "fsl,dcsr-corenet";
 195                 reg = <0x8000 0x1000 0x1A000 0x1000>;
 196         };
 197         dcsr-dpaa@9000 {
 198                 compatible = "fsl,t4240-dcsr-dpaa", "fsl,dcsr-dpaa";
 199                 reg = <0x9000 0x1000>;
 200         };
 201         dcsr-ocn@11000 {
 202                 compatible = "fsl,t4240-dcsr-ocn", "fsl,dcsr-ocn";
 203                 reg = <0x11000 0x1000>;
 204         };
 205         dcsr-ddr@12000 {
 206                 compatible = "fsl,dcsr-ddr";
 207                 dev-handle = <&ddr1>;
 208                 reg = <0x12000 0x1000>;
 209         };
 210         dcsr-ddr@13000 {
 211                 compatible = "fsl,dcsr-ddr";
 212                 dev-handle = <&ddr2>;
 213                 reg = <0x13000 0x1000>;
 214         };
 215         dcsr-ddr@14000 {
 216                 compatible = "fsl,dcsr-ddr";
 217                 dev-handle = <&ddr3>;
 218                 reg = <0x14000 0x1000>;
 219         };
 220         dcsr-nal@18000 {
 221                 compatible = "fsl,t4240-dcsr-nal", "fsl,dcsr-nal";
 222                 reg = <0x18000 0x1000>;
 223         };
 224         dcsr-rcpm@22000 {
 225                 compatible = "fsl,t4240-dcsr-rcpm", "fsl,dcsr-rcpm";
 226                 reg = <0x22000 0x1000>;
 227         };
 228         dcsr-snpc@30000 {
 229                 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc";
 230                 reg = <0x30000 0x1000 0x1022000 0x10000>;
 231         };
 232         dcsr-snpc@31000 {
 233                 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc";
 234                 reg = <0x31000 0x1000 0x1042000 0x10000>;
 235         };
 236         dcsr-snpc@32000 {
 237                 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc";
 238                 reg = <0x32000 0x1000 0x1062000 0x10000>;
 239         };
 240         dcsr-cpu-sb-proxy@100000 {
 241                 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 242                 cpu-handle = <&cpu0>;
 243                 reg = <0x100000 0x1000 0x101000 0x1000>;
 244         };
 245         dcsr-cpu-sb-proxy@108000 {
 246                 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 247                 cpu-handle = <&cpu1>;
 248                 reg = <0x108000 0x1000 0x109000 0x1000>;
 249         };
 250         dcsr-cpu-sb-proxy@110000 {
 251                 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 252                 cpu-handle = <&cpu2>;
 253                 reg = <0x110000 0x1000 0x111000 0x1000>;
 254         };
 255         dcsr-cpu-sb-proxy@118000 {
 256                 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 257                 cpu-handle = <&cpu3>;
 258                 reg = <0x118000 0x1000 0x119000 0x1000>;
 259         };
 260         dcsr-cpu-sb-proxy@120000 {
 261                 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 262                 cpu-handle = <&cpu4>;
 263                 reg = <0x120000 0x1000 0x121000 0x1000>;
 264         };
 265         dcsr-cpu-sb-proxy@128000 {
 266                 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 267                 cpu-handle = <&cpu5>;
 268                 reg = <0x128000 0x1000 0x129000 0x1000>;
 269         };
 270         dcsr-cpu-sb-proxy@130000 {
 271                 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 272                 cpu-handle = <&cpu6>;
 273                 reg = <0x130000 0x1000 0x131000 0x1000>;
 274         };
 275         dcsr-cpu-sb-proxy@138000 {
 276                 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 277                 cpu-handle = <&cpu7>;
 278                 reg = <0x138000 0x1000 0x139000 0x1000>;
 279         };
 280         dcsr-cpu-sb-proxy@140000 {
 281                 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 282                 cpu-handle = <&cpu8>;
 283                 reg = <0x140000 0x1000 0x141000 0x1000>;
 284         };
 285         dcsr-cpu-sb-proxy@148000 {
 286                 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 287                 cpu-handle = <&cpu9>;
 288                 reg = <0x148000 0x1000 0x149000 0x1000>;
 289         };
 290         dcsr-cpu-sb-proxy@150000 {
 291                 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 292                 cpu-handle = <&cpu10>;
 293                 reg = <0x150000 0x1000 0x151000 0x1000>;
 294         };
 295         dcsr-cpu-sb-proxy@158000 {
 296                 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 297                 cpu-handle = <&cpu11>;
 298                 reg = <0x158000 0x1000 0x159000 0x1000>;
 299         };
 300 };
 301
 302 &bportals {
 303         #address-cells = <0x1>;
 304         #size-cells = <0x1>;
 305         compatible = "simple-bus";
 306
 307         bman-portal@0 {
 308                 compatible = "fsl,bman-portal";
 309                 reg = <0x0 0x4000>, <0x1000000 0x1000>;
 310                 interrupts = <105 2 0 0>;
 311         };
 312         bman-portal@4000 {
 313                 compatible = "fsl,bman-portal";
 314                 reg = <0x4000 0x4000>, <0x1001000 0x1000>;
 315                 interrupts = <107 2 0 0>;
 316         };
 317         bman-portal@8000 {
 318                 compatible = "fsl,bman-portal";
 319                 reg = <0x8000 0x4000>, <0x1002000 0x1000>;
 320                 interrupts = <109 2 0 0>;
 321         };
 322         bman-portal@c000 {
 323                 compatible = "fsl,bman-portal";
 324                 reg = <0xc000 0x4000>, <0x1003000 0x1000>;
 325                 interrupts = <111 2 0 0>;
 326         };
 327         bman-portal@10000 {
 328                 compatible = "fsl,bman-portal";
 329                 reg = <0x10000 0x4000>, <0x1004000 0x1000>;
 330                 interrupts = <113 2 0 0>;
 331         };
 332         bman-portal@14000 {
 333                 compatible = "fsl,bman-portal";
 334                 reg = <0x14000 0x4000>, <0x1005000 0x1000>;
 335                 interrupts = <115 2 0 0>;
 336         };
 337         bman-portal@18000 {
 338                 compatible = "fsl,bman-portal";
 339                 reg = <0x18000 0x4000>, <0x1006000 0x1000>;
 340                 interrupts = <117 2 0 0>;
 341         };
 342         bman-portal@1c000 {
 343                 compatible = "fsl,bman-portal";
 344                 reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
 345                 interrupts = <119 2 0 0>;
 346         };
 347         bman-portal@20000 {
 348                 compatible = "fsl,bman-portal";
 349                 reg = <0x20000 0x4000>, <0x1008000 0x1000>;
 350                 interrupts = <121 2 0 0>;
 351         };
 352         bman-portal@24000 {
 353                 compatible = "fsl,bman-portal";
 354                 reg = <0x24000 0x4000>, <0x1009000 0x1000>;
 355                 interrupts = <123 2 0 0>;
 356         };
 357         bman-portal@28000 {
 358                 compatible = "fsl,bman-portal";
 359                 reg = <0x28000 0x4000>, <0x100a000 0x1000>;
 360                 interrupts = <125 2 0 0>;
 361         };
 362         bman-portal@2c000 {
 363                 compatible = "fsl,bman-portal";
 364                 reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
 365                 interrupts = <127 2 0 0>;
 366         };
 367         bman-portal@30000 {
 368                 compatible = "fsl,bman-portal";
 369                 reg = <0x30000 0x4000>, <0x100c000 0x1000>;
 370                 interrupts = <129 2 0 0>;
 371         };
 372         bman-portal@34000 {
 373                 compatible = "fsl,bman-portal";
 374                 reg = <0x34000 0x4000>, <0x100d000 0x1000>;
 375                 interrupts = <131 2 0 0>;
 376         };
 377         bman-portal@38000 {
 378                 compatible = "fsl,bman-portal";
 379                 reg = <0x38000 0x4000>, <0x100e000 0x1000>;
 380                 interrupts = <133 2 0 0>;
 381         };
 382         bman-portal@3c000 {
 383                 compatible = "fsl,bman-portal";
 384                 reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
 385                 interrupts = <135 2 0 0>;
 386         };
 387         bman-portal@40000 {
 388                 compatible = "fsl,bman-portal";
 389                 reg = <0x40000 0x4000>, <0x1010000 0x1000>;
 390                 interrupts = <137 2 0 0>;
 391         };
 392         bman-portal@44000 {
 393                 compatible = "fsl,bman-portal";
 394                 reg = <0x44000 0x4000>, <0x1011000 0x1000>;
 395                 interrupts = <139 2 0 0>;
 396         };
 397         bman-portal@48000 {
 398                 compatible = "fsl,bman-portal";
 399                 reg = <0x48000 0x4000>, <0x1012000 0x1000>;
 400                 interrupts = <141 2 0 0>;
 401         };
 402         bman-portal@4c000 {
 403                 compatible = "fsl,bman-portal";
 404                 reg = <0x4c000 0x4000>, <0x1013000 0x1000>;
 405                 interrupts = <143 2 0 0>;
 406         };
 407         bman-portal@50000 {
 408                 compatible = "fsl,bman-portal";
 409                 reg = <0x50000 0x4000>, <0x1014000 0x1000>;
 410                 interrupts = <145 2 0 0>;
 411         };
 412         bman-portal@54000 {
 413                 compatible = "fsl,bman-portal";
 414                 reg = <0x54000 0x4000>, <0x1015000 0x1000>;
 415                 interrupts = <147 2 0 0>;
 416         };
 417         bman-portal@58000 {
 418                 compatible = "fsl,bman-portal";
 419                 reg = <0x58000 0x4000>, <0x1016000 0x1000>;
 420                 interrupts = <149 2 0 0>;
 421         };
 422         bman-portal@5c000 {
 423                 compatible = "fsl,bman-portal";
 424                 reg = <0x5c000 0x4000>, <0x1017000 0x1000>;
 425                 interrupts = <151 2 0 0>;
 426         };
 427         bman-portal@60000 {
 428                 compatible = "fsl,bman-portal";
 429                 reg = <0x60000 0x4000>, <0x1018000 0x1000>;
 430                 interrupts = <153 2 0 0>;
 431         };
 432         bman-portal@64000 {
 433                 compatible = "fsl,bman-portal";
 434                 reg = <0x64000 0x4000>, <0x1019000 0x1000>;
 435                 interrupts = <155 2 0 0>;
 436         };
 437         bman-portal@68000 {
 438                 compatible = "fsl,bman-portal";
 439                 reg = <0x68000 0x4000>, <0x101a000 0x1000>;
 440                 interrupts = <157 2 0 0>;
 441         };
 442         bman-portal@6c000 {
 443                 compatible = "fsl,bman-portal";
 444                 reg = <0x6c000 0x4000>, <0x101b000 0x1000>;
 445                 interrupts = <159 2 0 0>;
 446         };
 447         bman-portal@70000 {
 448                 compatible = "fsl,bman-portal";
 449                 reg = <0x70000 0x4000>, <0x101c000 0x1000>;
 450                 interrupts = <161 2 0 0>;
 451         };
 452         bman-portal@74000 {
 453                 compatible = "fsl,bman-portal";
 454                 reg = <0x74000 0x4000>, <0x101d000 0x1000>;
 455                 interrupts = <163 2 0 0>;
 456         };
 457         bman-portal@78000 {
 458                 compatible = "fsl,bman-portal";
 459                 reg = <0x78000 0x4000>, <0x101e000 0x1000>;
 460                 interrupts = <165 2 0 0>;
 461         };
 462         bman-portal@7c000 {
 463                 compatible = "fsl,bman-portal";
 464                 reg = <0x7c000 0x4000>, <0x101f000 0x1000>;
 465                 interrupts = <167 2 0 0>;
 466         };
 467         bman-portal@80000 {
 468                 compatible = "fsl,bman-portal";
 469                 reg = <0x80000 0x4000>, <0x1020000 0x1000>;
 470                 interrupts = <169 2 0 0>;
 471         };
 472         bman-portal@84000 {
 473                 compatible = "fsl,bman-portal";
 474                 reg = <0x84000 0x4000>, <0x1021000 0x1000>;
 475                 interrupts = <171 2 0 0>;
 476         };
 477         bman-portal@88000 {
 478                 compatible = "fsl,bman-portal";
 479                 reg = <0x88000 0x4000>, <0x1022000 0x1000>;
 480                 interrupts = <173 2 0 0>;
 481         };
 482         bman-portal@8c000 {
 483                 compatible = "fsl,bman-portal";
 484                 reg = <0x8c000 0x4000>, <0x1023000 0x1000>;
 485                 interrupts = <175 2 0 0>;
 486         };
 487         bman-portal@90000 {
 488                 compatible = "fsl,bman-portal";
 489                 reg = <0x90000 0x4000>, <0x1024000 0x1000>;
 490                 interrupts = <385 2 0 0>;
 491         };
 492         bman-portal@94000 {
 493                 compatible = "fsl,bman-portal";
 494                 reg = <0x94000 0x4000>, <0x1025000 0x1000>;
 495                 interrupts = <387 2 0 0>;
 496         };
 497         bman-portal@98000 {
 498                 compatible = "fsl,bman-portal";
 499                 reg = <0x98000 0x4000>, <0x1026000 0x1000>;
 500                 interrupts = <389 2 0 0>;
 501         };
 502         bman-portal@9c000 {
 503                 compatible = "fsl,bman-portal";
 504                 reg = <0x9c000 0x4000>, <0x1027000 0x1000>;
 505                 interrupts = <391 2 0 0>;
 506         };
 507         bman-portal@a0000 {
 508                 compatible = "fsl,bman-portal";
 509                 reg = <0xa0000 0x4000>, <0x1028000 0x1000>;
 510                 interrupts = <393 2 0 0>;
 511         };
 512         bman-portal@a4000 {
 513                 compatible = "fsl,bman-portal";
 514                 reg = <0xa4000 0x4000>, <0x1029000 0x1000>;
 515                 interrupts = <395 2 0 0>;
 516         };
 517         bman-portal@a8000 {
 518                 compatible = "fsl,bman-portal";
 519                 reg = <0xa8000 0x4000>, <0x102a000 0x1000>;
 520                 interrupts = <397 2 0 0>;
 521         };
 522         bman-portal@ac000 {
 523                 compatible = "fsl,bman-portal";
 524                 reg = <0xac000 0x4000>, <0x102b000 0x1000>;
 525                 interrupts = <399 2 0 0>;
 526         };
 527         bman-portal@b0000 {
 528                 compatible = "fsl,bman-portal";
 529                 reg = <0xb0000 0x4000>, <0x102c000 0x1000>;
 530                 interrupts = <401 2 0 0>;
 531         };
 532         bman-portal@b4000 {
 533                 compatible = "fsl,bman-portal";
 534                 reg = <0xb4000 0x4000>, <0x102d000 0x1000>;
 535                 interrupts = <403 2 0 0>;
 536         };
 537         bman-portal@b8000 {
 538                 compatible = "fsl,bman-portal";
 539                 reg = <0xb8000 0x4000>, <0x102e000 0x1000>;
 540                 interrupts = <405 2 0 0>;
 541         };
 542         bman-portal@bc000 {
 543                 compatible = "fsl,bman-portal";
 544                 reg = <0xbc000 0x4000>, <0x102f000 0x1000>;
 545                 interrupts = <407 2 0 0>;
 546         };
 547         bman-portal@c0000 {
 548                 compatible = "fsl,bman-portal";
 549                 reg = <0xc0000 0x4000>, <0x1030000 0x1000>;
 550                 interrupts = <409 2 0 0>;
 551         };
 552         bman-portal@c4000 {
 553                 compatible = "fsl,bman-portal";
 554                 reg = <0xc4000 0x4000>, <0x1031000 0x1000>;
 555                 interrupts = <411 2 0 0>;
 556         };
 557 };
 558
 559 &soc {
 560         #address-cells = <1>;
 561         #size-cells = <1>;
 562         device_type = "soc";
 563         compatible = "simple-bus";
 564
 565         soc-sram-error {
 566                 compatible = "fsl,soc-sram-error";
 567                 interrupts = <16 2 1 29>;
 568         };
 569
 570         corenet-law@0 {
 571                 compatible = "fsl,corenet-law";
 572                 reg = <0x0 0x1000>;
 573                 fsl,num-laws = <32>;
 574         };
 575
 576         ddr1: memory-controller@8000 {
 577                 compatible = "fsl,qoriq-memory-controller-v4.7",
 578                                 "fsl,qoriq-memory-controller";
 579                 reg = <0x8000 0x1000>;
 580                 interrupts = <16 2 1 23>;
 581         };
 582
 583         ddr2: memory-controller@9000 {
 584                 compatible = "fsl,qoriq-memory-controller-v4.7",
 585                                 "fsl,qoriq-memory-controller";
 586                 reg = <0x9000 0x1000>;
 587                 interrupts = <16 2 1 22>;
 588         };
 589
 590         ddr3: memory-controller@a000 {
 591                 compatible = "fsl,qoriq-memory-controller-v4.7",
 592                                 "fsl,qoriq-memory-controller";
 593                 reg = <0xa000 0x1000>;
 594                 interrupts = <16 2 1 21>;
 595         };
 596
 597         cpc: l3-cache-controller@10000 {
 598                 compatible = "fsl,t4240-l3-cache-controller", "cache";
 599                 reg = <0x10000 0x1000
 600                        0x11000 0x1000
 601                        0x12000 0x1000>;
 602                 interrupts = <16 2 1 27
 603                               16 2 1 26
 604                               16 2 1 25>;
 605         };
 606
 607         corenet-cf@18000 {
 608                 compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
 609                 reg = <0x18000 0x1000>;
 610                 interrupts = <16 2 1 31>;
 611                 fsl,ccf-num-csdids = <32>;
 612                 fsl,ccf-num-snoopids = <32>;
 613         };
 614
 615         iommu@20000 {
 616                 compatible = "fsl,pamu-v1.0", "fsl,pamu";
 617                 reg = <0x20000 0x6000>;
 618                 fsl,portid-mapping = <0x8000>;
 619                 interrupts = <
 620                         24 2 0 0
 621                         16 2 1 30>;
 622         };
 623
 624 /include/ "qoriq-mpic4.3.dtsi"
 625
 626         guts: global-utilities@e0000 {
 627                 compatible = "fsl,t4240-device-config", "fsl,qoriq-device-config-2.0";
 628                 reg = <0xe0000 0xe00>;
 629                 fsl,has-rstcr;
 630                 fsl,liodn-bits = <12>;
 631         };
 632
 633 /include/ "qoriq-clockgen2.dtsi"
 634         global-utilities@e1000 {
 635                 compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0";
 636
 637                 pll2: pll2@840 {
 638                         #clock-cells = <1>;
 639                         reg = <0x840 0x4>;
 640                         compatible = "fsl,qoriq-core-pll-2.0";
 641                         clocks = <&sysclk>;
 642                         clock-output-names = "pll2", "pll2-div2", "pll2-div4";
 643                 };
 644
 645                 pll3: pll3@860 {
 646                         #clock-cells = <1>;
 647                         reg = <0x860 0x4>;
 648                         compatible = "fsl,qoriq-core-pll-2.0";
 649                         clocks = <&sysclk>;
 650                         clock-output-names = "pll3", "pll3-div2", "pll3-div4";
 651                 };
 652
 653                 pll4: pll4@880 {
 654                         #clock-cells = <1>;
 655                         reg = <0x880 0x4>;
 656                         compatible = "fsl,qoriq-core-pll-2.0";
 657                         clocks = <&sysclk>;
 658                         clock-output-names = "pll4", "pll4-div2", "pll4-div4";
 659                 };
 660
 661                 mux0: mux0@0 {
 662                         #clock-cells = <0>;
 663                         reg = <0x0 0x4>;
 664                         compatible = "fsl,qoriq-core-mux-2.0";
 665                         clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
 666                                 <&pll1 0>, <&pll1 1>, <&pll1 2>,
 667                                 <&pll2 0>, <&pll2 1>, <&pll2 2>;
 668                         clock-names = "pll0", "pll0-div2", "pll0-div4",
 669                                 "pll1", "pll1-div2", "pll1-div4",
 670                                 "pll2", "pll2-div2", "pll2-div4";
 671                         clock-output-names = "cmux0";
 672                 };
 673
 674                 mux1: mux1@20 {
 675                         #clock-cells = <0>;
 676                         reg = <0x20 0x4>;
 677                         compatible = "fsl,qoriq-core-mux-2.0";
 678                         clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
 679                                 <&pll1 0>, <&pll1 1>, <&pll1 2>,
 680                                 <&pll2 0>, <&pll2 1>, <&pll2 2>;
 681                         clock-names = "pll0", "pll0-div2", "pll0-div4",
 682                                 "pll1", "pll1-div2", "pll1-div4",
 683                                 "pll2", "pll2-div2", "pll2-div4";
 684                         clock-output-names = "cmux1";
 685                 };
 686
 687                 mux2: mux2@40 {
 688                         #clock-cells = <0>;
 689                         reg = <0x40 0x4>;
 690                         compatible = "fsl,qoriq-core-mux-2.0";
 691                         clocks = <&pll3 0>, <&pll3 1>, <&pll3 2>,
 692                                 <&pll4 0>, <&pll4 1>, <&pll4 2>;
 693                         clock-names = "pll3", "pll3-div2", "pll3-div4",
 694                                 "pll4", "pll4-div2", "pll4-div4";
 695                         clock-output-names = "cmux2";
 696                 };
 697         };
 698
 699         rcpm: global-utilities@e2000 {
 700                 compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2.0";
 701                 reg = <0xe2000 0x1000>;
 702         };
 703
 704         sfp: sfp@e8000 {
 705                 compatible = "fsl,t4240-sfp";
 706                 reg        = <0xe8000 0x1000>;
 707         };
 708
 709         serdes: serdes@ea000 {
 710                 compatible = "fsl,t4240-serdes";
 711                 reg        = <0xea000 0x4000>;
 712         };
 713
 714 /include/ "elo3-dma-0.dtsi"
 715 /include/ "elo3-dma-1.dtsi"
 716 /include/ "elo3-dma-2.dtsi"
 717
 718 /include/ "qoriq-espi-0.dtsi"
 719         spi@110000 {
 720                 fsl,espi-num-chipselects = <4>;
 721         };
 722
 723 /include/ "qoriq-esdhc-0.dtsi"
 724         sdhc@114000 {
 725                 compatible = "fsl,t4240-esdhc", "fsl,esdhc";
 726                 sdhci,auto-cmd12;
 727         };
 728 /include/ "qoriq-i2c-0.dtsi"
 729 /include/ "qoriq-i2c-1.dtsi"
 730 /include/ "qoriq-duart-0.dtsi"
 731 /include/ "qoriq-duart-1.dtsi"
 732 /include/ "qoriq-gpio-0.dtsi"
 733 /include/ "qoriq-gpio-1.dtsi"
 734 /include/ "qoriq-gpio-2.dtsi"
 735 /include/ "qoriq-gpio-3.dtsi"
 736 /include/ "qoriq-usb2-mph-0.dtsi"
 737                 usb0: usb@210000 {
 738                         compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph";
 739                         phy_type = "utmi";
 740                         port0;
 741                 };
 742 /include/ "qoriq-usb2-dr-0.dtsi"
 743                 usb1: usb@211000 {
 744                         compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
 745                         dr_mode = "host";
 746                         phy_type = "utmi";
 747                 };
 748 /include/ "qoriq-sata2-0.dtsi"
 749 /include/ "qoriq-sata2-1.dtsi"
 750 /include/ "qoriq-sec5.0-0.dtsi"
 751 /include/ "qoriq-bman1.dtsi"
 752
 753         L2_1: l2-cache-controller@c20000 {
 754                 compatible = "fsl,t4240-l2-cache-controller";
 755                 reg = <0xc20000 0x40000>;
 756                 next-level-cache = <&cpc>;
 757         };
 758         L2_2: l2-cache-controller@c60000 {
 759                 compatible = "fsl,t4240-l2-cache-controller";
 760                 reg = <0xc60000 0x40000>;
 761                 next-level-cache = <&cpc>;
 762         };
 763         L2_3: l2-cache-controller@ca0000 {
 764                 compatible = "fsl,t4240-l2-cache-controller";
 765                 reg = <0xca0000 0x40000>;
 766                 next-level-cache = <&cpc>;
 767         };
 768 };