kernel/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi

   1 /*
   2  * T1040 Silicon/SoC Device Tree Source (post include)
   3  *
   4  * Copyright 2013 - 2014 Freescale Semiconductor Inc.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are met:
   8  *     * Redistributions of source code must retain the above copyright
   9  *       notice, this list of conditions and the following disclaimer.
  10  *     * Redistributions in binary form must reproduce the above copyright
  11  *       notice, this list of conditions and the following disclaimer in the
  12  *       documentation and/or other materials provided with the distribution.
  13  *     * Neither the name of Freescale Semiconductor nor the
  14  *       names of its contributors may be used to endorse or promote products
  15  *       derived from this software without specific prior written permission.
  16  *
  17  *
  18  * ALTERNATIVELY, this software may be distributed under the terms of the
  19  * GNU General Public License ("GPL") as published by the Free Software
  20  * Foundation, either version 2 of that License or (at your option) any
  21  * later version.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34
  35 &bman_fbpr {
  36         compatible = "fsl,bman-fbpr";
  37         alloc-ranges = <0 0 0x10000 0>;
  38 };
  39
  40 &ifc {
  41         #address-cells = <2>;
  42         #size-cells = <1>;
  43         compatible = "fsl,ifc", "simple-bus";
  44         interrupts = <25 2 0 0>;
  45 };
  46
  47 &pci0 {
  48         compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
  49         device_type = "pci";
  50         #size-cells = <2>;
  51         #address-cells = <3>;
  52         bus-range = <0x0 0xff>;
  53         interrupts = <20 2 0 0>;
  54         fsl,iommu-parent = <&pamu0>;
  55         pcie@0 {
  56                 reg = <0 0 0 0 0>;
  57                 #interrupt-cells = <1>;
  58                 #size-cells = <2>;
  59                 #address-cells = <3>;
  60                 device_type = "pci";
  61                 interrupts = <20 2 0 0>;
  62                 interrupt-map-mask = <0xf800 0 0 7>;
  63                 interrupt-map = <
  64                         /* IDSEL 0x0 */
  65                         0000 0 0 1 &mpic 40 1 0 0
  66                         0000 0 0 2 &mpic 1 1 0 0
  67                         0000 0 0 3 &mpic 2 1 0 0
  68                         0000 0 0 4 &mpic 3 1 0 0
  69                         >;
  70         };
  71 };
  72
  73 &pci1 {
  74         compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
  75         device_type = "pci";
  76         #size-cells = <2>;
  77         #address-cells = <3>;
  78         bus-range = <0 0xff>;
  79         interrupts = <21 2 0 0>;
  80         fsl,iommu-parent = <&pamu0>;
  81         pcie@0 {
  82                 reg = <0 0 0 0 0>;
  83                 #interrupt-cells = <1>;
  84                 #size-cells = <2>;
  85                 #address-cells = <3>;
  86                 device_type = "pci";
  87                 interrupts = <21 2 0 0>;
  88                 interrupt-map-mask = <0xf800 0 0 7>;
  89                 interrupt-map = <
  90                         /* IDSEL 0x0 */
  91                         0000 0 0 1 &mpic 41 1 0 0
  92                         0000 0 0 2 &mpic 5 1 0 0
  93                         0000 0 0 3 &mpic 6 1 0 0
  94                         0000 0 0 4 &mpic 7 1 0 0
  95                         >;
  96         };
  97 };
  98
  99 &pci2 {
 100         compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
 101         device_type = "pci";
 102         #size-cells = <2>;
 103         #address-cells = <3>;
 104         bus-range = <0x0 0xff>;
 105         interrupts = <22 2 0 0>;
 106         fsl,iommu-parent = <&pamu0>;
 107         pcie@0 {
 108                 reg = <0 0 0 0 0>;
 109                 #interrupt-cells = <1>;
 110                 #size-cells = <2>;
 111                 #address-cells = <3>;
 112                 device_type = "pci";
 113                 interrupts = <22 2 0 0>;
 114                 interrupt-map-mask = <0xf800 0 0 7>;
 115                 interrupt-map = <
 116                         /* IDSEL 0x0 */
 117                         0000 0 0 1 &mpic 42 1 0 0
 118                         0000 0 0 2 &mpic 9 1 0 0
 119                         0000 0 0 3 &mpic 10 1 0 0
 120                         0000 0 0 4 &mpic 11 1 0 0
 121                         >;
 122         };
 123 };
 124
 125 &pci3 {
 126         compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
 127         device_type = "pci";
 128         #size-cells = <2>;
 129         #address-cells = <3>;
 130         bus-range = <0x0 0xff>;
 131         interrupts = <23 2 0 0>;
 132         fsl,iommu-parent = <&pamu0>;
 133         pcie@0 {
 134                 reg = <0 0 0 0 0>;
 135                 #interrupt-cells = <1>;
 136                 #size-cells = <2>;
 137                 #address-cells = <3>;
 138                 device_type = "pci";
 139                 interrupts = <23 2 0 0>;
 140                 interrupt-map-mask = <0xf800 0 0 7>;
 141                 interrupt-map = <
 142                         /* IDSEL 0x0 */
 143                         0000 0 0 1 &mpic 43 1 0 0
 144                         0000 0 0 2 &mpic 0 1 0 0
 145                         0000 0 0 3 &mpic 4 1 0 0
 146                         0000 0 0 4 &mpic 8 1 0 0
 147                         >;
 148         };
 149 };
 150
 151 &dcsr {
 152         #address-cells = <1>;
 153         #size-cells = <1>;
 154         compatible = "fsl,dcsr", "simple-bus";
 155
 156         dcsr-epu@0 {
 157                 compatible = "fsl,t1040-dcsr-epu", "fsl,dcsr-epu";
 158                 interrupts = <52 2 0 0
 159                               84 2 0 0
 160                               85 2 0 0>;
 161                 reg = <0x0 0x1000>;
 162         };
 163         dcsr-npc {
 164                 compatible = "fsl,t1040-dcsr-cnpc", "fsl,dcsr-cnpc";
 165                 reg = <0x1000 0x1000 0x1002000 0x10000>;
 166         };
 167         dcsr-nxc@2000 {
 168                 compatible = "fsl,dcsr-nxc";
 169                 reg = <0x2000 0x1000>;
 170         };
 171         dcsr-corenet {
 172                 compatible = "fsl,dcsr-corenet";
 173                 reg = <0x8000 0x1000 0x1A000 0x1000>;
 174         };
 175         dcsr-dpaa@9000 {
 176                 compatible = "fsl,t1040-dcsr-dpaa", "fsl,dcsr-dpaa";
 177                 reg = <0x9000 0x1000>;
 178         };
 179         dcsr-ocn@11000 {
 180                 compatible = "fsl,t1040-dcsr-ocn", "fsl,dcsr-ocn";
 181                 reg = <0x11000 0x1000>;
 182         };
 183         dcsr-ddr@12000 {
 184                 compatible = "fsl,dcsr-ddr";
 185                 dev-handle = <&ddr1>;
 186                 reg = <0x12000 0x1000>;
 187         };
 188         dcsr-nal@18000 {
 189                 compatible = "fsl,t1040-dcsr-nal", "fsl,dcsr-nal";
 190                 reg = <0x18000 0x1000>;
 191         };
 192         dcsr-rcpm@22000 {
 193                 compatible = "fsl,t1040-dcsr-rcpm", "fsl,dcsr-rcpm";
 194                 reg = <0x22000 0x1000>;
 195         };
 196         dcsr-snpc@30000 {
 197                 compatible = "fsl,t1040-dcsr-snpc", "fsl,dcsr-snpc";
 198                 reg = <0x30000 0x1000 0x1022000 0x10000>;
 199         };
 200         dcsr-snpc@31000 {
 201                 compatible = "fsl,t1040-dcsr-snpc", "fsl,dcsr-snpc";
 202                 reg = <0x31000 0x1000 0x1042000 0x10000>;
 203         };
 204         dcsr-cpu-sb-proxy@100000 {
 205                 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 206                 cpu-handle = <&cpu0>;
 207                 reg = <0x100000 0x1000 0x101000 0x1000>;
 208         };
 209         dcsr-cpu-sb-proxy@108000 {
 210                 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 211                 cpu-handle = <&cpu1>;
 212                 reg = <0x108000 0x1000 0x109000 0x1000>;
 213         };
 214         dcsr-cpu-sb-proxy@110000 {
 215                 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 216                 cpu-handle = <&cpu2>;
 217                 reg = <0x110000 0x1000 0x111000 0x1000>;
 218         };
 219         dcsr-cpu-sb-proxy@118000 {
 220                 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 221                 cpu-handle = <&cpu3>;
 222                 reg = <0x118000 0x1000 0x119000 0x1000>;
 223         };
 224 };
 225
 226 &bportals {
 227         #address-cells = <0x1>;
 228         #size-cells = <0x1>;
 229         compatible = "simple-bus";
 230
 231         bman-portal@0 {
 232                 compatible = "fsl,bman-portal";
 233                 reg = <0x0 0x4000>, <0x1000000 0x1000>;
 234                 interrupts = <105 2 0 0>;
 235         };
 236         bman-portal@4000 {
 237                 compatible = "fsl,bman-portal";
 238                 reg = <0x4000 0x4000>, <0x1001000 0x1000>;
 239                 interrupts = <107 2 0 0>;
 240         };
 241         bman-portal@8000 {
 242                 compatible = "fsl,bman-portal";
 243                 reg = <0x8000 0x4000>, <0x1002000 0x1000>;
 244                 interrupts = <109 2 0 0>;
 245         };
 246         bman-portal@c000 {
 247                 compatible = "fsl,bman-portal";
 248                 reg = <0xc000 0x4000>, <0x1003000 0x1000>;
 249                 interrupts = <111 2 0 0>;
 250         };
 251         bman-portal@10000 {
 252                 compatible = "fsl,bman-portal";
 253                 reg = <0x10000 0x4000>, <0x1004000 0x1000>;
 254                 interrupts = <113 2 0 0>;
 255         };
 256         bman-portal@14000 {
 257                 compatible = "fsl,bman-portal";
 258                 reg = <0x14000 0x4000>, <0x1005000 0x1000>;
 259                 interrupts = <115 2 0 0>;
 260         };
 261         bman-portal@18000 {
 262                 compatible = "fsl,bman-portal";
 263                 reg = <0x18000 0x4000>, <0x1006000 0x1000>;
 264                 interrupts = <117 2 0 0>;
 265         };
 266         bman-portal@1c000 {
 267                 compatible = "fsl,bman-portal";
 268                 reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
 269                 interrupts = <119 2 0 0>;
 270         };
 271         bman-portal@20000 {
 272                 compatible = "fsl,bman-portal";
 273                 reg = <0x20000 0x4000>, <0x1008000 0x1000>;
 274                 interrupts = <121 2 0 0>;
 275         };
 276         bman-portal@24000 {
 277                 compatible = "fsl,bman-portal";
 278                 reg = <0x24000 0x4000>, <0x1009000 0x1000>;
 279                 interrupts = <123 2 0 0>;
 280         };
 281 };
 282
 283 &soc {
 284         #address-cells = <1>;
 285         #size-cells = <1>;
 286         device_type = "soc";
 287         compatible = "simple-bus";
 288
 289         soc-sram-error {
 290                 compatible = "fsl,soc-sram-error";
 291                 interrupts = <16 2 1 29>;
 292         };
 293
 294         corenet-law@0 {
 295                 compatible = "fsl,corenet-law";
 296                 reg = <0x0 0x1000>;
 297                 fsl,num-laws = <16>;
 298         };
 299
 300         ddr1: memory-controller@8000 {
 301                 compatible = "fsl,qoriq-memory-controller-v5.0",
 302                                 "fsl,qoriq-memory-controller";
 303                 reg = <0x8000 0x1000>;
 304                 interrupts = <16 2 1 23>;
 305         };
 306
 307         cpc: l3-cache-controller@10000 {
 308                 compatible = "fsl,t1040-l3-cache-controller", "cache";
 309                 reg = <0x10000 0x1000>;
 310                 interrupts = <16 2 1 27>;
 311         };
 312
 313         corenet-cf@18000 {
 314                 compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
 315                 reg = <0x18000 0x1000>;
 316                 interrupts = <16 2 1 31>;
 317                 fsl,ccf-num-csdids = <32>;
 318                 fsl,ccf-num-snoopids = <32>;
 319         };
 320
 321         iommu@20000 {
 322                 compatible = "fsl,pamu-v1.0", "fsl,pamu";
 323                 reg = <0x20000 0x1000>;
 324                 ranges = <0 0x20000 0x1000>;
 325                 #address-cells = <1>;
 326                 #size-cells = <1>;
 327                 interrupts = <
 328                         24 2 0 0
 329                         16 2 1 30>;
 330                 pamu0: pamu@0 {
 331                         reg = <0 0x1000>;
 332                         fsl,primary-cache-geometry = <128 1>;
 333                         fsl,secondary-cache-geometry = <16 2>;
 334                 };
 335         };
 336
 337 /include/ "qoriq-mpic.dtsi"
 338
 339         guts: global-utilities@e0000 {
 340                 compatible = "fsl,t1040-device-config", "fsl,qoriq-device-config-2.0";
 341                 reg = <0xe0000 0xe00>;
 342                 fsl,has-rstcr;
 343                 fsl,liodn-bits = <12>;
 344         };
 345
 346 /include/ "qoriq-clockgen2.dtsi"
 347         global-utilities@e1000 {
 348                 compatible = "fsl,t1040-clockgen", "fsl,qoriq-clockgen-2.0";
 349
 350                 mux0: mux0@0 {
 351                         #clock-cells = <0>;
 352                         reg = <0x0 4>;
 353                         compatible = "fsl,qoriq-core-mux-2.0";
 354                         clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
 355                                  <&pll1 0>, <&pll1 1>, <&pll1 2>;
 356                         clock-names = "pll0", "pll0-div2", "pll1-div4",
 357                                 "pll1", "pll1-div2", "pll1-div4";
 358                         clock-output-names = "cmux0";
 359                 };
 360
 361                 mux1: mux1@20 {
 362                         #clock-cells = <0>;
 363                         reg = <0x20 4>;
 364                         compatible = "fsl,qoriq-core-mux-2.0";
 365                         clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
 366                                  <&pll1 0>, <&pll1 1>, <&pll1 2>;
 367                         clock-names = "pll0", "pll0-div2", "pll1-div4",
 368                                 "pll1", "pll1-div2", "pll1-div4";
 369                         clock-output-names = "cmux1";
 370                 };
 371
 372                 mux2: mux2@40 {
 373                         #clock-cells = <0>;
 374                         reg = <0x40 4>;
 375                         compatible = "fsl,qoriq-core-mux-2.0";
 376                         clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
 377                                  <&pll1 0>, <&pll1 1>, <&pll1 2>;
 378                         clock-names = "pll0", "pll0-div2", "pll1-div4",
 379                                 "pll1", "pll1-div2", "pll1-div4";
 380                         clock-output-names = "cmux2";
 381                 };
 382
 383                 mux3: mux3@60 {
 384                         #clock-cells = <0>;
 385                         reg = <0x60 4>;
 386                         compatible = "fsl,qoriq-core-mux-2.0";
 387                         clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
 388                                  <&pll1 0>, <&pll1 1>, <&pll1 2>;
 389                         clock-names = "pll0_0", "pll0_1", "pll0_2",
 390                                 "pll1_0", "pll1_1", "pll1_2";
 391                         clock-output-names = "cmux3";
 392                 };
 393         };
 394
 395         rcpm: global-utilities@e2000 {
 396                 compatible = "fsl,t1040-rcpm", "fsl,qoriq-rcpm-2.0";
 397                 reg = <0xe2000 0x1000>;
 398         };
 399
 400         sfp: sfp@e8000 {
 401                 compatible = "fsl,t1040-sfp";
 402                 reg        = <0xe8000 0x1000>;
 403         };
 404
 405         serdes: serdes@ea000 {
 406                 compatible = "fsl,t1040-serdes";
 407                 reg        = <0xea000 0x4000>;
 408         };
 409
 410 /include/ "elo3-dma-0.dtsi"
 411 /include/ "elo3-dma-1.dtsi"
 412 /include/ "qoriq-espi-0.dtsi"
 413         spi@110000 {
 414                 fsl,espi-num-chipselects = <4>;
 415         };
 416
 417 /include/ "qoriq-esdhc-0.dtsi"
 418         sdhc@114000 {
 419                 compatible = "fsl,t1040-esdhc", "fsl,esdhc";
 420                 fsl,iommu-parent = <&pamu0>;
 421                 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
 422                 sdhci,auto-cmd12;
 423         };
 424 /include/ "qoriq-i2c-0.dtsi"
 425 /include/ "qoriq-i2c-1.dtsi"
 426 /include/ "qoriq-duart-0.dtsi"
 427 /include/ "qoriq-duart-1.dtsi"
 428 /include/ "qoriq-gpio-0.dtsi"
 429 /include/ "qoriq-gpio-1.dtsi"
 430 /include/ "qoriq-gpio-2.dtsi"
 431 /include/ "qoriq-gpio-3.dtsi"
 432 /include/ "qoriq-usb2-mph-0.dtsi"
 433                 usb0: usb@210000 {
 434                         compatible = "fsl-usb2-mph-v2.4", "fsl-usb2-mph";
 435                         fsl,iommu-parent = <&pamu0>;
 436                         fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
 437                         phy_type = "utmi";
 438                         port0;
 439                 };
 440 /include/ "qoriq-usb2-dr-0.dtsi"
 441                 usb1: usb@211000 {
 442                         compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr";
 443                         fsl,iommu-parent = <&pamu0>;
 444                         fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
 445                         dr_mode = "host";
 446                         phy_type = "utmi";
 447                 };
 448
 449         display@180000 {
 450                 compatible = "fsl,t1040-diu", "fsl,diu";
 451                 reg = <0x180000 1000>;
 452                 interrupts = <74 2 0 0>;
 453         };
 454
 455 /include/ "qoriq-sata2-0.dtsi"
 456         sata@220000 {
 457                 fsl,iommu-parent = <&pamu0>;
 458                 fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
 459         };
 460 /include/ "qoriq-sata2-1.dtsi"
 461         sata@221000 {
 462                 fsl,iommu-parent = <&pamu0>;
 463                 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
 464         };
 465 /include/ "qoriq-sec5.0-0.dtsi"
 466 /include/ "qoriq-bman1.dtsi"
 467 };