2 * P5040 Silicon/SoC Device Tree Source (post include)
4 * Copyright 2012 - 2014 Freescale Semiconductor Inc.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
23 * This software is provided by Freescale Semiconductor "as is" and any
24 * express or implied warranties, including, but not limited to, the implied
25 * warranties of merchantability and fitness for a particular purpose are
26 * disclaimed. In no event shall Freescale Semiconductor be liable for any
27 * direct, indirect, incidental, special, exemplary, or consequential damages
28 * (including, but not limited to, procurement of substitute goods or services;
29 * loss of use, data, or profits; or business interruption) however caused and
30 * on any theory of liability, whether in contract, strict liability, or tort
31 * (including negligence or otherwise) arising in any way out of the use of this
32 * software, even if advised of the possibility of such damage.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";
42 interrupts = <25 2 0 0>;
47 /* controller at 0x200000 */
49 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
53 bus-range = <0x0 0xff>;
54 clock-frequency = <33333333>;
55 interrupts = <16 2 1 15>;
56 fsl,iommu-parent = <&pamu0>;
59 #interrupt-cells = <1>;
63 interrupts = <16 2 1 15>;
64 interrupt-map-mask = <0xf800 0 0 7>;
67 0000 0 0 1 &mpic 40 1 0 0
68 0000 0 0 2 &mpic 1 1 0 0
69 0000 0 0 3 &mpic 2 1 0 0
70 0000 0 0 4 &mpic 3 1 0 0
75 /* controller at 0x201000 */
77 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
82 clock-frequency = <33333333>;
83 interrupts = <16 2 1 14>;
84 fsl,iommu-parent = <&pamu0>;
87 #interrupt-cells = <1>;
91 interrupts = <16 2 1 14>;
92 interrupt-map-mask = <0xf800 0 0 7>;
95 0000 0 0 1 &mpic 41 1 0 0
96 0000 0 0 2 &mpic 5 1 0 0
97 0000 0 0 3 &mpic 6 1 0 0
98 0000 0 0 4 &mpic 7 1 0 0
103 /* controller at 0x202000 */
105 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
108 #address-cells = <3>;
109 bus-range = <0x0 0xff>;
110 clock-frequency = <33333333>;
111 interrupts = <16 2 1 13>;
112 fsl,iommu-parent = <&pamu0>;
115 #interrupt-cells = <1>;
117 #address-cells = <3>;
119 interrupts = <16 2 1 13>;
120 interrupt-map-mask = <0xf800 0 0 7>;
123 0000 0 0 1 &mpic 42 1 0 0
124 0000 0 0 2 &mpic 9 1 0 0
125 0000 0 0 3 &mpic 10 1 0 0
126 0000 0 0 4 &mpic 11 1 0 0
132 #address-cells = <1>;
134 compatible = "fsl,dcsr", "simple-bus";
137 compatible = "fsl,p5040-dcsr-epu", "fsl,dcsr-epu";
138 interrupts = <52 2 0 0
144 compatible = "fsl,dcsr-npc";
145 reg = <0x1000 0x1000 0x1000000 0x8000>;
148 compatible = "fsl,dcsr-nxc";
149 reg = <0x2000 0x1000>;
152 compatible = "fsl,dcsr-corenet";
153 reg = <0x8000 0x1000 0xB0000 0x1000>;
156 compatible = "fsl,p5040-dcsr-dpaa", "fsl,dcsr-dpaa";
157 reg = <0x9000 0x1000>;
160 compatible = "fsl,p5040-dcsr-ocn", "fsl,dcsr-ocn";
161 reg = <0x11000 0x1000>;
164 compatible = "fsl,dcsr-ddr";
165 dev-handle = <&ddr1>;
166 reg = <0x12000 0x1000>;
169 compatible = "fsl,dcsr-ddr";
170 dev-handle = <&ddr2>;
171 reg = <0x13000 0x1000>;
174 compatible = "fsl,p5040-dcsr-nal", "fsl,dcsr-nal";
175 reg = <0x18000 0x1000>;
178 compatible = "fsl,p5040-dcsr-rcpm", "fsl,dcsr-rcpm";
179 reg = <0x22000 0x1000>;
181 dcsr-cpu-sb-proxy@40000 {
182 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
183 cpu-handle = <&cpu0>;
184 reg = <0x40000 0x1000>;
186 dcsr-cpu-sb-proxy@41000 {
187 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
188 cpu-handle = <&cpu1>;
189 reg = <0x41000 0x1000>;
191 dcsr-cpu-sb-proxy@42000 {
192 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
193 cpu-handle = <&cpu2>;
194 reg = <0x42000 0x1000>;
196 dcsr-cpu-sb-proxy@43000 {
197 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
198 cpu-handle = <&cpu3>;
199 reg = <0x43000 0x1000>;
203 /include/ "qoriq-bman1-portals.dtsi"
206 #address-cells = <1>;
209 compatible = "simple-bus";
212 compatible = "fsl,soc-sram-error";
213 interrupts = <16 2 1 29>;
217 compatible = "fsl,corenet-law";
222 ddr1: memory-controller@8000 {
223 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
224 reg = <0x8000 0x1000>;
225 interrupts = <16 2 1 23>;
228 ddr2: memory-controller@9000 {
229 compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
230 reg = <0x9000 0x1000>;
231 interrupts = <16 2 1 22>;
234 cpc: l3-cache-controller@10000 {
235 compatible = "fsl,p5040-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
236 reg = <0x10000 0x1000
238 interrupts = <16 2 1 27
243 compatible = "fsl,corenet1-cf", "fsl,corenet-cf";
244 reg = <0x18000 0x1000>;
245 interrupts = <16 2 1 31>;
246 fsl,ccf-num-csdids = <32>;
247 fsl,ccf-num-snoopids = <32>;
251 compatible = "fsl,pamu-v1.0", "fsl,pamu";
252 reg = <0x20000 0x5000>; /* for compatibility with older PAMU drivers */
253 ranges = <0 0x20000 0x5000>;
254 #address-cells = <1>;
256 interrupts = <24 2 0 0
258 fsl,portid-mapping = <0x0f800000>;
262 fsl,primary-cache-geometry = <32 1>;
263 fsl,secondary-cache-geometry = <128 2>;
267 reg = <0x1000 0x1000>;
268 fsl,primary-cache-geometry = <32 1>;
269 fsl,secondary-cache-geometry = <128 2>;
273 reg = <0x2000 0x1000>;
274 fsl,primary-cache-geometry = <32 1>;
275 fsl,secondary-cache-geometry = <128 2>;
279 reg = <0x3000 0x1000>;
280 fsl,primary-cache-geometry = <32 1>;
281 fsl,secondary-cache-geometry = <128 2>;
285 reg = <0x4000 0x1000>;
286 fsl,primary-cache-geometry = <32 1>;
287 fsl,secondary-cache-geometry = <128 2>;
291 /include/ "qoriq-mpic.dtsi"
293 guts: global-utilities@e0000 {
294 compatible = "fsl,p5040-device-config", "fsl,qoriq-device-config-1.0";
295 reg = <0xe0000 0xe00>;
298 fsl,liodn-bits = <12>;
301 pins: global-utilities@e0e00 {
302 compatible = "fsl,p5040-pin-control", "fsl,qoriq-pin-control-1.0";
303 reg = <0xe0e00 0x200>;
307 /include/ "qoriq-clockgen1.dtsi"
308 global-utilities@e1000 {
309 compatible = "fsl,p5040-clockgen", "fsl,qoriq-clockgen-1.0";
314 compatible = "fsl,qoriq-core-mux-1.0";
315 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
316 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
317 clock-output-names = "cmux2";
323 compatible = "fsl,qoriq-core-mux-1.0";
324 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
325 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
326 clock-output-names = "cmux3";
330 rcpm: global-utilities@e2000 {
331 compatible = "fsl,p5040-rcpm", "fsl,qoriq-rcpm-1.0";
332 reg = <0xe2000 0x1000>;
337 compatible = "fsl,p5040-sfp", "fsl,qoriq-sfp-1.0";
338 reg = <0xe8000 0x1000>;
341 serdes: serdes@ea000 {
342 compatible = "fsl,p5040-serdes";
343 reg = <0xea000 0x1000>;
346 /include/ "qoriq-dma-0.dtsi"
348 fsl,iommu-parent = <&pamu0>;
349 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
352 /include/ "qoriq-dma-1.dtsi"
354 fsl,iommu-parent = <&pamu0>;
355 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
358 /include/ "qoriq-espi-0.dtsi"
360 fsl,espi-num-chipselects = <4>;
363 /include/ "qoriq-esdhc-0.dtsi"
365 fsl,iommu-parent = <&pamu2>;
366 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
370 /include/ "qoriq-i2c-0.dtsi"
371 /include/ "qoriq-i2c-1.dtsi"
372 /include/ "qoriq-duart-0.dtsi"
373 /include/ "qoriq-duart-1.dtsi"
374 /include/ "qoriq-gpio-0.dtsi"
375 /include/ "qoriq-usb2-mph-0.dtsi"
377 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
378 fsl,iommu-parent = <&pamu4>;
379 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
384 /include/ "qoriq-usb2-dr-0.dtsi"
386 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
387 fsl,iommu-parent = <&pamu4>;
388 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
393 /include/ "qoriq-sata2-0.dtsi"
395 fsl,iommu-parent = <&pamu4>;
396 fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
399 /include/ "qoriq-sata2-1.dtsi"
401 fsl,iommu-parent = <&pamu4>;
402 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
405 /include/ "qoriq-sec5.2-0.dtsi"
407 fsl,iommu-parent = <&pamu4>;
410 /include/ "qoriq-bman1.dtsi"