Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / arch / powerpc / boot / dts / fsl / p5040si-post.dtsi
1 /*
2  * P5040 Silicon/SoC Device Tree Source (post include)
3  *
4  * Copyright 2012 - 2014 Freescale Semiconductor Inc.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions are met:
8  *     * Redistributions of source code must retain the above copyright
9  *       notice, this list of conditions and the following disclaimer.
10  *     * Redistributions in binary form must reproduce the above copyright
11  *       notice, this list of conditions and the following disclaimer in the
12  *       documentation and/or other materials provided with the distribution.
13  *     * Neither the name of Freescale Semiconductor nor the
14  *       names of its contributors may be used to endorse or promote products
15  *       derived from this software without specific prior written permission.
16  *
17  *
18  * ALTERNATIVELY, this software may be distributed under the terms of the
19  * GNU General Public License ("GPL") as published by the Free Software
20  * Foundation, either version 2 of that License or (at your option) any
21  * later version.
22  *
23  * This software is provided by Freescale Semiconductor "as is" and any
24  * express or implied warranties, including, but not limited to, the implied
25  * warranties of merchantability and fitness for a particular purpose are
26  * disclaimed. In no event shall Freescale Semiconductor be liable for any
27  * direct, indirect, incidental, special, exemplary, or consequential damages
28  * (including, but not limited to, procurement of substitute goods or services;
29  * loss of use, data, or profits; or business interruption) however caused and
30  * on any theory of liability, whether in contract, strict liability, or tort
31  * (including negligence or otherwise) arising in any way out of the use of this
32  * software, even if advised of the possibility of such damage.
33  */
34
35 &bman_fbpr {
36         compatible = "fsl,bman-fbpr";
37         alloc-ranges = <0 0 0x10000 0>;
38 };
39
40 &lbc {
41         compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";
42         interrupts = <25 2 0 0>;
43         #address-cells = <2>;
44         #size-cells = <1>;
45 };
46
47 /* controller at 0x200000 */
48 &pci0 {
49         compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
50         device_type = "pci";
51         #size-cells = <2>;
52         #address-cells = <3>;
53         bus-range = <0x0 0xff>;
54         clock-frequency = <33333333>;
55         interrupts = <16 2 1 15>;
56         fsl,iommu-parent = <&pamu0>;
57         pcie@0 {
58                 reg = <0 0 0 0 0>;
59                 #interrupt-cells = <1>;
60                 #size-cells = <2>;
61                 #address-cells = <3>;
62                 device_type = "pci";
63                 interrupts = <16 2 1 15>;
64                 interrupt-map-mask = <0xf800 0 0 7>;
65                 interrupt-map = <
66                         /* IDSEL 0x0 */
67                         0000 0 0 1 &mpic 40 1 0 0
68                         0000 0 0 2 &mpic 1 1 0 0
69                         0000 0 0 3 &mpic 2 1 0 0
70                         0000 0 0 4 &mpic 3 1 0 0
71                         >;
72         };
73 };
74
75 /* controller at 0x201000 */
76 &pci1 {
77         compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
78         device_type = "pci";
79         #size-cells = <2>;
80         #address-cells = <3>;
81         bus-range = <0 0xff>;
82         clock-frequency = <33333333>;
83         interrupts = <16 2 1 14>;
84         fsl,iommu-parent = <&pamu0>;
85         pcie@0 {
86                 reg = <0 0 0 0 0>;
87                 #interrupt-cells = <1>;
88                 #size-cells = <2>;
89                 #address-cells = <3>;
90                 device_type = "pci";
91                 interrupts = <16 2 1 14>;
92                 interrupt-map-mask = <0xf800 0 0 7>;
93                 interrupt-map = <
94                         /* IDSEL 0x0 */
95                         0000 0 0 1 &mpic 41 1 0 0
96                         0000 0 0 2 &mpic 5 1 0 0
97                         0000 0 0 3 &mpic 6 1 0 0
98                         0000 0 0 4 &mpic 7 1 0 0
99                         >;
100         };
101 };
102
103 /* controller at 0x202000 */
104 &pci2 {
105         compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
106         device_type = "pci";
107         #size-cells = <2>;
108         #address-cells = <3>;
109         bus-range = <0x0 0xff>;
110         clock-frequency = <33333333>;
111         interrupts = <16 2 1 13>;
112         fsl,iommu-parent = <&pamu0>;
113         pcie@0 {
114                 reg = <0 0 0 0 0>;
115                 #interrupt-cells = <1>;
116                 #size-cells = <2>;
117                 #address-cells = <3>;
118                 device_type = "pci";
119                 interrupts = <16 2 1 13>;
120                 interrupt-map-mask = <0xf800 0 0 7>;
121                 interrupt-map = <
122                         /* IDSEL 0x0 */
123                         0000 0 0 1 &mpic 42 1 0 0
124                         0000 0 0 2 &mpic 9 1 0 0
125                         0000 0 0 3 &mpic 10 1 0 0
126                         0000 0 0 4 &mpic 11 1 0 0
127                         >;
128         };
129 };
130
131 &dcsr {
132         #address-cells = <1>;
133         #size-cells = <1>;
134         compatible = "fsl,dcsr", "simple-bus";
135
136         dcsr-epu@0 {
137                 compatible = "fsl,p5040-dcsr-epu", "fsl,dcsr-epu";
138                 interrupts = <52 2 0 0
139                               84 2 0 0
140                               85 2 0 0>;
141                 reg = <0x0 0x1000>;
142         };
143         dcsr-npc {
144                 compatible = "fsl,dcsr-npc";
145                 reg = <0x1000 0x1000 0x1000000 0x8000>;
146         };
147         dcsr-nxc@2000 {
148                 compatible = "fsl,dcsr-nxc";
149                 reg = <0x2000 0x1000>;
150         };
151         dcsr-corenet {
152                 compatible = "fsl,dcsr-corenet";
153                 reg = <0x8000 0x1000 0xB0000 0x1000>;
154         };
155         dcsr-dpaa@9000 {
156                 compatible = "fsl,p5040-dcsr-dpaa", "fsl,dcsr-dpaa";
157                 reg = <0x9000 0x1000>;
158         };
159         dcsr-ocn@11000 {
160                 compatible = "fsl,p5040-dcsr-ocn", "fsl,dcsr-ocn";
161                 reg = <0x11000 0x1000>;
162         };
163         dcsr-ddr@12000 {
164                 compatible = "fsl,dcsr-ddr";
165                 dev-handle = <&ddr1>;
166                 reg = <0x12000 0x1000>;
167         };
168         dcsr-ddr@13000 {
169                 compatible = "fsl,dcsr-ddr";
170                 dev-handle = <&ddr2>;
171                 reg = <0x13000 0x1000>;
172         };
173         dcsr-nal@18000 {
174                 compatible = "fsl,p5040-dcsr-nal", "fsl,dcsr-nal";
175                 reg = <0x18000 0x1000>;
176         };
177         dcsr-rcpm@22000 {
178                 compatible = "fsl,p5040-dcsr-rcpm", "fsl,dcsr-rcpm";
179                 reg = <0x22000 0x1000>;
180         };
181         dcsr-cpu-sb-proxy@40000 {
182                 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
183                 cpu-handle = <&cpu0>;
184                 reg = <0x40000 0x1000>;
185         };
186         dcsr-cpu-sb-proxy@41000 {
187                 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
188                 cpu-handle = <&cpu1>;
189                 reg = <0x41000 0x1000>;
190         };
191         dcsr-cpu-sb-proxy@42000 {
192                 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
193                 cpu-handle = <&cpu2>;
194                 reg = <0x42000 0x1000>;
195         };
196         dcsr-cpu-sb-proxy@43000 {
197                 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
198                 cpu-handle = <&cpu3>;
199                 reg = <0x43000 0x1000>;
200         };
201 };
202
203 /include/ "qoriq-bman1-portals.dtsi"
204
205 &soc {
206         #address-cells = <1>;
207         #size-cells = <1>;
208         device_type = "soc";
209         compatible = "simple-bus";
210
211         soc-sram-error {
212                 compatible = "fsl,soc-sram-error";
213                 interrupts = <16 2 1 29>;
214         };
215
216         corenet-law@0 {
217                 compatible = "fsl,corenet-law";
218                 reg = <0x0 0x1000>;
219                 fsl,num-laws = <32>;
220         };
221
222         ddr1: memory-controller@8000 {
223                 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
224                 reg = <0x8000 0x1000>;
225                 interrupts = <16 2 1 23>;
226         };
227
228         ddr2: memory-controller@9000 {
229                 compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
230                 reg = <0x9000 0x1000>;
231                 interrupts = <16 2 1 22>;
232         };
233
234         cpc: l3-cache-controller@10000 {
235                 compatible = "fsl,p5040-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
236                 reg = <0x10000 0x1000
237                        0x11000 0x1000>;
238                 interrupts = <16 2 1 27
239                               16 2 1 26>;
240         };
241
242         corenet-cf@18000 {
243                 compatible = "fsl,corenet1-cf", "fsl,corenet-cf";
244                 reg = <0x18000 0x1000>;
245                 interrupts = <16 2 1 31>;
246                 fsl,ccf-num-csdids = <32>;
247                 fsl,ccf-num-snoopids = <32>;
248         };
249
250         iommu@20000 {
251                 compatible = "fsl,pamu-v1.0", "fsl,pamu";
252                 reg = <0x20000 0x5000>; /* for compatibility with older PAMU drivers */
253                 ranges = <0 0x20000 0x5000>;
254                 #address-cells = <1>;
255                 #size-cells = <1>;
256                 interrupts = <24 2 0 0
257                               16 2 1 30>;
258                 fsl,portid-mapping = <0x0f800000>;
259
260                 pamu0: pamu@0 {
261                         reg = <0 0x1000>;
262                         fsl,primary-cache-geometry = <32 1>;
263                         fsl,secondary-cache-geometry = <128 2>;
264                 };
265
266                 pamu1: pamu@1000 {
267                         reg = <0x1000 0x1000>;
268                         fsl,primary-cache-geometry = <32 1>;
269                         fsl,secondary-cache-geometry = <128 2>;
270                 };
271
272                 pamu2: pamu@2000 {
273                         reg = <0x2000 0x1000>;
274                         fsl,primary-cache-geometry = <32 1>;
275                         fsl,secondary-cache-geometry = <128 2>;
276                 };
277
278                 pamu3: pamu@3000 {
279                         reg = <0x3000 0x1000>;
280                         fsl,primary-cache-geometry = <32 1>;
281                         fsl,secondary-cache-geometry = <128 2>;
282                 };
283
284                 pamu4: pamu@4000 {
285                         reg = <0x4000 0x1000>;
286                         fsl,primary-cache-geometry = <32 1>;
287                         fsl,secondary-cache-geometry = <128 2>;
288                 };
289         };
290
291 /include/ "qoriq-mpic.dtsi"
292
293         guts: global-utilities@e0000 {
294                 compatible = "fsl,p5040-device-config", "fsl,qoriq-device-config-1.0";
295                 reg = <0xe0000 0xe00>;
296                 fsl,has-rstcr;
297                 #sleep-cells = <1>;
298                 fsl,liodn-bits = <12>;
299         };
300
301         pins: global-utilities@e0e00 {
302                 compatible = "fsl,p5040-pin-control", "fsl,qoriq-pin-control-1.0";
303                 reg = <0xe0e00 0x200>;
304                 #sleep-cells = <2>;
305         };
306
307 /include/ "qoriq-clockgen1.dtsi"
308         global-utilities@e1000 {
309                 compatible = "fsl,p5040-clockgen", "fsl,qoriq-clockgen-1.0";
310
311                 mux2: mux2@40 {
312                         #clock-cells = <0>;
313                         reg = <0x40 0x4>;
314                         compatible = "fsl,qoriq-core-mux-1.0";
315                         clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
316                         clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
317                         clock-output-names = "cmux2";
318                 };
319
320                 mux3: mux3@60 {
321                         #clock-cells = <0>;
322                         reg = <0x60 0x4>;
323                         compatible = "fsl,qoriq-core-mux-1.0";
324                         clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
325                         clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
326                         clock-output-names = "cmux3";
327                 };
328         };
329
330         rcpm: global-utilities@e2000 {
331                 compatible = "fsl,p5040-rcpm", "fsl,qoriq-rcpm-1.0";
332                 reg = <0xe2000 0x1000>;
333                 #sleep-cells = <1>;
334         };
335
336         sfp: sfp@e8000 {
337                 compatible = "fsl,p5040-sfp", "fsl,qoriq-sfp-1.0";
338                 reg        = <0xe8000 0x1000>;
339         };
340
341         serdes: serdes@ea000 {
342                 compatible = "fsl,p5040-serdes";
343                 reg        = <0xea000 0x1000>;
344         };
345
346 /include/ "qoriq-dma-0.dtsi"
347         dma@100300 {
348                 fsl,iommu-parent = <&pamu0>;
349                 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
350         };
351
352 /include/ "qoriq-dma-1.dtsi"
353         dma@101300 {
354                 fsl,iommu-parent = <&pamu0>;
355                 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
356         };
357
358 /include/ "qoriq-espi-0.dtsi"
359         spi@110000 {
360                 fsl,espi-num-chipselects = <4>;
361         };
362
363 /include/ "qoriq-esdhc-0.dtsi"
364         sdhc@114000 {
365                 fsl,iommu-parent = <&pamu2>;
366                 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
367                 sdhci,auto-cmd12;
368         };
369
370 /include/ "qoriq-i2c-0.dtsi"
371 /include/ "qoriq-i2c-1.dtsi"
372 /include/ "qoriq-duart-0.dtsi"
373 /include/ "qoriq-duart-1.dtsi"
374 /include/ "qoriq-gpio-0.dtsi"
375 /include/ "qoriq-usb2-mph-0.dtsi"
376         usb0: usb@210000 {
377                 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
378                 fsl,iommu-parent = <&pamu4>;
379                 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
380                 phy_type = "utmi";
381                 port0;
382         };
383
384 /include/ "qoriq-usb2-dr-0.dtsi"
385         usb1: usb@211000 {
386                 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
387                 fsl,iommu-parent = <&pamu4>;
388                 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
389                 dr_mode = "host";
390                 phy_type = "utmi";
391         };
392
393 /include/ "qoriq-sata2-0.dtsi"
394         sata@220000 {
395                 fsl,iommu-parent = <&pamu4>;
396                 fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
397         };
398
399 /include/ "qoriq-sata2-1.dtsi"
400         sata@221000 {
401                 fsl,iommu-parent = <&pamu4>;
402                 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
403         };
404
405 /include/ "qoriq-sec5.2-0.dtsi"
406         crypto@300000 {
407                 fsl,iommu-parent = <&pamu4>;
408         };
409
410 /include/ "qoriq-bman1.dtsi"
411 };