Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / arch / powerpc / boot / dts / fsl / p2041si-post.dtsi
1 /*
2  * P2041/P2040 Silicon/SoC Device Tree Source (post include)
3  *
4  * Copyright 2011 - 2014 Freescale Semiconductor Inc.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions are met:
8  *     * Redistributions of source code must retain the above copyright
9  *       notice, this list of conditions and the following disclaimer.
10  *     * Redistributions in binary form must reproduce the above copyright
11  *       notice, this list of conditions and the following disclaimer in the
12  *       documentation and/or other materials provided with the distribution.
13  *     * Neither the name of Freescale Semiconductor nor the
14  *       names of its contributors may be used to endorse or promote products
15  *       derived from this software without specific prior written permission.
16  *
17  *
18  * ALTERNATIVELY, this software may be distributed under the terms of the
19  * GNU General Public License ("GPL") as published by the Free Software
20  * Foundation, either version 2 of that License or (at your option) any
21  * later version.
22  *
23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34
35 &bman_fbpr {
36         compatible = "fsl,bman-fbpr";
37         alloc-ranges = <0 0 0x10 0>;
38 };
39
40 &lbc {
41         compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
42         interrupts = <25 2 0 0>;
43         #address-cells = <2>;
44         #size-cells = <1>;
45 };
46
47 /* controller at 0x200000 */
48 &pci0 {
49         compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
50         device_type = "pci";
51         #size-cells = <2>;
52         #address-cells = <3>;
53         bus-range = <0x0 0xff>;
54         clock-frequency = <33333333>;
55         interrupts = <16 2 1 15>;
56         fsl,iommu-parent = <&pamu0>;
57         fsl,liodn-reg = <&guts 0x500>; /* PEX1LIODNR */
58         pcie@0 {
59                 reg = <0 0 0 0 0>;
60                 #interrupt-cells = <1>;
61                 #size-cells = <2>;
62                 #address-cells = <3>;
63                 device_type = "pci";
64                 interrupts = <16 2 1 15>;
65                 interrupt-map-mask = <0xf800 0 0 7>;
66                 interrupt-map = <
67                         /* IDSEL 0x0 */
68                         0000 0 0 1 &mpic 40 1 0 0
69                         0000 0 0 2 &mpic 1 1 0 0
70                         0000 0 0 3 &mpic 2 1 0 0
71                         0000 0 0 4 &mpic 3 1 0 0
72                         >;
73         };
74 };
75
76 /* controller at 0x201000 */
77 &pci1 {
78         compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
79         device_type = "pci";
80         #size-cells = <2>;
81         #address-cells = <3>;
82         bus-range = <0 0xff>;
83         clock-frequency = <33333333>;
84         interrupts = <16 2 1 14>;
85         fsl,iommu-parent = <&pamu0>;
86         fsl,liodn-reg = <&guts 0x504>; /* PEX2LIODNR */
87         pcie@0 {
88                 reg = <0 0 0 0 0>;
89                 #interrupt-cells = <1>;
90                 #size-cells = <2>;
91                 #address-cells = <3>;
92                 device_type = "pci";
93                 interrupts = <16 2 1 14>;
94                 interrupt-map-mask = <0xf800 0 0 7>;
95                 interrupt-map = <
96                         /* IDSEL 0x0 */
97                         0000 0 0 1 &mpic 41 1 0 0
98                         0000 0 0 2 &mpic 5 1 0 0
99                         0000 0 0 3 &mpic 6 1 0 0
100                         0000 0 0 4 &mpic 7 1 0 0
101                         >;
102         };
103 };
104
105 /* controller at 0x202000 */
106 &pci2 {
107         compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
108         device_type = "pci";
109         #size-cells = <2>;
110         #address-cells = <3>;
111         bus-range = <0x0 0xff>;
112         clock-frequency = <33333333>;
113         interrupts = <16 2 1 13>;
114         fsl,iommu-parent = <&pamu0>;
115         fsl,liodn-reg = <&guts 0x508>; /* PEX3LIODNR */
116         pcie@0 {
117                 reg = <0 0 0 0 0>;
118                 #interrupt-cells = <1>;
119                 #size-cells = <2>;
120                 #address-cells = <3>;
121                 device_type = "pci";
122                 interrupts = <16 2 1 13>;
123                 interrupt-map-mask = <0xf800 0 0 7>;
124                 interrupt-map = <
125                         /* IDSEL 0x0 */
126                         0000 0 0 1 &mpic 42 1 0 0
127                         0000 0 0 2 &mpic 9 1 0 0
128                         0000 0 0 3 &mpic 10 1 0 0
129                         0000 0 0 4 &mpic 11 1 0 0
130                         >;
131         };
132 };
133
134 &rio {
135         compatible = "fsl,srio";
136         interrupts = <16 2 1 11>;
137         #address-cells = <2>;
138         #size-cells = <2>;
139         fsl,iommu-parent = <&pamu0>;
140         ranges;
141
142         port1 {
143                 #address-cells = <2>;
144                 #size-cells = <2>;
145                 cell-index = <1>;
146                 fsl,liodn-reg = <&guts 0x510>; /* RIO1LIODNR */
147         };
148
149         port2 {
150                 #address-cells = <2>;
151                 #size-cells = <2>;
152                 cell-index = <2>;
153                 fsl,liodn-reg = <&guts 0x514>; /* RIO2LIODNR */
154         };
155 };
156
157 &dcsr {
158         #address-cells = <1>;
159         #size-cells = <1>;
160         compatible = "fsl,dcsr", "simple-bus";
161
162         dcsr-epu@0 {
163                 compatible = "fsl,p2041-dcsr-epu", "fsl,dcsr-epu";
164                 interrupts = <52 2 0 0
165                               84 2 0 0
166                               85 2 0 0>;
167                 reg = <0x0 0x1000>;
168         };
169         dcsr-npc {
170                 compatible = "fsl,dcsr-npc";
171                 reg = <0x1000 0x1000 0x1000000 0x8000>;
172         };
173         dcsr-nxc@2000 {
174                 compatible = "fsl,dcsr-nxc";
175                 reg = <0x2000 0x1000>;
176         };
177         dcsr-corenet {
178                 compatible = "fsl,dcsr-corenet";
179                 reg = <0x8000 0x1000 0xB0000 0x1000>;
180         };
181         dcsr-dpaa@9000 {
182                 compatible = "fsl,p2041-dcsr-dpaa", "fsl,dcsr-dpaa";
183                 reg = <0x9000 0x1000>;
184         };
185         dcsr-ocn@11000 {
186                 compatible = "fsl,p2041-dcsr-ocn", "fsl,dcsr-ocn";
187                 reg = <0x11000 0x1000>;
188         };
189         dcsr-ddr@12000 {
190                 compatible = "fsl,dcsr-ddr";
191                 dev-handle = <&ddr1>;
192                 reg = <0x12000 0x1000>;
193         };
194         dcsr-nal@18000 {
195                 compatible = "fsl,p2041-dcsr-nal", "fsl,dcsr-nal";
196                 reg = <0x18000 0x1000>;
197         };
198         dcsr-rcpm@22000 {
199                 compatible = "fsl,p2041-dcsr-rcpm", "fsl,dcsr-rcpm";
200                 reg = <0x22000 0x1000>;
201         };
202         dcsr-cpu-sb-proxy@40000 {
203                 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
204                 cpu-handle = <&cpu0>;
205                 reg = <0x40000 0x1000>;
206         };
207         dcsr-cpu-sb-proxy@41000 {
208                 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
209                 cpu-handle = <&cpu1>;
210                 reg = <0x41000 0x1000>;
211         };
212         dcsr-cpu-sb-proxy@42000 {
213                 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
214                 cpu-handle = <&cpu2>;
215                 reg = <0x42000 0x1000>;
216         };
217         dcsr-cpu-sb-proxy@43000 {
218                 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
219                 cpu-handle = <&cpu3>;
220                 reg = <0x43000 0x1000>;
221         };
222 };
223
224 /include/ "qoriq-bman1-portals.dtsi"
225
226 &soc {
227         #address-cells = <1>;
228         #size-cells = <1>;
229         device_type = "soc";
230         compatible = "simple-bus";
231
232         soc-sram-error {
233                 compatible = "fsl,soc-sram-error";
234                 interrupts = <16 2 1 29>;
235         };
236
237         corenet-law@0 {
238                 compatible = "fsl,corenet-law";
239                 reg = <0x0 0x1000>;
240                 fsl,num-laws = <32>;
241         };
242
243         ddr1: memory-controller@8000 {
244                 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
245                 reg = <0x8000 0x1000>;
246                 interrupts = <16 2 1 23>;
247         };
248
249         cpc: l3-cache-controller@10000 {
250                 compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
251                 reg = <0x10000 0x1000>;
252                 interrupts = <16 2 1 27>;
253         };
254
255         corenet-cf@18000 {
256                 compatible = "fsl,corenet1-cf", "fsl,corenet-cf";
257                 reg = <0x18000 0x1000>;
258                 interrupts = <16 2 1 31>;
259                 fsl,ccf-num-csdids = <32>;
260                 fsl,ccf-num-snoopids = <32>;
261         };
262
263         iommu@20000 {
264                 compatible = "fsl,pamu-v1.0", "fsl,pamu";
265                 reg = <0x20000 0x4000>; /* for compatibility with older PAMU drivers */
266                 ranges = <0 0x20000 0x4000>;
267                 #address-cells = <1>;
268                 #size-cells = <1>;
269                 interrupts = <
270                         24 2 0 0
271                         16 2 1 30>;
272                 fsl,portid-mapping = <0x0f000000>;
273
274                 pamu0: pamu@0 {
275                         reg = <0 0x1000>;
276                         fsl,primary-cache-geometry = <32 1>;
277                         fsl,secondary-cache-geometry = <128 2>;
278                 };
279
280                 pamu1: pamu@1000 {
281                         reg = <0x1000 0x1000>;
282                         fsl,primary-cache-geometry = <32 1>;
283                         fsl,secondary-cache-geometry = <128 2>;
284                 };
285
286                 pamu2: pamu@2000 {
287                         reg = <0x2000 0x1000>;
288                         fsl,primary-cache-geometry = <32 1>;
289                         fsl,secondary-cache-geometry = <128 2>;
290                 };
291
292                 pamu3: pamu@3000 {
293                         reg = <0x3000 0x1000>;
294                         fsl,primary-cache-geometry = <32 1>;
295                         fsl,secondary-cache-geometry = <128 2>;
296                 };
297         };
298
299 /include/ "qoriq-mpic.dtsi"
300
301         guts: global-utilities@e0000 {
302                 compatible = "fsl,qoriq-device-config-1.0";
303                 reg = <0xe0000 0xe00>;
304                 fsl,has-rstcr;
305                 #sleep-cells = <1>;
306                 fsl,liodn-bits = <12>;
307         };
308
309         pins: global-utilities@e0e00 {
310                 compatible = "fsl,qoriq-pin-control-1.0";
311                 reg = <0xe0e00 0x200>;
312                 #sleep-cells = <2>;
313         };
314
315 /include/ "qoriq-clockgen1.dtsi"
316         global-utilities@e1000 {
317                 compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0";
318
319                 mux2: mux2@40 {
320                         #clock-cells = <0>;
321                         reg = <0x40 0x4>;
322                         compatible = "fsl,qoriq-core-mux-1.0";
323                         clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
324                         clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
325                         clock-output-names = "cmux2";
326                 };
327
328                 mux3: mux3@60 {
329                         #clock-cells = <0>;
330                         reg = <0x60 0x4>;
331                         compatible = "fsl,qoriq-core-mux-1.0";
332                         clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
333                         clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
334                         clock-output-names = "cmux3";
335                 };
336         };
337
338         rcpm: global-utilities@e2000 {
339                 compatible = "fsl,qoriq-rcpm-1.0";
340                 reg = <0xe2000 0x1000>;
341                 #sleep-cells = <1>;
342         };
343
344         sfp: sfp@e8000 {
345                 compatible = "fsl,p2041-sfp", "fsl,qoriq-sfp-1.0";
346                 reg        = <0xe8000 0x1000>;
347         };
348
349         serdes: serdes@ea000 {
350                 compatible = "fsl,p2041-serdes";
351                 reg        = <0xea000 0x1000>;
352         };
353
354 /include/ "qoriq-dma-0.dtsi"
355         dma@100300 {
356                 fsl,iommu-parent = <&pamu0>;
357                 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
358         };
359
360 /include/ "qoriq-dma-1.dtsi"
361         dma@101300 {
362                 fsl,iommu-parent = <&pamu0>;
363                 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
364         };
365
366 /include/ "qoriq-espi-0.dtsi"
367         spi@110000 {
368                 fsl,espi-num-chipselects = <4>;
369         };
370
371 /include/ "qoriq-esdhc-0.dtsi"
372         sdhc@114000 {
373                 fsl,iommu-parent = <&pamu1>;
374                 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
375                 sdhci,auto-cmd12;
376         };
377
378 /include/ "qoriq-i2c-0.dtsi"
379 /include/ "qoriq-i2c-1.dtsi"
380 /include/ "qoriq-duart-0.dtsi"
381 /include/ "qoriq-duart-1.dtsi"
382 /include/ "qoriq-gpio-0.dtsi"
383 /include/ "qoriq-usb2-mph-0.dtsi"
384         usb0: usb@210000 {
385                 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
386                 phy_type = "utmi";
387                 fsl,iommu-parent = <&pamu1>;
388                 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
389                 port0;
390         };
391
392 /include/ "qoriq-usb2-dr-0.dtsi"
393         usb1: usb@211000 {
394                 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
395                 fsl,iommu-parent = <&pamu1>;
396                 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
397                 dr_mode = "host";
398                 phy_type = "utmi";
399         };
400
401 /include/ "qoriq-sata2-0.dtsi"
402         sata@220000 {
403                 fsl,iommu-parent = <&pamu1>;
404                 fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
405         };
406
407 /include/ "qoriq-sata2-1.dtsi"
408         sata@221000 {
409                 fsl,iommu-parent = <&pamu1>;
410                 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
411         };
412
413 /include/ "qoriq-sec4.2-0.dtsi"
414 crypto: crypto@300000 {
415                 fsl,iommu-parent = <&pamu1>;
416         };
417
418 /include/ "qoriq-bman1.dtsi"
419 };