kernel/arch/mips/pnx833x/common/platform.c

   1 /*
   2  *  platform.c: platform support for PNX833X.
   3  *
   4  *  Copyright 2008 NXP Semiconductors
   5  *        Chris Steel <chris.steel@nxp.com>
   6  *    Daniel Laird <daniel.j.laird@nxp.com>
   7  *
   8  *  Based on software written by:
   9  *      Nikita Youshchenko <yoush@debian.org>, based on PNX8550 code.
  10  *
  11  *  This program is free software; you can redistribute it and/or modify
  12  *  it under the terms of the GNU General Public License as published by
  13  *  the Free Software Foundation; either version 2 of the License, or
  14  *  (at your option) any later version.
  15  *
  16  *  This program is distributed in the hope that it will be useful,
  17  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *  GNU General Public License for more details.
  20  *
  21  *  You should have received a copy of the GNU General Public License
  22  *  along with this program; if not, write to the Free Software
  23  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24  */
  25 #include <linux/device.h>
  26 #include <linux/dma-mapping.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/kernel.h>
  29 #include <linux/init.h>
  30 #include <linux/resource.h>
  31 #include <linux/serial.h>
  32 #include <linux/serial_pnx8xxx.h>
  33 #include <linux/mtd/nand.h>
  34 #include <linux/mtd/partitions.h>
  35
  36 #include <irq.h>
  37 #include <irq-mapping.h>
  38 #include <pnx833x.h>
  39
  40 static u64 uart_dmamask     = DMA_BIT_MASK(32);
  41
  42 static struct resource pnx833x_uart_resources[] = {
  43         [0] = {
  44                 .start          = PNX833X_UART0_PORTS_START,
  45                 .end            = PNX833X_UART0_PORTS_END,
  46                 .flags          = IORESOURCE_MEM,
  47         },
  48         [1] = {
  49                 .start          = PNX833X_PIC_UART0_INT,
  50                 .end            = PNX833X_PIC_UART0_INT,
  51                 .flags          = IORESOURCE_IRQ,
  52         },
  53         [2] = {
  54                 .start          = PNX833X_UART1_PORTS_START,
  55                 .end            = PNX833X_UART1_PORTS_END,
  56                 .flags          = IORESOURCE_MEM,
  57         },
  58         [3] = {
  59                 .start          = PNX833X_PIC_UART1_INT,
  60                 .end            = PNX833X_PIC_UART1_INT,
  61                 .flags          = IORESOURCE_IRQ,
  62         },
  63 };
  64
  65 struct pnx8xxx_port pnx8xxx_ports[] = {
  66         [0] = {
  67                 .port   = {
  68                         .type           = PORT_PNX8XXX,
  69                         .iotype         = UPIO_MEM,
  70                         .membase        = (void __iomem *)PNX833X_UART0_PORTS_START,
  71                         .mapbase        = PNX833X_UART0_PORTS_START,
  72                         .irq            = PNX833X_PIC_UART0_INT,
  73                         .uartclk        = 3692300,
  74                         .fifosize       = 16,
  75                         .flags          = UPF_BOOT_AUTOCONF,
  76                         .line           = 0,
  77                 },
  78         },
  79         [1] = {
  80                 .port   = {
  81                         .type           = PORT_PNX8XXX,
  82                         .iotype         = UPIO_MEM,
  83                         .membase        = (void __iomem *)PNX833X_UART1_PORTS_START,
  84                         .mapbase        = PNX833X_UART1_PORTS_START,
  85                         .irq            = PNX833X_PIC_UART1_INT,
  86                         .uartclk        = 3692300,
  87                         .fifosize       = 16,
  88                         .flags          = UPF_BOOT_AUTOCONF,
  89                         .line           = 1,
  90                 },
  91         },
  92 };
  93
  94 static struct platform_device pnx833x_uart_device = {
  95         .name           = "pnx8xxx-uart",
  96         .id             = -1,
  97         .dev = {
  98                 .dma_mask               = &uart_dmamask,
  99                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 100                 .platform_data          = pnx8xxx_ports,
 101         },
 102         .num_resources  = ARRAY_SIZE(pnx833x_uart_resources),
 103         .resource       = pnx833x_uart_resources,
 104 };
 105
 106 static u64 ehci_dmamask     = DMA_BIT_MASK(32);
 107
 108 static struct resource pnx833x_usb_ehci_resources[] = {
 109         [0] = {
 110                 .start          = PNX833X_USB_PORTS_START,
 111                 .end            = PNX833X_USB_PORTS_END,
 112                 .flags          = IORESOURCE_MEM,
 113         },
 114         [1] = {
 115                 .start          = PNX833X_PIC_USB_INT,
 116                 .end            = PNX833X_PIC_USB_INT,
 117                 .flags          = IORESOURCE_IRQ,
 118         },
 119 };
 120
 121 static struct platform_device pnx833x_usb_ehci_device = {
 122         .name           = "pnx833x-ehci",
 123         .id             = -1,
 124         .dev = {
 125                 .dma_mask               = &ehci_dmamask,
 126                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 127         },
 128         .num_resources  = ARRAY_SIZE(pnx833x_usb_ehci_resources),
 129         .resource       = pnx833x_usb_ehci_resources,
 130 };
 131
 132 static u64 ethernet_dmamask = DMA_BIT_MASK(32);
 133
 134 static struct resource pnx833x_ethernet_resources[] = {
 135         [0] = {
 136                 .start = PNX8335_IP3902_PORTS_START,
 137                 .end   = PNX8335_IP3902_PORTS_END,
 138                 .flags = IORESOURCE_MEM,
 139         },
 140 #ifdef CONFIG_SOC_PNX8335
 141         [1] = {
 142                 .start = PNX8335_PIC_ETHERNET_INT,
 143                 .end   = PNX8335_PIC_ETHERNET_INT,
 144                 .flags = IORESOURCE_IRQ,
 145         },
 146 #endif
 147 };
 148
 149 static struct platform_device pnx833x_ethernet_device = {
 150         .name = "ip3902-eth",
 151         .id   = -1,
 152         .dev  = {
 153                 .dma_mask          = &ethernet_dmamask,
 154                 .coherent_dma_mask = DMA_BIT_MASK(32),
 155         },
 156         .num_resources = ARRAY_SIZE(pnx833x_ethernet_resources),
 157         .resource      = pnx833x_ethernet_resources,
 158 };
 159
 160 static struct resource pnx833x_sata_resources[] = {
 161         [0] = {
 162                 .start = PNX8335_SATA_PORTS_START,
 163                 .end   = PNX8335_SATA_PORTS_END,
 164                 .flags = IORESOURCE_MEM,
 165         },
 166         [1] = {
 167                 .start = PNX8335_PIC_SATA_INT,
 168                 .end   = PNX8335_PIC_SATA_INT,
 169                 .flags = IORESOURCE_IRQ,
 170         },
 171 };
 172
 173 static struct platform_device pnx833x_sata_device = {
 174         .name          = "pnx833x-sata",
 175         .id            = -1,
 176         .num_resources = ARRAY_SIZE(pnx833x_sata_resources),
 177         .resource      = pnx833x_sata_resources,
 178 };
 179
 180 static void
 181 pnx833x_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
 182 {
 183         struct nand_chip *this = mtd->priv;
 184         unsigned long nandaddr = (unsigned long)this->IO_ADDR_W;
 185
 186         if (cmd == NAND_CMD_NONE)
 187                 return;
 188
 189         if (ctrl & NAND_CLE)
 190                 writeb(cmd, (void __iomem *)(nandaddr + PNX8335_NAND_CLE_MASK));
 191         else
 192                 writeb(cmd, (void __iomem *)(nandaddr + PNX8335_NAND_ALE_MASK));
 193 }
 194
 195 static struct platform_nand_data pnx833x_flash_nand_data = {
 196         .chip = {
 197                 .nr_chips               = 1,
 198                 .chip_delay             = 25,
 199         },
 200         .ctrl = {
 201                 .cmd_ctrl               = pnx833x_flash_nand_cmd_ctrl
 202         }
 203 };
 204
 205 /*
 206  * Set start to be the correct address (PNX8335_NAND_BASE with no 0xb!!),
 207  * 12 bytes more seems to be the standard that allows for NAND access.
 208  */
 209 static struct resource pnx833x_flash_nand_resource = {
 210         .start  = PNX8335_NAND_BASE,
 211         .end    = PNX8335_NAND_BASE + 12,
 212         .flags  = IORESOURCE_MEM,
 213 };
 214
 215 static struct platform_device pnx833x_flash_nand = {
 216         .name           = "gen_nand",
 217         .id                     = -1,
 218         .num_resources  = 1,
 219         .resource           = &pnx833x_flash_nand_resource,
 220         .dev            = {
 221                 .platform_data = &pnx833x_flash_nand_data,
 222         },
 223 };
 224
 225 static struct platform_device *pnx833x_platform_devices[] __initdata = {
 226         &pnx833x_uart_device,
 227         &pnx833x_usb_ehci_device,
 228         &pnx833x_ethernet_device,
 229         &pnx833x_sata_device,
 230         &pnx833x_flash_nand,
 231 };
 232
 233 static int __init pnx833x_platform_init(void)
 234 {
 235         int res;
 236
 237         res = platform_add_devices(pnx833x_platform_devices,
 238                                    ARRAY_SIZE(pnx833x_platform_devices));
 239
 240         return res;
 241 }
 242
 243 arch_initcall(pnx833x_platform_init);