kernel/arch/mips/kernel/ptrace.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1992 Ross Biro
   7  * Copyright (C) Linus Torvalds
   8  * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
   9  * Copyright (C) 1996 David S. Miller
  10  * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
  11  * Copyright (C) 1999 MIPS Technologies, Inc.
  12  * Copyright (C) 2000 Ulf Carlsson
  13  *
  14  * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
  15  * binaries.
  16  */
  17 #include <linux/compiler.h>
  18 #include <linux/context_tracking.h>
  19 #include <linux/elf.h>
  20 #include <linux/kernel.h>
  21 #include <linux/sched.h>
  22 #include <linux/mm.h>
  23 #include <linux/errno.h>
  24 #include <linux/ptrace.h>
  25 #include <linux/regset.h>
  26 #include <linux/smp.h>
  27 #include <linux/security.h>
  28 #include <linux/stddef.h>
  29 #include <linux/tracehook.h>
  30 #include <linux/audit.h>
  31 #include <linux/seccomp.h>
  32 #include <linux/ftrace.h>
  33
  34 #include <asm/byteorder.h>
  35 #include <asm/cpu.h>
  36 #include <asm/cpu-info.h>
  37 #include <asm/dsp.h>
  38 #include <asm/fpu.h>
  39 #include <asm/mipsregs.h>
  40 #include <asm/mipsmtregs.h>
  41 #include <asm/pgtable.h>
  42 #include <asm/page.h>
  43 #include <asm/syscall.h>
  44 #include <asm/uaccess.h>
  45 #include <asm/bootinfo.h>
  46 #include <asm/reg.h>
  47
  48 #define CREATE_TRACE_POINTS
  49 #include <trace/events/syscalls.h>
  50
  51 static void init_fp_ctx(struct task_struct *target)
  52 {
  53         /* If FP has been used then the target already has context */
  54         if (tsk_used_math(target))
  55                 return;
  56
  57         /* Begin with data registers set to all 1s... */
  58         memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr));
  59
  60         /* FCSR has been preset by `mips_set_personality_nan'.  */
  61
  62         /*
  63          * Record that the target has "used" math, such that the context
  64          * just initialised, and any modifications made by the caller,
  65          * aren't discarded.
  66          */
  67         set_stopped_child_used_math(target);
  68 }
  69
  70 /*
  71  * Called by kernel/ptrace.c when detaching..
  72  *
  73  * Make sure single step bits etc are not set.
  74  */
  75 void ptrace_disable(struct task_struct *child)
  76 {
  77         /* Don't load the watchpoint registers for the ex-child. */
  78         clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
  79 }
  80
  81 /*
  82  * Poke at FCSR according to its mask.  Don't set the cause bits as
  83  * this is currently not handled correctly in FP context restoration
  84  * and will cause an oops if a corresponding enable bit is set.
  85  */
  86 static void ptrace_setfcr31(struct task_struct *child, u32 value)
  87 {
  88         u32 fcr31;
  89         u32 mask;
  90
  91         value &= ~FPU_CSR_ALL_X;
  92         fcr31 = child->thread.fpu.fcr31;
  93         mask = boot_cpu_data.fpu_msk31;
  94         child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask);
  95 }
  96
  97 /*
  98  * Read a general register set.  We always use the 64-bit format, even
  99  * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
 100  * Registers are sign extended to fill the available space.
 101  */
 102 int ptrace_getregs(struct task_struct *child, struct user_pt_regs __user *data)
 103 {
 104         struct pt_regs *regs;
 105         int i;
 106
 107         if (!access_ok(VERIFY_WRITE, data, 38 * 8))
 108                 return -EIO;
 109
 110         regs = task_pt_regs(child);
 111
 112         for (i = 0; i < 32; i++)
 113                 __put_user((long)regs->regs[i], (__s64 __user *)&data->regs[i]);
 114         __put_user((long)regs->lo, (__s64 __user *)&data->lo);
 115         __put_user((long)regs->hi, (__s64 __user *)&data->hi);
 116         __put_user((long)regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
 117         __put_user((long)regs->cp0_badvaddr, (__s64 __user *)&data->cp0_badvaddr);
 118         __put_user((long)regs->cp0_status, (__s64 __user *)&data->cp0_status);
 119         __put_user((long)regs->cp0_cause, (__s64 __user *)&data->cp0_cause);
 120
 121         return 0;
 122 }
 123
 124 /*
 125  * Write a general register set.  As for PTRACE_GETREGS, we always use
 126  * the 64-bit format.  On a 32-bit kernel only the lower order half
 127  * (according to endianness) will be used.
 128  */
 129 int ptrace_setregs(struct task_struct *child, struct user_pt_regs __user *data)
 130 {
 131         struct pt_regs *regs;
 132         int i;
 133
 134         if (!access_ok(VERIFY_READ, data, 38 * 8))
 135                 return -EIO;
 136
 137         regs = task_pt_regs(child);
 138
 139         for (i = 0; i < 32; i++)
 140                 __get_user(regs->regs[i], (__s64 __user *)&data->regs[i]);
 141         __get_user(regs->lo, (__s64 __user *)&data->lo);
 142         __get_user(regs->hi, (__s64 __user *)&data->hi);
 143         __get_user(regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
 144
 145         /* badvaddr, status, and cause may not be written.  */
 146
 147         return 0;
 148 }
 149
 150 int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
 151 {
 152         int i;
 153
 154         if (!access_ok(VERIFY_WRITE, data, 33 * 8))
 155                 return -EIO;
 156
 157         if (tsk_used_math(child)) {
 158                 union fpureg *fregs = get_fpu_regs(child);
 159                 for (i = 0; i < 32; i++)
 160                         __put_user(get_fpr64(&fregs[i], 0),
 161                                    i + (__u64 __user *)data);
 162         } else {
 163                 for (i = 0; i < 32; i++)
 164                         __put_user((__u64) -1, i + (__u64 __user *) data);
 165         }
 166
 167         __put_user(child->thread.fpu.fcr31, data + 64);
 168         __put_user(boot_cpu_data.fpu_id, data + 65);
 169
 170         return 0;
 171 }
 172
 173 int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
 174 {
 175         union fpureg *fregs;
 176         u64 fpr_val;
 177         u32 value;
 178         int i;
 179
 180         if (!access_ok(VERIFY_READ, data, 33 * 8))
 181                 return -EIO;
 182
 183         init_fp_ctx(child);
 184         fregs = get_fpu_regs(child);
 185
 186         for (i = 0; i < 32; i++) {
 187                 __get_user(fpr_val, i + (__u64 __user *)data);
 188                 set_fpr64(&fregs[i], 0, fpr_val);
 189         }
 190
 191         __get_user(value, data + 64);
 192         ptrace_setfcr31(child, value);
 193
 194         /* FIR may not be written.  */
 195
 196         return 0;
 197 }
 198
 199 int ptrace_get_watch_regs(struct task_struct *child,
 200                           struct pt_watch_regs __user *addr)
 201 {
 202         enum pt_watch_style style;
 203         int i;
 204
 205         if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
 206                 return -EIO;
 207         if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs)))
 208                 return -EIO;
 209
 210 #ifdef CONFIG_32BIT
 211         style = pt_watch_style_mips32;
 212 #define WATCH_STYLE mips32
 213 #else
 214         style = pt_watch_style_mips64;
 215 #define WATCH_STYLE mips64
 216 #endif
 217
 218         __put_user(style, &addr->style);
 219         __put_user(boot_cpu_data.watch_reg_use_cnt,
 220                    &addr->WATCH_STYLE.num_valid);
 221         for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
 222                 __put_user(child->thread.watch.mips3264.watchlo[i],
 223                            &addr->WATCH_STYLE.watchlo[i]);
 224                 __put_user(child->thread.watch.mips3264.watchhi[i] & 0xfff,
 225                            &addr->WATCH_STYLE.watchhi[i]);
 226                 __put_user(boot_cpu_data.watch_reg_masks[i],
 227                            &addr->WATCH_STYLE.watch_masks[i]);
 228         }
 229         for (; i < 8; i++) {
 230                 __put_user(0, &addr->WATCH_STYLE.watchlo[i]);
 231                 __put_user(0, &addr->WATCH_STYLE.watchhi[i]);
 232                 __put_user(0, &addr->WATCH_STYLE.watch_masks[i]);
 233         }
 234
 235         return 0;
 236 }
 237
 238 int ptrace_set_watch_regs(struct task_struct *child,
 239                           struct pt_watch_regs __user *addr)
 240 {
 241         int i;
 242         int watch_active = 0;
 243         unsigned long lt[NUM_WATCH_REGS];
 244         u16 ht[NUM_WATCH_REGS];
 245
 246         if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
 247                 return -EIO;
 248         if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs)))
 249                 return -EIO;
 250         /* Check the values. */
 251         for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
 252                 __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]);
 253 #ifdef CONFIG_32BIT
 254                 if (lt[i] & __UA_LIMIT)
 255                         return -EINVAL;
 256 #else
 257                 if (test_tsk_thread_flag(child, TIF_32BIT_ADDR)) {
 258                         if (lt[i] & 0xffffffff80000000UL)
 259                                 return -EINVAL;
 260                 } else {
 261                         if (lt[i] & __UA_LIMIT)
 262                                 return -EINVAL;
 263                 }
 264 #endif
 265                 __get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]);
 266                 if (ht[i] & ~0xff8)
 267                         return -EINVAL;
 268         }
 269         /* Install them. */
 270         for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
 271                 if (lt[i] & 7)
 272                         watch_active = 1;
 273                 child->thread.watch.mips3264.watchlo[i] = lt[i];
 274                 /* Set the G bit. */
 275                 child->thread.watch.mips3264.watchhi[i] = ht[i];
 276         }
 277
 278         if (watch_active)
 279                 set_tsk_thread_flag(child, TIF_LOAD_WATCH);
 280         else
 281                 clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
 282
 283         return 0;
 284 }
 285
 286 /* regset get/set implementations */
 287
 288 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
 289
 290 static int gpr32_get(struct task_struct *target,
 291                      const struct user_regset *regset,
 292                      unsigned int pos, unsigned int count,
 293                      void *kbuf, void __user *ubuf)
 294 {
 295         struct pt_regs *regs = task_pt_regs(target);
 296         u32 uregs[ELF_NGREG] = {};
 297         unsigned i;
 298
 299         for (i = MIPS32_EF_R1; i <= MIPS32_EF_R31; i++) {
 300                 /* k0/k1 are copied as zero. */
 301                 if (i == MIPS32_EF_R26 || i == MIPS32_EF_R27)
 302                         continue;
 303
 304                 uregs[i] = regs->regs[i - MIPS32_EF_R0];
 305         }
 306
 307         uregs[MIPS32_EF_LO] = regs->lo;
 308         uregs[MIPS32_EF_HI] = regs->hi;
 309         uregs[MIPS32_EF_CP0_EPC] = regs->cp0_epc;
 310         uregs[MIPS32_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
 311         uregs[MIPS32_EF_CP0_STATUS] = regs->cp0_status;
 312         uregs[MIPS32_EF_CP0_CAUSE] = regs->cp0_cause;
 313
 314         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
 315                                    sizeof(uregs));
 316 }
 317
 318 static int gpr32_set(struct task_struct *target,
 319                      const struct user_regset *regset,
 320                      unsigned int pos, unsigned int count,
 321                      const void *kbuf, const void __user *ubuf)
 322 {
 323         struct pt_regs *regs = task_pt_regs(target);
 324         u32 uregs[ELF_NGREG];
 325         unsigned start, num_regs, i;
 326         int err;
 327
 328         start = pos / sizeof(u32);
 329         num_regs = count / sizeof(u32);
 330
 331         if (start + num_regs > ELF_NGREG)
 332                 return -EIO;
 333
 334         err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
 335                                  sizeof(uregs));
 336         if (err)
 337                 return err;
 338
 339         for (i = start; i < num_regs; i++) {
 340                 /*
 341                  * Cast all values to signed here so that if this is a 64-bit
 342                  * kernel, the supplied 32-bit values will be sign extended.
 343                  */
 344                 switch (i) {
 345                 case MIPS32_EF_R1 ... MIPS32_EF_R25:
 346                         /* k0/k1 are ignored. */
 347                 case MIPS32_EF_R28 ... MIPS32_EF_R31:
 348                         regs->regs[i - MIPS32_EF_R0] = (s32)uregs[i];
 349                         break;
 350                 case MIPS32_EF_LO:
 351                         regs->lo = (s32)uregs[i];
 352                         break;
 353                 case MIPS32_EF_HI:
 354                         regs->hi = (s32)uregs[i];
 355                         break;
 356                 case MIPS32_EF_CP0_EPC:
 357                         regs->cp0_epc = (s32)uregs[i];
 358                         break;
 359                 }
 360         }
 361
 362         return 0;
 363 }
 364
 365 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
 366
 367 #ifdef CONFIG_64BIT
 368
 369 static int gpr64_get(struct task_struct *target,
 370                      const struct user_regset *regset,
 371                      unsigned int pos, unsigned int count,
 372                      void *kbuf, void __user *ubuf)
 373 {
 374         struct pt_regs *regs = task_pt_regs(target);
 375         u64 uregs[ELF_NGREG] = {};
 376         unsigned i;
 377
 378         for (i = MIPS64_EF_R1; i <= MIPS64_EF_R31; i++) {
 379                 /* k0/k1 are copied as zero. */
 380                 if (i == MIPS64_EF_R26 || i == MIPS64_EF_R27)
 381                         continue;
 382
 383                 uregs[i] = regs->regs[i - MIPS64_EF_R0];
 384         }
 385
 386         uregs[MIPS64_EF_LO] = regs->lo;
 387         uregs[MIPS64_EF_HI] = regs->hi;
 388         uregs[MIPS64_EF_CP0_EPC] = regs->cp0_epc;
 389         uregs[MIPS64_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
 390         uregs[MIPS64_EF_CP0_STATUS] = regs->cp0_status;
 391         uregs[MIPS64_EF_CP0_CAUSE] = regs->cp0_cause;
 392
 393         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
 394                                    sizeof(uregs));
 395 }
 396
 397 static int gpr64_set(struct task_struct *target,
 398                      const struct user_regset *regset,
 399                      unsigned int pos, unsigned int count,
 400                      const void *kbuf, const void __user *ubuf)
 401 {
 402         struct pt_regs *regs = task_pt_regs(target);
 403         u64 uregs[ELF_NGREG];
 404         unsigned start, num_regs, i;
 405         int err;
 406
 407         start = pos / sizeof(u64);
 408         num_regs = count / sizeof(u64);
 409
 410         if (start + num_regs > ELF_NGREG)
 411                 return -EIO;
 412
 413         err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
 414                                  sizeof(uregs));
 415         if (err)
 416                 return err;
 417
 418         for (i = start; i < num_regs; i++) {
 419                 switch (i) {
 420                 case MIPS64_EF_R1 ... MIPS64_EF_R25:
 421                         /* k0/k1 are ignored. */
 422                 case MIPS64_EF_R28 ... MIPS64_EF_R31:
 423                         regs->regs[i - MIPS64_EF_R0] = uregs[i];
 424                         break;
 425                 case MIPS64_EF_LO:
 426                         regs->lo = uregs[i];
 427                         break;
 428                 case MIPS64_EF_HI:
 429                         regs->hi = uregs[i];
 430                         break;
 431                 case MIPS64_EF_CP0_EPC:
 432                         regs->cp0_epc = uregs[i];
 433                         break;
 434                 }
 435         }
 436
 437         return 0;
 438 }
 439
 440 #endif /* CONFIG_64BIT */
 441
 442 static int fpr_get(struct task_struct *target,
 443                    const struct user_regset *regset,
 444                    unsigned int pos, unsigned int count,
 445                    void *kbuf, void __user *ubuf)
 446 {
 447         unsigned i;
 448         int err;
 449         u64 fpr_val;
 450
 451         /* XXX fcr31  */
 452
 453         if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
 454                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 455                                            &target->thread.fpu,
 456                                            0, sizeof(elf_fpregset_t));
 457
 458         for (i = 0; i < NUM_FPU_REGS; i++) {
 459                 fpr_val = get_fpr64(&target->thread.fpu.fpr[i], 0);
 460                 err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 461                                           &fpr_val, i * sizeof(elf_fpreg_t),
 462                                           (i + 1) * sizeof(elf_fpreg_t));
 463                 if (err)
 464                         return err;
 465         }
 466
 467         return 0;
 468 }
 469
 470 static int fpr_set(struct task_struct *target,
 471                    const struct user_regset *regset,
 472                    unsigned int pos, unsigned int count,
 473                    const void *kbuf, const void __user *ubuf)
 474 {
 475         unsigned i;
 476         int err;
 477         u64 fpr_val;
 478
 479         /* XXX fcr31  */
 480
 481         init_fp_ctx(target);
 482
 483         if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
 484                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 485                                           &target->thread.fpu,
 486                                           0, sizeof(elf_fpregset_t));
 487
 488         for (i = 0; i < NUM_FPU_REGS; i++) {
 489                 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 490                                          &fpr_val, i * sizeof(elf_fpreg_t),
 491                                          (i + 1) * sizeof(elf_fpreg_t));
 492                 if (err)
 493                         return err;
 494                 set_fpr64(&target->thread.fpu.fpr[i], 0, fpr_val);
 495         }
 496
 497         return 0;
 498 }
 499
 500 enum mips_regset {
 501         REGSET_GPR,
 502         REGSET_FPR,
 503 };
 504
 505 struct pt_regs_offset {
 506         const char *name;
 507         int offset;
 508 };
 509
 510 #define REG_OFFSET_NAME(reg, r) {                                       \
 511         .name = #reg,                                                   \
 512         .offset = offsetof(struct pt_regs, r)                           \
 513 }
 514
 515 #define REG_OFFSET_END {                                                \
 516         .name = NULL,                                                   \
 517         .offset = 0                                                     \
 518 }
 519
 520 static const struct pt_regs_offset regoffset_table[] = {
 521         REG_OFFSET_NAME(r0, regs[0]),
 522         REG_OFFSET_NAME(r1, regs[1]),
 523         REG_OFFSET_NAME(r2, regs[2]),
 524         REG_OFFSET_NAME(r3, regs[3]),
 525         REG_OFFSET_NAME(r4, regs[4]),
 526         REG_OFFSET_NAME(r5, regs[5]),
 527         REG_OFFSET_NAME(r6, regs[6]),
 528         REG_OFFSET_NAME(r7, regs[7]),
 529         REG_OFFSET_NAME(r8, regs[8]),
 530         REG_OFFSET_NAME(r9, regs[9]),
 531         REG_OFFSET_NAME(r10, regs[10]),
 532         REG_OFFSET_NAME(r11, regs[11]),
 533         REG_OFFSET_NAME(r12, regs[12]),
 534         REG_OFFSET_NAME(r13, regs[13]),
 535         REG_OFFSET_NAME(r14, regs[14]),
 536         REG_OFFSET_NAME(r15, regs[15]),
 537         REG_OFFSET_NAME(r16, regs[16]),
 538         REG_OFFSET_NAME(r17, regs[17]),
 539         REG_OFFSET_NAME(r18, regs[18]),
 540         REG_OFFSET_NAME(r19, regs[19]),
 541         REG_OFFSET_NAME(r20, regs[20]),
 542         REG_OFFSET_NAME(r21, regs[21]),
 543         REG_OFFSET_NAME(r22, regs[22]),
 544         REG_OFFSET_NAME(r23, regs[23]),
 545         REG_OFFSET_NAME(r24, regs[24]),
 546         REG_OFFSET_NAME(r25, regs[25]),
 547         REG_OFFSET_NAME(r26, regs[26]),
 548         REG_OFFSET_NAME(r27, regs[27]),
 549         REG_OFFSET_NAME(r28, regs[28]),
 550         REG_OFFSET_NAME(r29, regs[29]),
 551         REG_OFFSET_NAME(r30, regs[30]),
 552         REG_OFFSET_NAME(r31, regs[31]),
 553         REG_OFFSET_NAME(c0_status, cp0_status),
 554         REG_OFFSET_NAME(hi, hi),
 555         REG_OFFSET_NAME(lo, lo),
 556 #ifdef CONFIG_CPU_HAS_SMARTMIPS
 557         REG_OFFSET_NAME(acx, acx),
 558 #endif
 559         REG_OFFSET_NAME(c0_badvaddr, cp0_badvaddr),
 560         REG_OFFSET_NAME(c0_cause, cp0_cause),
 561         REG_OFFSET_NAME(c0_epc, cp0_epc),
 562 #ifdef CONFIG_MIPS_MT_SMTC
 563         REG_OFFSET_NAME(c0_tcstatus, cp0_tcstatus),
 564 #endif
 565 #ifdef CONFIG_CPU_CAVIUM_OCTEON
 566         REG_OFFSET_NAME(mpl0, mpl[0]),
 567         REG_OFFSET_NAME(mpl1, mpl[1]),
 568         REG_OFFSET_NAME(mpl2, mpl[2]),
 569         REG_OFFSET_NAME(mtp0, mtp[0]),
 570         REG_OFFSET_NAME(mtp1, mtp[1]),
 571         REG_OFFSET_NAME(mtp2, mtp[2]),
 572 #endif
 573         REG_OFFSET_END,
 574 };
 575
 576 /**
 577  * regs_query_register_offset() - query register offset from its name
 578  * @name:       the name of a register
 579  *
 580  * regs_query_register_offset() returns the offset of a register in struct
 581  * pt_regs from its name. If the name is invalid, this returns -EINVAL;
 582  */
 583 int regs_query_register_offset(const char *name)
 584 {
 585         const struct pt_regs_offset *roff;
 586         for (roff = regoffset_table; roff->name != NULL; roff++)
 587                 if (!strcmp(roff->name, name))
 588                         return roff->offset;
 589         return -EINVAL;
 590 }
 591
 592 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
 593
 594 static const struct user_regset mips_regsets[] = {
 595         [REGSET_GPR] = {
 596                 .core_note_type = NT_PRSTATUS,
 597                 .n              = ELF_NGREG,
 598                 .size           = sizeof(unsigned int),
 599                 .align          = sizeof(unsigned int),
 600                 .get            = gpr32_get,
 601                 .set            = gpr32_set,
 602         },
 603         [REGSET_FPR] = {
 604                 .core_note_type = NT_PRFPREG,
 605                 .n              = ELF_NFPREG,
 606                 .size           = sizeof(elf_fpreg_t),
 607                 .align          = sizeof(elf_fpreg_t),
 608                 .get            = fpr_get,
 609                 .set            = fpr_set,
 610         },
 611 };
 612
 613 static const struct user_regset_view user_mips_view = {
 614         .name           = "mips",
 615         .e_machine      = ELF_ARCH,
 616         .ei_osabi       = ELF_OSABI,
 617         .regsets        = mips_regsets,
 618         .n              = ARRAY_SIZE(mips_regsets),
 619 };
 620
 621 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
 622
 623 #ifdef CONFIG_64BIT
 624
 625 static const struct user_regset mips64_regsets[] = {
 626         [REGSET_GPR] = {
 627                 .core_note_type = NT_PRSTATUS,
 628                 .n              = ELF_NGREG,
 629                 .size           = sizeof(unsigned long),
 630                 .align          = sizeof(unsigned long),
 631                 .get            = gpr64_get,
 632                 .set            = gpr64_set,
 633         },
 634         [REGSET_FPR] = {
 635                 .core_note_type = NT_PRFPREG,
 636                 .n              = ELF_NFPREG,
 637                 .size           = sizeof(elf_fpreg_t),
 638                 .align          = sizeof(elf_fpreg_t),
 639                 .get            = fpr_get,
 640                 .set            = fpr_set,
 641         },
 642 };
 643
 644 static const struct user_regset_view user_mips64_view = {
 645         .name           = "mips64",
 646         .e_machine      = ELF_ARCH,
 647         .ei_osabi       = ELF_OSABI,
 648         .regsets        = mips64_regsets,
 649         .n              = ARRAY_SIZE(mips64_regsets),
 650 };
 651
 652 #endif /* CONFIG_64BIT */
 653
 654 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
 655 {
 656 #ifdef CONFIG_32BIT
 657         return &user_mips_view;
 658 #else
 659 #ifdef CONFIG_MIPS32_O32
 660         if (test_tsk_thread_flag(task, TIF_32BIT_REGS))
 661                 return &user_mips_view;
 662 #endif
 663         return &user_mips64_view;
 664 #endif
 665 }
 666
 667 long arch_ptrace(struct task_struct *child, long request,
 668                  unsigned long addr, unsigned long data)
 669 {
 670         int ret;
 671         void __user *addrp = (void __user *) addr;
 672         void __user *datavp = (void __user *) data;
 673         unsigned long __user *datalp = (void __user *) data;
 674
 675         switch (request) {
 676         /* when I and D space are separate, these will need to be fixed. */
 677         case PTRACE_PEEKTEXT: /* read word at location addr. */
 678         case PTRACE_PEEKDATA:
 679                 ret = generic_ptrace_peekdata(child, addr, data);
 680                 break;
 681
 682         /* Read the word at location addr in the USER area. */
 683         case PTRACE_PEEKUSR: {
 684                 struct pt_regs *regs;
 685                 union fpureg *fregs;
 686                 unsigned long tmp = 0;
 687
 688                 regs = task_pt_regs(child);
 689                 ret = 0;  /* Default return value. */
 690
 691                 switch (addr) {
 692                 case 0 ... 31:
 693                         tmp = regs->regs[addr];
 694                         break;
 695                 case FPR_BASE ... FPR_BASE + 31:
 696                         if (!tsk_used_math(child)) {
 697                                 /* FP not yet used */
 698                                 tmp = -1;
 699                                 break;
 700                         }
 701                         fregs = get_fpu_regs(child);
 702
 703 #ifdef CONFIG_32BIT
 704                         if (test_thread_flag(TIF_32BIT_FPREGS)) {
 705                                 /*
 706                                  * The odd registers are actually the high
 707                                  * order bits of the values stored in the even
 708                                  * registers - unless we're using r2k_switch.S.
 709                                  */
 710                                 tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
 711                                                 addr & 1);
 712                                 break;
 713                         }
 714 #endif
 715                         tmp = get_fpr32(&fregs[addr - FPR_BASE], 0);
 716                         break;
 717                 case PC:
 718                         tmp = regs->cp0_epc;
 719                         break;
 720                 case CAUSE:
 721                         tmp = regs->cp0_cause;
 722                         break;
 723                 case BADVADDR:
 724                         tmp = regs->cp0_badvaddr;
 725                         break;
 726                 case MMHI:
 727                         tmp = regs->hi;
 728                         break;
 729                 case MMLO:
 730                         tmp = regs->lo;
 731                         break;
 732 #ifdef CONFIG_CPU_HAS_SMARTMIPS
 733                 case ACX:
 734                         tmp = regs->acx;
 735                         break;
 736 #endif
 737                 case FPC_CSR:
 738                         tmp = child->thread.fpu.fcr31;
 739                         break;
 740                 case FPC_EIR:
 741                         /* implementation / version register */
 742                         tmp = boot_cpu_data.fpu_id;
 743                         break;
 744                 case DSP_BASE ... DSP_BASE + 5: {
 745                         dspreg_t *dregs;
 746
 747                         if (!cpu_has_dsp) {
 748                                 tmp = 0;
 749                                 ret = -EIO;
 750                                 goto out;
 751                         }
 752                         dregs = __get_dsp_regs(child);
 753                         tmp = (unsigned long) (dregs[addr - DSP_BASE]);
 754                         break;
 755                 }
 756                 case DSP_CONTROL:
 757                         if (!cpu_has_dsp) {
 758                                 tmp = 0;
 759                                 ret = -EIO;
 760                                 goto out;
 761                         }
 762                         tmp = child->thread.dsp.dspcontrol;
 763                         break;
 764                 default:
 765                         tmp = 0;
 766                         ret = -EIO;
 767                         goto out;
 768                 }
 769                 ret = put_user(tmp, datalp);
 770                 break;
 771         }
 772
 773         /* when I and D space are separate, this will have to be fixed. */
 774         case PTRACE_POKETEXT: /* write the word at location addr. */
 775         case PTRACE_POKEDATA:
 776                 ret = generic_ptrace_pokedata(child, addr, data);
 777                 break;
 778
 779         case PTRACE_POKEUSR: {
 780                 struct pt_regs *regs;
 781                 ret = 0;
 782                 regs = task_pt_regs(child);
 783
 784                 switch (addr) {
 785                 case 0 ... 31:
 786                         regs->regs[addr] = data;
 787                         break;
 788                 case FPR_BASE ... FPR_BASE + 31: {
 789                         union fpureg *fregs = get_fpu_regs(child);
 790
 791                         init_fp_ctx(child);
 792 #ifdef CONFIG_32BIT
 793                         if (test_thread_flag(TIF_32BIT_FPREGS)) {
 794                                 /*
 795                                  * The odd registers are actually the high
 796                                  * order bits of the values stored in the even
 797                                  * registers - unless we're using r2k_switch.S.
 798                                  */
 799                                 set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
 800                                           addr & 1, data);
 801                                 break;
 802                         }
 803 #endif
 804                         set_fpr64(&fregs[addr - FPR_BASE], 0, data);
 805                         break;
 806                 }
 807                 case PC:
 808                         regs->cp0_epc = data;
 809                         break;
 810                 case MMHI:
 811                         regs->hi = data;
 812                         break;
 813                 case MMLO:
 814                         regs->lo = data;
 815                         break;
 816 #ifdef CONFIG_CPU_HAS_SMARTMIPS
 817                 case ACX:
 818                         regs->acx = data;
 819                         break;
 820 #endif
 821                 case FPC_CSR:
 822                         ptrace_setfcr31(child, data);
 823                         break;
 824                 case DSP_BASE ... DSP_BASE + 5: {
 825                         dspreg_t *dregs;
 826
 827                         if (!cpu_has_dsp) {
 828                                 ret = -EIO;
 829                                 break;
 830                         }
 831
 832                         dregs = __get_dsp_regs(child);
 833                         dregs[addr - DSP_BASE] = data;
 834                         break;
 835                 }
 836                 case DSP_CONTROL:
 837                         if (!cpu_has_dsp) {
 838                                 ret = -EIO;
 839                                 break;
 840                         }
 841                         child->thread.dsp.dspcontrol = data;
 842                         break;
 843                 default:
 844                         /* The rest are not allowed. */
 845                         ret = -EIO;
 846                         break;
 847                 }
 848                 break;
 849                 }
 850
 851         case PTRACE_GETREGS:
 852                 ret = ptrace_getregs(child, datavp);
 853                 break;
 854
 855         case PTRACE_SETREGS:
 856                 ret = ptrace_setregs(child, datavp);
 857                 break;
 858
 859         case PTRACE_GETFPREGS:
 860                 ret = ptrace_getfpregs(child, datavp);
 861                 break;
 862
 863         case PTRACE_SETFPREGS:
 864                 ret = ptrace_setfpregs(child, datavp);
 865                 break;
 866
 867         case PTRACE_GET_THREAD_AREA:
 868                 ret = put_user(task_thread_info(child)->tp_value, datalp);
 869                 break;
 870
 871         case PTRACE_GET_WATCH_REGS:
 872                 ret = ptrace_get_watch_regs(child, addrp);
 873                 break;
 874
 875         case PTRACE_SET_WATCH_REGS:
 876                 ret = ptrace_set_watch_regs(child, addrp);
 877                 break;
 878
 879         default:
 880                 ret = ptrace_request(child, request, addr, data);
 881                 break;
 882         }
 883  out:
 884         return ret;
 885 }
 886
 887 /*
 888  * Notification of system call entry/exit
 889  * - triggered by current->work.syscall_trace
 890  */
 891 asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall)
 892 {
 893         long ret = 0;
 894         user_exit();
 895
 896         current_thread_info()->syscall = syscall;
 897
 898         if (secure_computing() == -1)
 899                 return -1;
 900
 901         if (test_thread_flag(TIF_SYSCALL_TRACE) &&
 902             tracehook_report_syscall_entry(regs))
 903                 ret = -1;
 904
 905         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
 906                 trace_sys_enter(regs, regs->regs[2]);
 907
 908         audit_syscall_entry(syscall, regs->regs[4], regs->regs[5],
 909                             regs->regs[6], regs->regs[7]);
 910         return syscall;
 911 }
 912
 913 /*
 914  * Notification of system call entry/exit
 915  * - triggered by current->work.syscall_trace
 916  */
 917 asmlinkage void syscall_trace_leave(struct pt_regs *regs)
 918 {
 919         /*
 920          * We may come here right after calling schedule_user()
 921          * or do_notify_resume(), in which case we can be in RCU
 922          * user mode.
 923          */
 924         user_exit();
 925
 926         audit_syscall_exit(regs);
 927
 928         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
 929                 trace_sys_exit(regs, regs->regs[2]);
 930
 931         if (test_thread_flag(TIF_SYSCALL_TRACE))
 932                 tracehook_report_syscall_exit(regs, 0);
 933
 934         user_enter();
 935 }