kernel/arch/mips/jz4740/platform.c

   1 /*
   2  *  Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
   3  *  JZ4740 platform devices
   4  *
   5  *  This program is free software; you can redistribute it and/or modify it
   6  *  under  the terms of the GNU General  Public License as published by the
   7  *  Free Software Foundation;  either version 2 of the License, or (at your
   8  *  option) any later version.
   9  *
  10  *  You should have received a copy of the GNU General Public License along
  11  *  with this program; if not, write to the Free Software Foundation, Inc.,
  12  *  675 Mass Ave, Cambridge, MA 02139, USA.
  13  *
  14  */
  15
  16 #include <linux/clk.h>
  17 #include <linux/device.h>
  18 #include <linux/kernel.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/resource.h>
  21
  22 #include <linux/dma-mapping.h>
  23
  24 #include <linux/usb/musb.h>
  25
  26 #include <asm/mach-jz4740/platform.h>
  27 #include <asm/mach-jz4740/base.h>
  28 #include <asm/mach-jz4740/irq.h>
  29
  30 #include <linux/serial_core.h>
  31 #include <linux/serial_8250.h>
  32
  33 #include "clock.h"
  34
  35 /* OHCI controller */
  36 static struct resource jz4740_usb_ohci_resources[] = {
  37         {
  38                 .start  = JZ4740_UHC_BASE_ADDR,
  39                 .end    = JZ4740_UHC_BASE_ADDR + 0x1000 - 1,
  40                 .flags  = IORESOURCE_MEM,
  41         },
  42         {
  43                 .start  = JZ4740_IRQ_UHC,
  44                 .end    = JZ4740_IRQ_UHC,
  45                 .flags  = IORESOURCE_IRQ,
  46         },
  47 };
  48
  49 struct platform_device jz4740_usb_ohci_device = {
  50         .name           = "jz4740-ohci",
  51         .id             = -1,
  52         .dev = {
  53                 .dma_mask = &jz4740_usb_ohci_device.dev.coherent_dma_mask,
  54                 .coherent_dma_mask = DMA_BIT_MASK(32),
  55         },
  56         .num_resources  = ARRAY_SIZE(jz4740_usb_ohci_resources),
  57         .resource       = jz4740_usb_ohci_resources,
  58 };
  59
  60 /* USB Device Controller */
  61 struct platform_device jz4740_udc_xceiv_device = {
  62         .name = "usb_phy_generic",
  63         .id   = 0,
  64 };
  65
  66 static struct resource jz4740_udc_resources[] = {
  67         [0] = {
  68                 .start = JZ4740_UDC_BASE_ADDR,
  69                 .end   = JZ4740_UDC_BASE_ADDR + 0x10000 - 1,
  70                 .flags = IORESOURCE_MEM,
  71         },
  72         [1] = {
  73                 .start = JZ4740_IRQ_UDC,
  74                 .end   = JZ4740_IRQ_UDC,
  75                 .flags = IORESOURCE_IRQ,
  76                 .name  = "mc",
  77         },
  78 };
  79
  80 struct platform_device jz4740_udc_device = {
  81         .name = "musb-jz4740",
  82         .id   = -1,
  83         .dev  = {
  84                 .dma_mask          = &jz4740_udc_device.dev.coherent_dma_mask,
  85                 .coherent_dma_mask = DMA_BIT_MASK(32),
  86         },
  87         .num_resources = ARRAY_SIZE(jz4740_udc_resources),
  88         .resource      = jz4740_udc_resources,
  89 };
  90
  91 /* MMC/SD controller */
  92 static struct resource jz4740_mmc_resources[] = {
  93         {
  94                 .start  = JZ4740_MSC_BASE_ADDR,
  95                 .end    = JZ4740_MSC_BASE_ADDR + 0x1000 - 1,
  96                 .flags  = IORESOURCE_MEM,
  97         },
  98         {
  99                 .start  = JZ4740_IRQ_MSC,
 100                 .end    = JZ4740_IRQ_MSC,
 101                 .flags  = IORESOURCE_IRQ,
 102         }
 103 };
 104
 105 struct platform_device jz4740_mmc_device = {
 106         .name           = "jz4740-mmc",
 107         .id             = 0,
 108         .dev = {
 109                 .dma_mask = &jz4740_mmc_device.dev.coherent_dma_mask,
 110                 .coherent_dma_mask = DMA_BIT_MASK(32),
 111         },
 112         .num_resources  = ARRAY_SIZE(jz4740_mmc_resources),
 113         .resource       = jz4740_mmc_resources,
 114 };
 115
 116 /* RTC controller */
 117 static struct resource jz4740_rtc_resources[] = {
 118         {
 119                 .start  = JZ4740_RTC_BASE_ADDR,
 120                 .end    = JZ4740_RTC_BASE_ADDR + 0x38 - 1,
 121                 .flags  = IORESOURCE_MEM,
 122         },
 123         {
 124                 .start  = JZ4740_IRQ_RTC,
 125                 .end    = JZ4740_IRQ_RTC,
 126                 .flags  = IORESOURCE_IRQ,
 127         },
 128 };
 129
 130 struct platform_device jz4740_rtc_device = {
 131         .name           = "jz4740-rtc",
 132         .id             = -1,
 133         .num_resources  = ARRAY_SIZE(jz4740_rtc_resources),
 134         .resource       = jz4740_rtc_resources,
 135 };
 136
 137 /* I2C controller */
 138 static struct resource jz4740_i2c_resources[] = {
 139         {
 140                 .start  = JZ4740_I2C_BASE_ADDR,
 141                 .end    = JZ4740_I2C_BASE_ADDR + 0x1000 - 1,
 142                 .flags  = IORESOURCE_MEM,
 143         },
 144         {
 145                 .start  = JZ4740_IRQ_I2C,
 146                 .end    = JZ4740_IRQ_I2C,
 147                 .flags  = IORESOURCE_IRQ,
 148         }
 149 };
 150
 151 struct platform_device jz4740_i2c_device = {
 152         .name           = "jz4740-i2c",
 153         .id             = 0,
 154         .num_resources  = ARRAY_SIZE(jz4740_i2c_resources),
 155         .resource       = jz4740_i2c_resources,
 156 };
 157
 158 /* NAND controller */
 159 static struct resource jz4740_nand_resources[] = {
 160         {
 161                 .name   = "mmio",
 162                 .start  = JZ4740_EMC_BASE_ADDR,
 163                 .end    = JZ4740_EMC_BASE_ADDR + 0x1000 - 1,
 164                 .flags  = IORESOURCE_MEM,
 165         },
 166         {
 167                 .name   = "bank1",
 168                 .start  = 0x18000000,
 169                 .end    = 0x180C0000 - 1,
 170                 .flags = IORESOURCE_MEM,
 171         },
 172         {
 173                 .name   = "bank2",
 174                 .start  = 0x14000000,
 175                 .end    = 0x140C0000 - 1,
 176                 .flags = IORESOURCE_MEM,
 177         },
 178         {
 179                 .name   = "bank3",
 180                 .start  = 0x0C000000,
 181                 .end    = 0x0C0C0000 - 1,
 182                 .flags = IORESOURCE_MEM,
 183         },
 184         {
 185                 .name   = "bank4",
 186                 .start  = 0x08000000,
 187                 .end    = 0x080C0000 - 1,
 188                 .flags = IORESOURCE_MEM,
 189         },
 190 };
 191
 192 struct platform_device jz4740_nand_device = {
 193         .name = "jz4740-nand",
 194         .num_resources = ARRAY_SIZE(jz4740_nand_resources),
 195         .resource = jz4740_nand_resources,
 196 };
 197
 198 /* LCD controller */
 199 static struct resource jz4740_framebuffer_resources[] = {
 200         {
 201                 .start  = JZ4740_LCD_BASE_ADDR,
 202                 .end    = JZ4740_LCD_BASE_ADDR + 0x1000 - 1,
 203                 .flags  = IORESOURCE_MEM,
 204         },
 205 };
 206
 207 struct platform_device jz4740_framebuffer_device = {
 208         .name           = "jz4740-fb",
 209         .id             = -1,
 210         .num_resources  = ARRAY_SIZE(jz4740_framebuffer_resources),
 211         .resource       = jz4740_framebuffer_resources,
 212         .dev = {
 213                 .dma_mask = &jz4740_framebuffer_device.dev.coherent_dma_mask,
 214                 .coherent_dma_mask = DMA_BIT_MASK(32),
 215         },
 216 };
 217
 218 /* I2S controller */
 219 static struct resource jz4740_i2s_resources[] = {
 220         {
 221                 .start  = JZ4740_AIC_BASE_ADDR,
 222                 .end    = JZ4740_AIC_BASE_ADDR + 0x38 - 1,
 223                 .flags  = IORESOURCE_MEM,
 224         },
 225 };
 226
 227 struct platform_device jz4740_i2s_device = {
 228         .name           = "jz4740-i2s",
 229         .id             = -1,
 230         .num_resources  = ARRAY_SIZE(jz4740_i2s_resources),
 231         .resource       = jz4740_i2s_resources,
 232 };
 233
 234 /* PCM */
 235 struct platform_device jz4740_pcm_device = {
 236         .name           = "jz4740-pcm-audio",
 237         .id             = -1,
 238 };
 239
 240 /* Codec */
 241 static struct resource jz4740_codec_resources[] = {
 242         {
 243                 .start  = JZ4740_AIC_BASE_ADDR + 0x80,
 244                 .end    = JZ4740_AIC_BASE_ADDR + 0x88 - 1,
 245                 .flags  = IORESOURCE_MEM,
 246         },
 247 };
 248
 249 struct platform_device jz4740_codec_device = {
 250         .name           = "jz4740-codec",
 251         .id             = -1,
 252         .num_resources  = ARRAY_SIZE(jz4740_codec_resources),
 253         .resource       = jz4740_codec_resources,
 254 };
 255
 256 /* ADC controller */
 257 static struct resource jz4740_adc_resources[] = {
 258         {
 259                 .start  = JZ4740_SADC_BASE_ADDR,
 260                 .end    = JZ4740_SADC_BASE_ADDR + 0x30,
 261                 .flags  = IORESOURCE_MEM,
 262         },
 263         {
 264                 .start  = JZ4740_IRQ_SADC,
 265                 .end    = JZ4740_IRQ_SADC,
 266                 .flags  = IORESOURCE_IRQ,
 267         },
 268         {
 269                 .start  = JZ4740_IRQ_ADC_BASE,
 270                 .end    = JZ4740_IRQ_ADC_BASE,
 271                 .flags  = IORESOURCE_IRQ,
 272         },
 273 };
 274
 275 struct platform_device jz4740_adc_device = {
 276         .name           = "jz4740-adc",
 277         .id             = -1,
 278         .num_resources  = ARRAY_SIZE(jz4740_adc_resources),
 279         .resource       = jz4740_adc_resources,
 280 };
 281
 282 /* Watchdog */
 283 static struct resource jz4740_wdt_resources[] = {
 284         {
 285                 .start = JZ4740_WDT_BASE_ADDR,
 286                 .end   = JZ4740_WDT_BASE_ADDR + 0x10 - 1,
 287                 .flags = IORESOURCE_MEM,
 288         },
 289 };
 290
 291 struct platform_device jz4740_wdt_device = {
 292         .name          = "jz4740-wdt",
 293         .id            = -1,
 294         .num_resources = ARRAY_SIZE(jz4740_wdt_resources),
 295         .resource      = jz4740_wdt_resources,
 296 };
 297
 298 /* PWM */
 299 struct platform_device jz4740_pwm_device = {
 300         .name = "jz4740-pwm",
 301         .id   = -1,
 302 };
 303
 304 /* DMA */
 305 static struct resource jz4740_dma_resources[] = {
 306         {
 307                 .start  = JZ4740_DMAC_BASE_ADDR,
 308                 .end    = JZ4740_DMAC_BASE_ADDR + 0x400 - 1,
 309                 .flags  = IORESOURCE_MEM,
 310         },
 311         {
 312                 .start  = JZ4740_IRQ_DMAC,
 313                 .end    = JZ4740_IRQ_DMAC,
 314                 .flags  = IORESOURCE_IRQ,
 315         },
 316 };
 317
 318 struct platform_device jz4740_dma_device = {
 319         .name           = "jz4740-dma",
 320         .id             = -1,
 321         .num_resources  = ARRAY_SIZE(jz4740_dma_resources),
 322         .resource       = jz4740_dma_resources,
 323 };