Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / arch / mips / include / asm / mach-bcm47xx / cpu-feature-overrides.h
1 #ifndef __ASM_MACH_BCM47XX_CPU_FEATURE_OVERRIDES_H
2 #define __ASM_MACH_BCM47XX_CPU_FEATURE_OVERRIDES_H
3
4 #define cpu_has_tlb                     1
5 #define cpu_has_4kex                    1
6 #define cpu_has_3k_cache                0
7 #define cpu_has_4k_cache                1
8 #define cpu_has_tx39_cache              0
9 #define cpu_has_fpu                     0
10 #define cpu_has_32fpr                   0
11 #define cpu_has_counter                 1
12 #if defined(CONFIG_BCM47XX_BCMA) && !defined(CONFIG_BCM47XX_SSB)
13 #define cpu_has_watch                   1
14 #elif defined(CONFIG_BCM47XX_SSB) && !defined(CONFIG_BCM47XX_BCMA)
15 #define cpu_has_watch                   0
16 #endif
17 #define cpu_has_divec                   1
18 #define cpu_has_vce                     0
19 #define cpu_has_cache_cdex_p            0
20 #define cpu_has_cache_cdex_s            0
21 #define cpu_has_prefetch                1
22 #define cpu_has_mcheck                  1
23 #define cpu_has_ejtag                   1
24 #define cpu_has_llsc                    1
25
26 /* cpu_has_mips16 */
27 #define cpu_has_mdmx                    0
28 #define cpu_has_mips3d                  0
29 #define cpu_has_rixi                    0
30 #define cpu_has_mmips                   0
31 #define cpu_has_smartmips               0
32 #define cpu_has_vtag_icache             0
33 /* cpu_has_dc_aliases */
34 #define cpu_has_ic_fills_f_dc           0
35 #define cpu_has_pindexed_dcache         0
36 #define cpu_icache_snoops_remote_store  0
37
38 #define cpu_has_mips_2                  1
39 #define cpu_has_mips_3                  0
40 #define cpu_has_mips32r1                1
41 #if defined(CONFIG_BCM47XX_BCMA) && !defined(CONFIG_BCM47XX_SSB)
42 #define cpu_has_mips32r2                1
43 #elif defined(CONFIG_BCM47XX_SSB) && !defined(CONFIG_BCM47XX_BCMA)
44 #define cpu_has_mips32r2                0
45 #endif
46 #define cpu_has_mips64r1                0
47 #define cpu_has_mips64r2                0
48
49 #if defined(CONFIG_BCM47XX_BCMA) && !defined(CONFIG_BCM47XX_SSB)
50 #define cpu_has_dsp                     1
51 #define cpu_has_dsp2                    1
52 #elif defined(CONFIG_BCM47XX_SSB) && !defined(CONFIG_BCM47XX_BCMA)
53 #define cpu_has_dsp                     0
54 #define cpu_has_dsp2                    0
55 #endif
56 #define cpu_has_mipsmt                  0
57 /* cpu_has_userlocal */
58
59 #define cpu_has_nofpuex                 0
60 #define cpu_has_64bits                  0
61 #define cpu_has_64bit_zero_reg          0
62 #if defined(CONFIG_BCM47XX_BCMA) && !defined(CONFIG_BCM47XX_SSB)
63 #define cpu_has_vint                    1
64 #elif defined(CONFIG_BCM47XX_SSB) && !defined(CONFIG_BCM47XX_BCMA)
65 #define cpu_has_vint                    0
66 #endif
67 #define cpu_has_veic                    0
68 #define cpu_has_inclusive_pcaches       0
69
70 #if defined(CONFIG_BCM47XX_BCMA) && !defined(CONFIG_BCM47XX_SSB)
71 #define cpu_dcache_line_size()          32
72 #define cpu_icache_line_size()          32
73 #define cpu_has_perf_cntr_intr_bit      1
74 #elif defined(CONFIG_BCM47XX_SSB) && !defined(CONFIG_BCM47XX_BCMA)
75 #define cpu_dcache_line_size()          16
76 #define cpu_icache_line_size()          16
77 #define cpu_has_perf_cntr_intr_bit      0
78 #endif
79 #define cpu_scache_line_size()          0
80 #define cpu_has_vz                      0
81
82 #endif /* __ASM_MACH_BCM47XX_CPU_FEATURE_OVERRIDES_H */