Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / arch / arm / probes / kprobes / test-arm.c
1 /*
2  * arch/arm/kernel/kprobes-test-arm.c
3  *
4  * Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <asm/system_info.h>
14 #include <asm/opcodes.h>
15 #include <asm/probes.h>
16
17 #include "test-core.h"
18
19
20 #define TEST_ISA "32"
21
22 #define TEST_ARM_TO_THUMB_INTERWORK_R(code1, reg, val, code2)   \
23         TESTCASE_START(code1 #reg code2)                        \
24         TEST_ARG_REG(reg, val)                                  \
25         TEST_ARG_REG(14, 99f)                                   \
26         TEST_ARG_END("")                                        \
27         "50:    nop                     \n\t"                   \
28         "1:     "code1 #reg code2"      \n\t"                   \
29         "       bx      lr              \n\t"                   \
30         ".thumb                         \n\t"                   \
31         "3:     adr     lr, 2f          \n\t"                   \
32         "       bx      lr              \n\t"                   \
33         ".arm                           \n\t"                   \
34         "2:     nop                     \n\t"                   \
35         TESTCASE_END
36
37 #define TEST_ARM_TO_THUMB_INTERWORK_P(code1, reg, val, code2)   \
38         TESTCASE_START(code1 #reg code2)                        \
39         TEST_ARG_PTR(reg, val)                                  \
40         TEST_ARG_REG(14, 99f)                                   \
41         TEST_ARG_MEM(15, 3f+1)                                  \
42         TEST_ARG_END("")                                        \
43         "50:    nop                     \n\t"                   \
44         "1:     "code1 #reg code2"      \n\t"                   \
45         "       bx      lr              \n\t"                   \
46         ".thumb                         \n\t"                   \
47         "3:     adr     lr, 2f          \n\t"                   \
48         "       bx      lr              \n\t"                   \
49         ".arm                           \n\t"                   \
50         "2:     nop                     \n\t"                   \
51         TESTCASE_END
52
53
54 void kprobe_arm_test_cases(void)
55 {
56         kprobe_test_flags = 0;
57
58         TEST_GROUP("Data-processing (register), (register-shifted register), (immediate)")
59
60 #define _DATA_PROCESSING_DNM(op,s,val)                                          \
61         TEST_RR(  op "eq" s "   r0,  r",1, VAL1,", r",2, val, "")               \
62         TEST_RR(  op "ne" s "   r1,  r",1, VAL1,", r",2, val, ", lsl #3")       \
63         TEST_RR(  op "cs" s "   r2,  r",3, VAL1,", r",2, val, ", lsr #4")       \
64         TEST_RR(  op "cc" s "   r3,  r",3, VAL1,", r",2, val, ", asr #5")       \
65         TEST_RR(  op "mi" s "   r4,  r",5, VAL1,", r",2, N(val),", asr #6")     \
66         TEST_RR(  op "pl" s "   r5,  r",5, VAL1,", r",2, val, ", ror #7")       \
67         TEST_RR(  op "vs" s "   r6,  r",7, VAL1,", r",2, val, ", rrx")          \
68         TEST_R(   op "vc" s "   r6,  r",7, VAL1,", pc, lsl #3")                 \
69         TEST_R(   op "vc" s "   r6,  r",7, VAL1,", sp, lsr #4")                 \
70         TEST_R(   op "vc" s "   r6,  pc, r",7, VAL1,", asr #5")                 \
71         TEST_R(   op "vc" s "   r6,  sp, r",7, VAL1,", ror #6")                 \
72         TEST_RRR( op "hi" s "   r8,  r",9, VAL1,", r",14,val, ", lsl r",0, 3,"")\
73         TEST_RRR( op "ls" s "   r9,  r",9, VAL1,", r",14,val, ", lsr r",7, 4,"")\
74         TEST_RRR( op "ge" s "   r10, r",11,VAL1,", r",14,val, ", asr r",7, 5,"")\
75         TEST_RRR( op "lt" s "   r11, r",11,VAL1,", r",14,N(val),", asr r",7, 6,"")\
76         TEST_RR(  op "gt" s "   r12, r13"       ", r",14,val, ", ror r",14,7,"")\
77         TEST_RR(  op "le" s "   r14, r",0, val, ", r13"       ", lsl r",14,8,"")\
78         TEST_R(   op "eq" s "   r0,  r",11,VAL1,", #0xf5")                      \
79         TEST_R(   op "ne" s "   r11, r",0, VAL1,", #0xf5000000")                \
80         TEST_R(   op s "        r7,  r",8, VAL2,", #0x000af000")                \
81         TEST(     op s "        r4,  pc"        ", #0x00005a00")
82
83 #define DATA_PROCESSING_DNM(op,val)             \
84         _DATA_PROCESSING_DNM(op,"",val)         \
85         _DATA_PROCESSING_DNM(op,"s",val)
86
87 #define DATA_PROCESSING_NM(op,val)                                              \
88         TEST_RR(  op "ne        r",1, VAL1,", r",2, val, "")                    \
89         TEST_RR(  op "eq        r",1, VAL1,", r",2, val, ", lsl #3")            \
90         TEST_RR(  op "cc        r",3, VAL1,", r",2, val, ", lsr #4")            \
91         TEST_RR(  op "cs        r",3, VAL1,", r",2, val, ", asr #5")            \
92         TEST_RR(  op "pl        r",5, VAL1,", r",2, N(val),", asr #6")          \
93         TEST_RR(  op "mi        r",5, VAL1,", r",2, val, ", ror #7")            \
94         TEST_RR(  op "vc        r",7, VAL1,", r",2, val, ", rrx")               \
95         TEST_R (  op "vs        r",7, VAL1,", pc, lsl #3")                      \
96         TEST_R (  op "vs        r",7, VAL1,", sp, lsr #4")                      \
97         TEST_R(   op "vs        pc, r",7, VAL1,", asr #5")                      \
98         TEST_R(   op "vs        sp, r",7, VAL1,", ror #6")                      \
99         TEST_RRR( op "ls        r",9, VAL1,", r",14,val, ", lsl r",0, 3,"")     \
100         TEST_RRR( op "hi        r",9, VAL1,", r",14,val, ", lsr r",7, 4,"")     \
101         TEST_RRR( op "lt        r",11,VAL1,", r",14,val, ", asr r",7, 5,"")     \
102         TEST_RRR( op "ge        r",11,VAL1,", r",14,N(val),", asr r",7, 6,"")   \
103         TEST_RR(  op "le        r13"       ", r",14,val, ", ror r",14,7,"")     \
104         TEST_RR(  op "gt        r",0, val, ", r13"       ", lsl r",14,8,"")     \
105         TEST_R(   op "eq        r",11,VAL1,", #0xf5")                           \
106         TEST_R(   op "ne        r",0, VAL1,", #0xf5000000")                     \
107         TEST_R(   op "  r",8, VAL2,", #0x000af000")
108
109 #define _DATA_PROCESSING_DM(op,s,val)                                   \
110         TEST_R(   op "eq" s "   r0,  r",1, val, "")                     \
111         TEST_R(   op "ne" s "   r1,  r",1, val, ", lsl #3")             \
112         TEST_R(   op "cs" s "   r2,  r",3, val, ", lsr #4")             \
113         TEST_R(   op "cc" s "   r3,  r",3, val, ", asr #5")             \
114         TEST_R(   op "mi" s "   r4,  r",5, N(val),", asr #6")           \
115         TEST_R(   op "pl" s "   r5,  r",5, val, ", ror #7")             \
116         TEST_R(   op "vs" s "   r6,  r",10,val, ", rrx")                \
117         TEST(     op "vs" s "   r7,  pc, lsl #3")                       \
118         TEST(     op "vs" s "   r7,  sp, lsr #4")                       \
119         TEST_RR(  op "vc" s "   r8,  r",7, val, ", lsl r",0, 3,"")      \
120         TEST_RR(  op "hi" s "   r9,  r",9, val, ", lsr r",7, 4,"")      \
121         TEST_RR(  op "ls" s "   r10, r",9, val, ", asr r",7, 5,"")      \
122         TEST_RR(  op "ge" s "   r11, r",11,N(val),", asr r",7, 6,"")    \
123         TEST_RR(  op "lt" s "   r12, r",11,val, ", ror r",14,7,"")      \
124         TEST_R(   op "gt" s "   r14, r13"       ", lsl r",14,8,"")      \
125         TEST(     op "eq" s "   r0,  #0xf5")                            \
126         TEST(     op "ne" s "   r11, #0xf5000000")                      \
127         TEST(     op s "        r7,  #0x000af000")                      \
128         TEST(     op s "        r4,  #0x00005a00")
129
130 #define DATA_PROCESSING_DM(op,val)              \
131         _DATA_PROCESSING_DM(op,"",val)          \
132         _DATA_PROCESSING_DM(op,"s",val)
133
134         DATA_PROCESSING_DNM("and",0xf00f00ff)
135         DATA_PROCESSING_DNM("eor",0xf00f00ff)
136         DATA_PROCESSING_DNM("sub",VAL2)
137         DATA_PROCESSING_DNM("rsb",VAL2)
138         DATA_PROCESSING_DNM("add",VAL2)
139         DATA_PROCESSING_DNM("adc",VAL2)
140         DATA_PROCESSING_DNM("sbc",VAL2)
141         DATA_PROCESSING_DNM("rsc",VAL2)
142         DATA_PROCESSING_NM("tst",0xf00f00ff)
143         DATA_PROCESSING_NM("teq",0xf00f00ff)
144         DATA_PROCESSING_NM("cmp",VAL2)
145         DATA_PROCESSING_NM("cmn",VAL2)
146         DATA_PROCESSING_DNM("orr",0xf00f00ff)
147         DATA_PROCESSING_DM("mov",VAL2)
148         DATA_PROCESSING_DNM("bic",0xf00f00ff)
149         DATA_PROCESSING_DM("mvn",VAL2)
150
151         TEST("mov       ip, sp") /* This has special case emulation code */
152
153         TEST_SUPPORTED("mov     pc, #0x1000");
154         TEST_SUPPORTED("mov     sp, #0x1000");
155         TEST_SUPPORTED("cmp     pc, #0x1000");
156         TEST_SUPPORTED("cmp     sp, #0x1000");
157
158         /* Data-processing with PC and a shift count in a register */
159         TEST_UNSUPPORTED(__inst_arm(0xe15c0f1e) "       @ cmp   r12, r14, asl pc")
160         TEST_UNSUPPORTED(__inst_arm(0xe1a0cf1e) "       @ mov   r12, r14, asl pc")
161         TEST_UNSUPPORTED(__inst_arm(0xe08caf1e) "       @ add   r10, r12, r14, asl pc")
162         TEST_UNSUPPORTED(__inst_arm(0xe151021f) "       @ cmp   r1, pc, lsl r2")
163         TEST_UNSUPPORTED(__inst_arm(0xe17f0211) "       @ cmn   pc, r1, lsl r2")
164         TEST_UNSUPPORTED(__inst_arm(0xe1a0121f) "       @ mov   r1, pc, lsl r2")
165         TEST_UNSUPPORTED(__inst_arm(0xe1a0f211) "       @ mov   pc, r1, lsl r2")
166         TEST_UNSUPPORTED(__inst_arm(0xe042131f) "       @ sub   r1, r2, pc, lsl r3")
167         TEST_UNSUPPORTED(__inst_arm(0xe1cf1312) "       @ bic   r1, pc, r2, lsl r3")
168         TEST_UNSUPPORTED(__inst_arm(0xe081f312) "       @ add   pc, r1, r2, lsl r3")
169
170         /* Data-processing with PC as a target and status registers updated */
171         TEST_UNSUPPORTED("movs  pc, r1")
172         TEST_UNSUPPORTED("movs  pc, r1, lsl r2")
173         TEST_UNSUPPORTED("movs  pc, #0x10000")
174         TEST_UNSUPPORTED("adds  pc, lr, r1")
175         TEST_UNSUPPORTED("adds  pc, lr, r1, lsl r2")
176         TEST_UNSUPPORTED("adds  pc, lr, #4")
177
178         /* Data-processing with SP as target */
179         TEST("add       sp, sp, #16")
180         TEST("sub       sp, sp, #8")
181         TEST("bic       sp, sp, #0x20")
182         TEST("orr       sp, sp, #0x20")
183         TEST_PR( "add   sp, r",10,0,", r",11,4,"")
184         TEST_PRR("add   sp, r",10,0,", r",11,4,", asl r",12,1,"")
185         TEST_P(  "mov   sp, r",10,0,"")
186         TEST_PR( "mov   sp, r",10,0,", asl r",12,0,"")
187
188         /* Data-processing with PC as target */
189         TEST_BF(   "add pc, pc, #2f-1b-8")
190         TEST_BF_R ("add pc, pc, r",14,2f-1f-8,"")
191         TEST_BF_R ("add pc, r",14,2f-1f-8,", pc")
192         TEST_BF_R ("mov pc, r",0,2f,"")
193         TEST_BF_R ("add pc, pc, r",14,(2f-1f-8)*2,", asr #1")
194         TEST_BB(   "sub pc, pc, #1b-2b+8")
195 #if __LINUX_ARM_ARCH__ == 6 && !defined(CONFIG_CPU_V7)
196         TEST_BB(   "sub pc, pc, #1b-2b+8-2") /* UNPREDICTABLE before and after ARMv6 */
197 #endif
198         TEST_BB_R( "sub pc, pc, r",14, 1f-2f+8,"")
199         TEST_BB_R( "rsb pc, r",14,1f-2f+8,", pc")
200         TEST_R(    "add pc, pc, r",10,-2,", asl #1")
201 #ifdef CONFIG_THUMB2_KERNEL
202         TEST_ARM_TO_THUMB_INTERWORK_R("add      pc, pc, r",0,3f-1f-8+1,"")
203         TEST_ARM_TO_THUMB_INTERWORK_R("sub      pc, r",0,3f+8+1,", #8")
204 #endif
205         TEST_GROUP("Miscellaneous instructions")
206
207         TEST_RMASKED("mrs       r",0,~PSR_IGNORE_BITS,", cpsr")
208         TEST_RMASKED("mrspl     r",7,~PSR_IGNORE_BITS,", cpsr")
209         TEST_RMASKED("mrs       r",14,~PSR_IGNORE_BITS,", cpsr")
210         TEST_UNSUPPORTED(__inst_arm(0xe10ff000) "       @ mrs r15, cpsr")
211         TEST_UNSUPPORTED("mrs   r0, spsr")
212         TEST_UNSUPPORTED("mrs   lr, spsr")
213
214         TEST_UNSUPPORTED("msr   cpsr, r0")
215         TEST_UNSUPPORTED("msr   cpsr_f, lr")
216         TEST_UNSUPPORTED("msr   spsr, r0")
217
218 #if __LINUX_ARM_ARCH__ >= 5 || \
219     (__LINUX_ARM_ARCH__ == 4 && !defined(CONFIG_CPU_32v4))
220         TEST_BF_R("bx   r",0,2f,"")
221         TEST_BB_R("bx   r",7,2f,"")
222         TEST_BF_R("bxeq r",14,2f,"")
223 #endif
224
225 #if __LINUX_ARM_ARCH__ >= 5
226         TEST_R("clz     r0, r",0, 0x0,"")
227         TEST_R("clzeq   r7, r",14,0x1,"")
228         TEST_R("clz     lr, r",7, 0xffffffff,"")
229         TEST(  "clz     r4, sp")
230         TEST_UNSUPPORTED(__inst_arm(0x016fff10) "       @ clz pc, r0")
231         TEST_UNSUPPORTED(__inst_arm(0x016f0f1f) "       @ clz r0, pc")
232
233 #if __LINUX_ARM_ARCH__ >= 6
234         TEST_UNSUPPORTED("bxj   r0")
235 #endif
236
237         TEST_BF_R("blx  r",0,2f,"")
238         TEST_BB_R("blx  r",7,2f,"")
239         TEST_BF_R("blxeq        r",14,2f,"")
240         TEST_UNSUPPORTED(__inst_arm(0x0120003f) "       @ blx pc")
241
242         TEST_RR(   "qadd        r0, r",1, VAL1,", r",2, VAL2,"")
243         TEST_RR(   "qaddvs      lr, r",9, VAL2,", r",8, VAL1,"")
244         TEST_R(    "qadd        lr, r",9, VAL2,", r13")
245         TEST_RR(   "qsub        r0, r",1, VAL1,", r",2, VAL2,"")
246         TEST_RR(   "qsubvs      lr, r",9, VAL2,", r",8, VAL1,"")
247         TEST_R(    "qsub        lr, r",9, VAL2,", r13")
248         TEST_RR(   "qdadd       r0, r",1, VAL1,", r",2, VAL2,"")
249         TEST_RR(   "qdaddvs     lr, r",9, VAL2,", r",8, VAL1,"")
250         TEST_R(    "qdadd       lr, r",9, VAL2,", r13")
251         TEST_RR(   "qdsub       r0, r",1, VAL1,", r",2, VAL2,"")
252         TEST_RR(   "qdsubvs     lr, r",9, VAL2,", r",8, VAL1,"")
253         TEST_R(    "qdsub       lr, r",9, VAL2,", r13")
254         TEST_UNSUPPORTED(__inst_arm(0xe101f050) "       @ qadd pc, r0, r1")
255         TEST_UNSUPPORTED(__inst_arm(0xe121f050) "       @ qsub pc, r0, r1")
256         TEST_UNSUPPORTED(__inst_arm(0xe141f050) "       @ qdadd pc, r0, r1")
257         TEST_UNSUPPORTED(__inst_arm(0xe161f050) "       @ qdsub pc, r0, r1")
258         TEST_UNSUPPORTED(__inst_arm(0xe16f2050) "       @ qdsub r2, r0, pc")
259         TEST_UNSUPPORTED(__inst_arm(0xe161205f) "       @ qdsub r2, pc, r1")
260
261         TEST_UNSUPPORTED("bkpt  0xffff")
262         TEST_UNSUPPORTED("bkpt  0x0000")
263
264         TEST_UNSUPPORTED(__inst_arm(0xe1600070) " @ smc #0")
265
266         TEST_GROUP("Halfword multiply and multiply-accumulate")
267
268         TEST_RRR(    "smlabb    r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
269         TEST_RRR(    "smlabbge  r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
270         TEST_RR(     "smlabb    lr, r",1, VAL2,", r",2, VAL3,", r13")
271         TEST_UNSUPPORTED(__inst_arm(0xe10f3281) " @ smlabb pc, r1, r2, r3")
272         TEST_RRR(    "smlatb    r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
273         TEST_RRR(    "smlatbge  r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
274         TEST_RR(     "smlatb    lr, r",1, VAL2,", r",2, VAL3,", r13")
275         TEST_UNSUPPORTED(__inst_arm(0xe10f32a1) " @ smlatb pc, r1, r2, r3")
276         TEST_RRR(    "smlabt    r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
277         TEST_RRR(    "smlabtge  r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
278         TEST_RR(     "smlabt    lr, r",1, VAL2,", r",2, VAL3,", r13")
279         TEST_UNSUPPORTED(__inst_arm(0xe10f32c1) " @ smlabt pc, r1, r2, r3")
280         TEST_RRR(    "smlatt    r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
281         TEST_RRR(    "smlattge  r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
282         TEST_RR(     "smlatt    lr, r",1, VAL2,", r",2, VAL3,", r13")
283         TEST_UNSUPPORTED(__inst_arm(0xe10f32e1) " @ smlatt pc, r1, r2, r3")
284
285         TEST_RRR(    "smlawb    r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
286         TEST_RRR(    "smlawbge  r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
287         TEST_RR(     "smlawb    lr, r",1, VAL2,", r",2, VAL3,", r13")
288         TEST_UNSUPPORTED(__inst_arm(0xe12f3281) " @ smlawb pc, r1, r2, r3")
289         TEST_RRR(    "smlawt    r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
290         TEST_RRR(    "smlawtge  r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
291         TEST_RR(     "smlawt    lr, r",1, VAL2,", r",2, VAL3,", r13")
292         TEST_UNSUPPORTED(__inst_arm(0xe12f32c1) " @ smlawt pc, r1, r2, r3")
293         TEST_UNSUPPORTED(__inst_arm(0xe12032cf) " @ smlawt r0, pc, r2, r3")
294         TEST_UNSUPPORTED(__inst_arm(0xe1203fc1) " @ smlawt r0, r1, pc, r3")
295         TEST_UNSUPPORTED(__inst_arm(0xe120f2c1) " @ smlawt r0, r1, r2, pc")
296
297         TEST_RR(    "smulwb     r0, r",1, VAL1,", r",2, VAL2,"")
298         TEST_RR(    "smulwbge   r7, r",8, VAL3,", r",9, VAL1,"")
299         TEST_R(     "smulwb     lr, r",1, VAL2,", r13")
300         TEST_UNSUPPORTED(__inst_arm(0xe12f02a1) " @ smulwb pc, r1, r2")
301         TEST_RR(    "smulwt     r0, r",1, VAL1,", r",2, VAL2,"")
302         TEST_RR(    "smulwtge   r7, r",8, VAL3,", r",9, VAL1,"")
303         TEST_R(     "smulwt     lr, r",1, VAL2,", r13")
304         TEST_UNSUPPORTED(__inst_arm(0xe12f02e1) " @ smulwt pc, r1, r2")
305
306         TEST_RRRR(  "smlalbb    r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
307         TEST_RRRR(  "smlalbble  r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
308         TEST_RRR(   "smlalbb    r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
309         TEST_UNSUPPORTED(__inst_arm(0xe14f1382) " @ smlalbb pc, r1, r2, r3")
310         TEST_UNSUPPORTED(__inst_arm(0xe141f382) " @ smlalbb r1, pc, r2, r3")
311         TEST_RRRR(  "smlaltb    r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
312         TEST_RRRR(  "smlaltble  r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
313         TEST_RRR(   "smlaltb    r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
314         TEST_UNSUPPORTED(__inst_arm(0xe14f13a2) " @ smlaltb pc, r1, r2, r3")
315         TEST_UNSUPPORTED(__inst_arm(0xe141f3a2) " @ smlaltb r1, pc, r2, r3")
316         TEST_RRRR(  "smlalbt    r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
317         TEST_RRRR(  "smlalbtle  r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
318         TEST_RRR(   "smlalbt    r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
319         TEST_UNSUPPORTED(__inst_arm(0xe14f13c2) " @ smlalbt pc, r1, r2, r3")
320         TEST_UNSUPPORTED(__inst_arm(0xe141f3c2) " @ smlalbt r1, pc, r2, r3")
321         TEST_RRRR(  "smlaltt    r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
322         TEST_RRRR(  "smlalttle  r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
323         TEST_RRR(   "smlaltt    r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
324         TEST_UNSUPPORTED(__inst_arm(0xe14f13e2) " @ smlalbb pc, r1, r2, r3")
325         TEST_UNSUPPORTED(__inst_arm(0xe140f3e2) " @ smlalbb r0, pc, r2, r3")
326         TEST_UNSUPPORTED(__inst_arm(0xe14013ef) " @ smlalbb r0, r1, pc, r3")
327         TEST_UNSUPPORTED(__inst_arm(0xe1401fe2) " @ smlalbb r0, r1, r2, pc")
328
329         TEST_RR(    "smulbb     r0, r",1, VAL1,", r",2, VAL2,"")
330         TEST_RR(    "smulbbge   r7, r",8, VAL3,", r",9, VAL1,"")
331         TEST_R(     "smulbb     lr, r",1, VAL2,", r13")
332         TEST_UNSUPPORTED(__inst_arm(0xe16f0281) " @ smulbb pc, r1, r2")
333         TEST_RR(    "smultb     r0, r",1, VAL1,", r",2, VAL2,"")
334         TEST_RR(    "smultbge   r7, r",8, VAL3,", r",9, VAL1,"")
335         TEST_R(     "smultb     lr, r",1, VAL2,", r13")
336         TEST_UNSUPPORTED(__inst_arm(0xe16f02a1) " @ smultb pc, r1, r2")
337         TEST_RR(    "smulbt     r0, r",1, VAL1,", r",2, VAL2,"")
338         TEST_RR(    "smulbtge   r7, r",8, VAL3,", r",9, VAL1,"")
339         TEST_R(     "smulbt     lr, r",1, VAL2,", r13")
340         TEST_UNSUPPORTED(__inst_arm(0xe16f02c1) " @ smultb pc, r1, r2")
341         TEST_RR(    "smultt     r0, r",1, VAL1,", r",2, VAL2,"")
342         TEST_RR(    "smulttge   r7, r",8, VAL3,", r",9, VAL1,"")
343         TEST_R(     "smultt     lr, r",1, VAL2,", r13")
344         TEST_UNSUPPORTED(__inst_arm(0xe16f02e1) " @ smultt pc, r1, r2")
345         TEST_UNSUPPORTED(__inst_arm(0xe16002ef) " @ smultt r0, pc, r2")
346         TEST_UNSUPPORTED(__inst_arm(0xe1600fe1) " @ smultt r0, r1, pc")
347 #endif
348
349         TEST_GROUP("Multiply and multiply-accumulate")
350
351         TEST_RR(    "mul        r0, r",1, VAL1,", r",2, VAL2,"")
352         TEST_RR(    "mulls      r7, r",8, VAL2,", r",9, VAL2,"")
353         TEST_R(     "mul        lr, r",4, VAL3,", r13")
354         TEST_UNSUPPORTED(__inst_arm(0xe00f0291) " @ mul pc, r1, r2")
355         TEST_UNSUPPORTED(__inst_arm(0xe000029f) " @ mul r0, pc, r2")
356         TEST_UNSUPPORTED(__inst_arm(0xe0000f91) " @ mul r0, r1, pc")
357         TEST_RR(    "muls       r0, r",1, VAL1,", r",2, VAL2,"")
358         TEST_RR(    "mullss     r7, r",8, VAL2,", r",9, VAL2,"")
359         TEST_R(     "muls       lr, r",4, VAL3,", r13")
360         TEST_UNSUPPORTED(__inst_arm(0xe01f0291) " @ muls pc, r1, r2")
361
362         TEST_RRR(    "mla       r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
363         TEST_RRR(    "mlahi     r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
364         TEST_RR(     "mla       lr, r",1, VAL2,", r",2, VAL3,", r13")
365         TEST_UNSUPPORTED(__inst_arm(0xe02f3291) " @ mla pc, r1, r2, r3")
366         TEST_RRR(    "mlas      r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
367         TEST_RRR(    "mlahis    r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
368         TEST_RR(     "mlas      lr, r",1, VAL2,", r",2, VAL3,", r13")
369         TEST_UNSUPPORTED(__inst_arm(0xe03f3291) " @ mlas pc, r1, r2, r3")
370
371 #if __LINUX_ARM_ARCH__ >= 6
372         TEST_RR(  "umaal        r0, r1, r",2, VAL1,", r",3, VAL2,"")
373         TEST_RR(  "umaalls      r7, r8, r",9, VAL2,", r",10, VAL1,"")
374         TEST_R(   "umaal        lr, r12, r",11,VAL3,", r13")
375         TEST_UNSUPPORTED(__inst_arm(0xe041f392) " @ umaal pc, r1, r2, r3")
376         TEST_UNSUPPORTED(__inst_arm(0xe04f0392) " @ umaal r0, pc, r2, r3")
377         TEST_UNSUPPORTED(__inst_arm(0xe0500090) " @ undef")
378         TEST_UNSUPPORTED(__inst_arm(0xe05fff9f) " @ undef")
379 #endif
380
381 #if __LINUX_ARM_ARCH__ >= 7
382         TEST_RRR(  "mls         r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
383         TEST_RRR(  "mlshi       r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
384         TEST_RR(   "mls         lr, r",1, VAL2,", r",2, VAL3,", r13")
385         TEST_UNSUPPORTED(__inst_arm(0xe06f3291) " @ mls pc, r1, r2, r3")
386         TEST_UNSUPPORTED(__inst_arm(0xe060329f) " @ mls r0, pc, r2, r3")
387         TEST_UNSUPPORTED(__inst_arm(0xe0603f91) " @ mls r0, r1, pc, r3")
388         TEST_UNSUPPORTED(__inst_arm(0xe060f291) " @ mls r0, r1, r2, pc")
389 #endif
390
391         TEST_UNSUPPORTED(__inst_arm(0xe0700090) " @ undef")
392         TEST_UNSUPPORTED(__inst_arm(0xe07fff9f) " @ undef")
393
394         TEST_RR(  "umull        r0, r1, r",2, VAL1,", r",3, VAL2,"")
395         TEST_RR(  "umullls      r7, r8, r",9, VAL2,", r",10, VAL1,"")
396         TEST_R(   "umull        lr, r12, r",11,VAL3,", r13")
397         TEST_UNSUPPORTED(__inst_arm(0xe081f392) " @ umull pc, r1, r2, r3")
398         TEST_UNSUPPORTED(__inst_arm(0xe08f1392) " @ umull r1, pc, r2, r3")
399         TEST_RR(  "umulls       r0, r1, r",2, VAL1,", r",3, VAL2,"")
400         TEST_RR(  "umulllss     r7, r8, r",9, VAL2,", r",10, VAL1,"")
401         TEST_R(   "umulls       lr, r12, r",11,VAL3,", r13")
402         TEST_UNSUPPORTED(__inst_arm(0xe091f392) " @ umulls pc, r1, r2, r3")
403         TEST_UNSUPPORTED(__inst_arm(0xe09f1392) " @ umulls r1, pc, r2, r3")
404
405         TEST_RRRR(  "umlal      r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
406         TEST_RRRR(  "umlalle    r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
407         TEST_RRR(   "umlal      r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
408         TEST_UNSUPPORTED(__inst_arm(0xe0af1392) " @ umlal pc, r1, r2, r3")
409         TEST_UNSUPPORTED(__inst_arm(0xe0a1f392) " @ umlal r1, pc, r2, r3")
410         TEST_RRRR(  "umlals     r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
411         TEST_RRRR(  "umlalles   r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
412         TEST_RRR(   "umlals     r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
413         TEST_UNSUPPORTED(__inst_arm(0xe0bf1392) " @ umlals pc, r1, r2, r3")
414         TEST_UNSUPPORTED(__inst_arm(0xe0b1f392) " @ umlals r1, pc, r2, r3")
415
416         TEST_RR(  "smull        r0, r1, r",2, VAL1,", r",3, VAL2,"")
417         TEST_RR(  "smullls      r7, r8, r",9, VAL2,", r",10, VAL1,"")
418         TEST_R(   "smull        lr, r12, r",11,VAL3,", r13")
419         TEST_UNSUPPORTED(__inst_arm(0xe0c1f392) " @ smull pc, r1, r2, r3")
420         TEST_UNSUPPORTED(__inst_arm(0xe0cf1392) " @ smull r1, pc, r2, r3")
421         TEST_RR(  "smulls       r0, r1, r",2, VAL1,", r",3, VAL2,"")
422         TEST_RR(  "smulllss     r7, r8, r",9, VAL2,", r",10, VAL1,"")
423         TEST_R(   "smulls       lr, r12, r",11,VAL3,", r13")
424         TEST_UNSUPPORTED(__inst_arm(0xe0d1f392) " @ smulls pc, r1, r2, r3")
425         TEST_UNSUPPORTED(__inst_arm(0xe0df1392) " @ smulls r1, pc, r2, r3")
426
427         TEST_RRRR(  "smlal      r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
428         TEST_RRRR(  "smlalle    r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
429         TEST_RRR(   "smlal      r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
430         TEST_UNSUPPORTED(__inst_arm(0xe0ef1392) " @ smlal pc, r1, r2, r3")
431         TEST_UNSUPPORTED(__inst_arm(0xe0e1f392) " @ smlal r1, pc, r2, r3")
432         TEST_RRRR(  "smlals     r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
433         TEST_RRRR(  "smlalles   r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
434         TEST_RRR(   "smlals     r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
435         TEST_UNSUPPORTED(__inst_arm(0xe0ff1392) " @ smlals pc, r1, r2, r3")
436         TEST_UNSUPPORTED(__inst_arm(0xe0f0f392) " @ smlals r0, pc, r2, r3")
437         TEST_UNSUPPORTED(__inst_arm(0xe0f0139f) " @ smlals r0, r1, pc, r3")
438         TEST_UNSUPPORTED(__inst_arm(0xe0f01f92) " @ smlals r0, r1, r2, pc")
439
440         TEST_GROUP("Synchronization primitives")
441
442 #if __LINUX_ARM_ARCH__ < 6
443         TEST_RP("swp    lr, r",7,VAL2,", [r",8,0,"]")
444         TEST_R( "swpvs  r0, r",1,VAL1,", [sp]")
445         TEST_RP("swp    sp, r",14,VAL2,", [r",12,13*4,"]")
446 #else
447         TEST_UNSUPPORTED(__inst_arm(0xe108e097) " @ swp lr, r7, [r8]")
448         TEST_UNSUPPORTED(__inst_arm(0x610d0091) " @ swpvs       r0, r1, [sp]")
449         TEST_UNSUPPORTED(__inst_arm(0xe10cd09e) " @ swp sp, r14 [r12]")
450 #endif
451         TEST_UNSUPPORTED(__inst_arm(0xe102f091) " @ swp pc, r1, [r2]")
452         TEST_UNSUPPORTED(__inst_arm(0xe102009f) " @ swp r0, pc, [r2]")
453         TEST_UNSUPPORTED(__inst_arm(0xe10f0091) " @ swp r0, r1, [pc]")
454 #if __LINUX_ARM_ARCH__ < 6
455         TEST_RP("swpb   lr, r",7,VAL2,", [r",8,0,"]")
456         TEST_R( "swpvsb r0, r",1,VAL1,", [sp]")
457 #else
458         TEST_UNSUPPORTED(__inst_arm(0xe148e097) " @ swpb        lr, r7, [r8]")
459         TEST_UNSUPPORTED(__inst_arm(0x614d0091) " @ swpvsb      r0, r1, [sp]")
460 #endif
461         TEST_UNSUPPORTED(__inst_arm(0xe142f091) " @ swpb pc, r1, [r2]")
462
463         TEST_UNSUPPORTED(__inst_arm(0xe1100090)) /* Unallocated space */
464         TEST_UNSUPPORTED(__inst_arm(0xe1200090)) /* Unallocated space */
465         TEST_UNSUPPORTED(__inst_arm(0xe1300090)) /* Unallocated space */
466         TEST_UNSUPPORTED(__inst_arm(0xe1500090)) /* Unallocated space */
467         TEST_UNSUPPORTED(__inst_arm(0xe1600090)) /* Unallocated space */
468         TEST_UNSUPPORTED(__inst_arm(0xe1700090)) /* Unallocated space */
469 #if __LINUX_ARM_ARCH__ >= 6
470         TEST_UNSUPPORTED("ldrex r2, [sp]")
471 #endif
472 #if (__LINUX_ARM_ARCH__ >= 7) || defined(CONFIG_CPU_32v6K)
473         TEST_UNSUPPORTED("strexd        r0, r2, r3, [sp]")
474         TEST_UNSUPPORTED("ldrexd        r2, r3, [sp]")
475         TEST_UNSUPPORTED("strexb        r0, r2, [sp]")
476         TEST_UNSUPPORTED("ldrexb        r2, [sp]")
477         TEST_UNSUPPORTED("strexh        r0, r2, [sp]")
478         TEST_UNSUPPORTED("ldrexh        r2, [sp]")
479 #endif
480         TEST_GROUP("Extra load/store instructions")
481
482         TEST_RPR(  "strh        r",0, VAL1,", [r",1, 48,", -r",2, 24,"]")
483         TEST_RPR(  "streqh      r",14,VAL2,", [r",11,0, ", r",12, 48,"]")
484         TEST_UNSUPPORTED(  "streqh      r14, [r13, r12]")
485         TEST_UNSUPPORTED(  "streqh      r14, [r12, r13]")
486         TEST_RPR(  "strh        r",1, VAL1,", [r",2, 24,", r",3,  48,"]!")
487         TEST_RPR(  "strneh      r",12,VAL2,", [r",11,48,", -r",10,24,"]!")
488         TEST_RPR(  "strh        r",2, VAL1,", [r",3, 24,"], r",4, 48,"")
489         TEST_RPR(  "strh        r",10,VAL2,", [r",9, 48,"], -r",11,24,"")
490         TEST_UNSUPPORTED(__inst_arm(0xe1afc0ba) "       @ strh r12, [pc, r10]!")
491         TEST_UNSUPPORTED(__inst_arm(0xe089f0bb) "       @ strh pc, [r9], r11")
492         TEST_UNSUPPORTED(__inst_arm(0xe089a0bf) "       @ strh r10, [r9], pc")
493
494         TEST_PR(   "ldrh        r0, [r",0,  48,", -r",2, 24,"]")
495         TEST_PR(   "ldrcsh      r14, [r",13,0, ", r",12, 48,"]")
496         TEST_PR(   "ldrh        r1, [r",2,  24,", r",3,  48,"]!")
497         TEST_PR(   "ldrcch      r12, [r",11,48,", -r",10,24,"]!")
498         TEST_PR(   "ldrh        r2, [r",3,  24,"], r",4, 48,"")
499         TEST_PR(   "ldrh        r10, [r",9, 48,"], -r",11,24,"")
500         TEST_UNSUPPORTED(__inst_arm(0xe1bfc0ba) "       @ ldrh r12, [pc, r10]!")
501         TEST_UNSUPPORTED(__inst_arm(0xe099f0bb) "       @ ldrh pc, [r9], r11")
502         TEST_UNSUPPORTED(__inst_arm(0xe099a0bf) "       @ ldrh r10, [r9], pc")
503
504         TEST_RP(   "strh        r",0, VAL1,", [r",1, 24,", #-2]")
505         TEST_RP(   "strmih      r",14,VAL2,", [r",13,0, ", #2]")
506         TEST_RP(   "strh        r",1, VAL1,", [r",2, 24,", #4]!")
507         TEST_RP(   "strplh      r",12,VAL2,", [r",11,24,", #-4]!")
508         TEST_RP(   "strh        r",2, VAL1,", [r",3, 24,"], #48")
509         TEST_RP(   "strh        r",10,VAL2,", [r",9, 64,"], #-48")
510         TEST_RP(   "strh        r",3, VAL1,", [r",13,TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"]!")
511         TEST_UNSUPPORTED("strh r3, [r13, #-"__stringify(MAX_STACK_SIZE)"-8]!")
512         TEST_RP(   "strh        r",4, VAL1,", [r",14,TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"-8]!")
513         TEST_UNSUPPORTED(__inst_arm(0xe1efc3b0) "       @ strh r12, [pc, #48]!")
514         TEST_UNSUPPORTED(__inst_arm(0xe0c9f3b0) "       @ strh pc, [r9], #48")
515
516         TEST_P(    "ldrh        r0, [r",0,  24,", #-2]")
517         TEST_P(    "ldrvsh      r14, [r",13,0, ", #2]")
518         TEST_P(    "ldrh        r1, [r",2,  24,", #4]!")
519         TEST_P(    "ldrvch      r12, [r",11,24,", #-4]!")
520         TEST_P(    "ldrh        r2, [r",3,  24,"], #48")
521         TEST_P(    "ldrh        r10, [r",9, 64,"], #-48")
522         TEST(      "ldrh        r0, [pc, #0]")
523         TEST_UNSUPPORTED(__inst_arm(0xe1ffc3b0) "       @ ldrh r12, [pc, #48]!")
524         TEST_UNSUPPORTED(__inst_arm(0xe0d9f3b0) "       @ ldrh pc, [r9], #48")
525
526         TEST_PR(   "ldrsb       r0, [r",0,  48,", -r",2, 24,"]")
527         TEST_PR(   "ldrhisb     r14, [r",13,0,", r",12,  48,"]")
528         TEST_PR(   "ldrsb       r1, [r",2,  24,", r",3,  48,"]!")
529         TEST_PR(   "ldrlssb     r12, [r",11,48,", -r",10,24,"]!")
530         TEST_PR(   "ldrsb       r2, [r",3,  24,"], r",4, 48,"")
531         TEST_PR(   "ldrsb       r10, [r",9, 48,"], -r",11,24,"")
532         TEST_UNSUPPORTED(__inst_arm(0xe1bfc0da) "       @ ldrsb r12, [pc, r10]!")
533         TEST_UNSUPPORTED(__inst_arm(0xe099f0db) "       @ ldrsb pc, [r9], r11")
534
535         TEST_P(    "ldrsb       r0, [r",0,  24,", #-1]")
536         TEST_P(    "ldrgesb     r14, [r",13,0, ", #1]")
537         TEST_P(    "ldrsb       r1, [r",2,  24,", #4]!")
538         TEST_P(    "ldrltsb     r12, [r",11,24,", #-4]!")
539         TEST_P(    "ldrsb       r2, [r",3,  24,"], #48")
540         TEST_P(    "ldrsb       r10, [r",9, 64,"], #-48")
541         TEST(      "ldrsb       r0, [pc, #0]")
542         TEST_UNSUPPORTED(__inst_arm(0xe1ffc3d0) "       @ ldrsb r12, [pc, #48]!")
543         TEST_UNSUPPORTED(__inst_arm(0xe0d9f3d0) "       @ ldrsb pc, [r9], #48")
544
545         TEST_PR(   "ldrsh       r0, [r",0,  48,", -r",2, 24,"]")
546         TEST_PR(   "ldrgtsh     r14, [r",13,0, ", r",12, 48,"]")
547         TEST_PR(   "ldrsh       r1, [r",2,  24,", r",3,  48,"]!")
548         TEST_PR(   "ldrlesh     r12, [r",11,48,", -r",10,24,"]!")
549         TEST_PR(   "ldrsh       r2, [r",3,  24,"], r",4, 48,"")
550         TEST_PR(   "ldrsh       r10, [r",9, 48,"], -r",11,24,"")
551         TEST_UNSUPPORTED(__inst_arm(0xe1bfc0fa) "       @ ldrsh r12, [pc, r10]!")
552         TEST_UNSUPPORTED(__inst_arm(0xe099f0fb) "       @ ldrsh pc, [r9], r11")
553
554         TEST_P(    "ldrsh       r0, [r",0,  24,", #-1]")
555         TEST_P(    "ldreqsh     r14, [r",13,0 ,", #1]")
556         TEST_P(    "ldrsh       r1, [r",2,  24,", #4]!")
557         TEST_P(    "ldrnesh     r12, [r",11,24,", #-4]!")
558         TEST_P(    "ldrsh       r2, [r",3,  24,"], #48")
559         TEST_P(    "ldrsh       r10, [r",9, 64,"], #-48")
560         TEST(      "ldrsh       r0, [pc, #0]")
561         TEST_UNSUPPORTED(__inst_arm(0xe1ffc3f0) "       @ ldrsh r12, [pc, #48]!")
562         TEST_UNSUPPORTED(__inst_arm(0xe0d9f3f0) "       @ ldrsh pc, [r9], #48")
563
564 #if __LINUX_ARM_ARCH__ >= 7
565         TEST_UNSUPPORTED("strht r1, [r2], r3")
566         TEST_UNSUPPORTED("ldrht r1, [r2], r3")
567         TEST_UNSUPPORTED("strht r1, [r2], #48")
568         TEST_UNSUPPORTED("ldrht r1, [r2], #48")
569         TEST_UNSUPPORTED("ldrsbt        r1, [r2], r3")
570         TEST_UNSUPPORTED("ldrsbt        r1, [r2], #48")
571         TEST_UNSUPPORTED("ldrsht        r1, [r2], r3")
572         TEST_UNSUPPORTED("ldrsht        r1, [r2], #48")
573 #endif
574
575 #if __LINUX_ARM_ARCH__ >= 5
576         TEST_RPR(  "strd        r",0, VAL1,", [r",1, 48,", -r",2,24,"]")
577         TEST_RPR(  "strccd      r",8, VAL2,", [r",11,0, ", r",12,48,"]")
578         TEST_UNSUPPORTED(  "strccd r8, [r13, r12]")
579         TEST_UNSUPPORTED(  "strccd r8, [r12, r13]")
580         TEST_RPR(  "strd        r",4, VAL1,", [r",2, 24,", r",3, 48,"]!")
581         TEST_RPR(  "strcsd      r",12,VAL2,", [r",11,48,", -r",10,24,"]!")
582         TEST_RPR(  "strd        r",2, VAL1,", [r",5, 24,"], r",4,48,"")
583         TEST_RPR(  "strd        r",10,VAL2,", [r",9, 48,"], -r",7,24,"")
584         TEST_UNSUPPORTED(__inst_arm(0xe1afc0fa) "       @ strd r12, [pc, r10]!")
585
586         TEST_PR(   "ldrd        r0, [r",0, 48,", -r",2,24,"]")
587         TEST_PR(   "ldrmid      r8, [r",13,0, ", r",12,48,"]")
588         TEST_PR(   "ldrd        r4, [r",2, 24,", r",3, 48,"]!")
589         TEST_PR(   "ldrpld      r6, [r",11,48,", -r",10,24,"]!")
590         TEST_PR(   "ldrd        r2, [r",5, 24,"], r",4,48,"")
591         TEST_PR(   "ldrd        r10, [r",9,48,"], -r",7,24,"")
592         TEST_UNSUPPORTED(__inst_arm(0xe1afc0da) "       @ ldrd r12, [pc, r10]!")
593         TEST_UNSUPPORTED(__inst_arm(0xe089f0db) "       @ ldrd pc, [r9], r11")
594         TEST_UNSUPPORTED(__inst_arm(0xe089e0db) "       @ ldrd lr, [r9], r11")
595         TEST_UNSUPPORTED(__inst_arm(0xe089c0df) "       @ ldrd r12, [r9], pc")
596
597         TEST_RP(   "strd        r",0, VAL1,", [r",1, 24,", #-8]")
598         TEST_RP(   "strvsd      r",8, VAL2,", [r",13,0, ", #8]")
599         TEST_RP(   "strd        r",4, VAL1,", [r",2, 24,", #16]!")
600         TEST_RP(   "strvcd      r",12,VAL2,", [r",11,24,", #-16]!")
601         TEST_RP(   "strd        r",2, VAL1,", [r",4, 24,"], #48")
602         TEST_RP(   "strd        r",10,VAL2,", [r",9, 64,"], #-48")
603         TEST_RP(   "strd        r",6, VAL1,", [r",13,TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"]!")
604         TEST_UNSUPPORTED("strd r6, [r13, #-"__stringify(MAX_STACK_SIZE)"-8]!")
605         TEST_RP(   "strd        r",4, VAL1,", [r",12,TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"-8]!")
606         TEST_UNSUPPORTED(__inst_arm(0xe1efc3f0) "       @ strd r12, [pc, #48]!")
607
608         TEST_P(    "ldrd        r0, [r",0, 24,", #-8]")
609         TEST_P(    "ldrhid      r8, [r",13,0, ", #8]")
610         TEST_P(    "ldrd        r4, [r",2, 24,", #16]!")
611         TEST_P(    "ldrlsd      r6, [r",11,24,", #-16]!")
612         TEST_P(    "ldrd        r2, [r",5, 24,"], #48")
613         TEST_P(    "ldrd        r10, [r",9,6,"], #-48")
614         TEST_UNSUPPORTED(__inst_arm(0xe1efc3d0) "       @ ldrd r12, [pc, #48]!")
615         TEST_UNSUPPORTED(__inst_arm(0xe0c9f3d0) "       @ ldrd pc, [r9], #48")
616         TEST_UNSUPPORTED(__inst_arm(0xe0c9e3d0) "       @ ldrd lr, [r9], #48")
617 #endif
618
619         TEST_GROUP("Miscellaneous")
620
621 #if __LINUX_ARM_ARCH__ >= 7
622         TEST("movw      r0, #0")
623         TEST("movw      r0, #0xffff")
624         TEST("movw      lr, #0xffff")
625         TEST_UNSUPPORTED(__inst_arm(0xe300f000) "       @ movw pc, #0")
626         TEST_R("movt    r",0, VAL1,", #0")
627         TEST_R("movt    r",0, VAL2,", #0xffff")
628         TEST_R("movt    r",14,VAL1,", #0xffff")
629         TEST_UNSUPPORTED(__inst_arm(0xe340f000) "       @ movt pc, #0")
630 #endif
631
632         TEST_UNSUPPORTED("msr   cpsr, 0x13")
633         TEST_UNSUPPORTED("msr   cpsr_f, 0xf0000000")
634         TEST_UNSUPPORTED("msr   spsr, 0x13")
635
636 #if __LINUX_ARM_ARCH__ >= 7
637         TEST_SUPPORTED("yield")
638         TEST("sev")
639         TEST("nop")
640         TEST("wfi")
641         TEST_SUPPORTED("wfe")
642         TEST_UNSUPPORTED("dbg #0")
643 #endif
644
645         TEST_GROUP("Load/store word and unsigned byte")
646
647 #define LOAD_STORE(byte)                                                        \
648         TEST_RP( "str"byte"     r",0, VAL1,", [r",1, 24,", #-2]")               \
649         TEST_RP( "str"byte"     r",14,VAL2,", [r",13,0, ", #2]")                \
650         TEST_RP( "str"byte"     r",1, VAL1,", [r",2, 24,", #4]!")               \
651         TEST_RP( "str"byte"     r",12,VAL2,", [r",11,24,", #-4]!")              \
652         TEST_RP( "str"byte"     r",2, VAL1,", [r",3, 24,"], #48")               \
653         TEST_RP( "str"byte"     r",10,VAL2,", [r",9, 64,"], #-48")              \
654         TEST_RP( "str"byte"     r",3, VAL1,", [r",13,TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"]!") \
655         TEST_UNSUPPORTED("str"byte" r3, [r13, #-"__stringify(MAX_STACK_SIZE)"-8]!")                             \
656         TEST_RP( "str"byte"     r",4, VAL1,", [r",10,TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"-8]!") \
657         TEST_RPR("str"byte"     r",0, VAL1,", [r",1, 48,", -r",2, 24,"]")       \
658         TEST_RPR("str"byte"     r",14,VAL2,", [r",11,0, ", r",12, 48,"]")       \
659         TEST_UNSUPPORTED("str"byte" r14, [r13, r12]")                           \
660         TEST_UNSUPPORTED("str"byte" r14, [r12, r13]")                           \
661         TEST_RPR("str"byte"     r",1, VAL1,", [r",2, 24,", r",3,  48,"]!")      \
662         TEST_RPR("str"byte"     r",12,VAL2,", [r",11,48,", -r",10,24,"]!")      \
663         TEST_RPR("str"byte"     r",2, VAL1,", [r",3, 24,"], r",4, 48,"")        \
664         TEST_RPR("str"byte"     r",10,VAL2,", [r",9, 48,"], -r",11,24,"")       \
665         TEST_RPR("str"byte"     r",0, VAL1,", [r",1, 24,", r",2,  32,", asl #1]")\
666         TEST_RPR("str"byte"     r",14,VAL2,", [r",11,0, ", r",12, 32,", lsr #2]")\
667         TEST_UNSUPPORTED("str"byte"     r14, [r13, r12, lsr #2]")               \
668         TEST_RPR("str"byte"     r",1, VAL1,", [r",2, 24,", r",3,  32,", asr #3]!")\
669         TEST_RPR("str"byte"     r",12,VAL2,", [r",11,24,", r",10, 4,", ror #31]!")\
670         TEST_P(  "ldr"byte"     r0, [r",0,  24,", #-2]")                        \
671         TEST_P(  "ldr"byte"     r14, [r",13,0, ", #2]")                         \
672         TEST_P(  "ldr"byte"     r1, [r",2,  24,", #4]!")                        \
673         TEST_P(  "ldr"byte"     r12, [r",11,24,", #-4]!")                       \
674         TEST_P(  "ldr"byte"     r2, [r",3,  24,"], #48")                        \
675         TEST_P(  "ldr"byte"     r10, [r",9, 64,"], #-48")                       \
676         TEST_PR( "ldr"byte"     r0, [r",0,  48,", -r",2, 24,"]")                \
677         TEST_PR( "ldr"byte"     r14, [r",13,0, ", r",12, 48,"]")                \
678         TEST_PR( "ldr"byte"     r1, [r",2,  24,", r",3, 48,"]!")                \
679         TEST_PR( "ldr"byte"     r12, [r",11,48,", -r",10,24,"]!")               \
680         TEST_PR( "ldr"byte"     r2, [r",3,  24,"], r",4, 48,"")                 \
681         TEST_PR( "ldr"byte"     r10, [r",9, 48,"], -r",11,24,"")                \
682         TEST_PR( "ldr"byte"     r0, [r",0,  24,", r",2,  32,", asl #1]")        \
683         TEST_PR( "ldr"byte"     r14, [r",13,0, ", r",12, 32,", lsr #2]")        \
684         TEST_PR( "ldr"byte"     r1, [r",2,  24,", r",3,  32,", asr #3]!")       \
685         TEST_PR( "ldr"byte"     r12, [r",11,24,", r",10, 4,", ror #31]!")       \
686         TEST(    "ldr"byte"     r0, [pc, #0]")                                  \
687         TEST_R(  "ldr"byte"     r12, [pc, r",14,0,"]")
688
689         LOAD_STORE("")
690         TEST_P(   "str  pc, [r",0,0,", #15*4]")
691         TEST_UNSUPPORTED(   "str        pc, [sp, r2]")
692         TEST_BF(  "ldr  pc, [sp, #15*4]")
693         TEST_BF_R("ldr  pc, [sp, r",2,15*4,"]")
694
695         TEST_P(   "str  sp, [r",0,0,", #13*4]")
696         TEST_UNSUPPORTED(   "str        sp, [sp, r2]")
697         TEST_BF(  "ldr  sp, [sp, #13*4]")
698         TEST_BF_R("ldr  sp, [sp, r",2,13*4,"]")
699
700 #ifdef CONFIG_THUMB2_KERNEL
701         TEST_ARM_TO_THUMB_INTERWORK_P("ldr      pc, [r",0,0,", #15*4]")
702 #endif
703         TEST_UNSUPPORTED(__inst_arm(0xe5af6008) "       @ str r6, [pc, #8]!")
704         TEST_UNSUPPORTED(__inst_arm(0xe7af6008) "       @ str r6, [pc, r8]!")
705         TEST_UNSUPPORTED(__inst_arm(0xe5bf6008) "       @ ldr r6, [pc, #8]!")
706         TEST_UNSUPPORTED(__inst_arm(0xe7bf6008) "       @ ldr r6, [pc, r8]!")
707         TEST_UNSUPPORTED(__inst_arm(0xe788600f) "       @ str r6, [r8, pc]")
708         TEST_UNSUPPORTED(__inst_arm(0xe798600f) "       @ ldr r6, [r8, pc]")
709
710         LOAD_STORE("b")
711         TEST_UNSUPPORTED(__inst_arm(0xe5f7f008) "       @ ldrb pc, [r7, #8]!")
712         TEST_UNSUPPORTED(__inst_arm(0xe7f7f008) "       @ ldrb pc, [r7, r8]!")
713         TEST_UNSUPPORTED(__inst_arm(0xe5ef6008) "       @ strb r6, [pc, #8]!")
714         TEST_UNSUPPORTED(__inst_arm(0xe7ef6008) "       @ strb r6, [pc, r3]!")
715         TEST_UNSUPPORTED(__inst_arm(0xe5ff6008) "       @ ldrb r6, [pc, #8]!")
716         TEST_UNSUPPORTED(__inst_arm(0xe7ff6008) "       @ ldrb r6, [pc, r3]!")
717
718         TEST_UNSUPPORTED("ldrt  r0, [r1], #4")
719         TEST_UNSUPPORTED("ldrt  r1, [r2], r3")
720         TEST_UNSUPPORTED("strt  r2, [r3], #4")
721         TEST_UNSUPPORTED("strt  r3, [r4], r5")
722         TEST_UNSUPPORTED("ldrbt r4, [r5], #4")
723         TEST_UNSUPPORTED("ldrbt r5, [r6], r7")
724         TEST_UNSUPPORTED("strbt r6, [r7], #4")
725         TEST_UNSUPPORTED("strbt r7, [r8], r9")
726
727 #if __LINUX_ARM_ARCH__ >= 7
728         TEST_GROUP("Parallel addition and subtraction, signed")
729
730         TEST_UNSUPPORTED(__inst_arm(0xe6000010) "") /* Unallocated space */
731         TEST_UNSUPPORTED(__inst_arm(0xe60fffff) "") /* Unallocated space */
732
733         TEST_RR(    "sadd16     r0, r",0,  HH1,", r",1, HH2,"")
734         TEST_RR(    "sadd16     r14, r",12,HH2,", r",10,HH1,"")
735         TEST_UNSUPPORTED(__inst_arm(0xe61cff1a) "       @ sadd16        pc, r12, r10")
736         TEST_RR(    "sasx       r0, r",0,  HH1,", r",1, HH2,"")
737         TEST_RR(    "sasx       r14, r",12,HH2,", r",10,HH1,"")
738         TEST_UNSUPPORTED(__inst_arm(0xe61cff3a) "       @ sasx  pc, r12, r10")
739         TEST_RR(    "ssax       r0, r",0,  HH1,", r",1, HH2,"")
740         TEST_RR(    "ssax       r14, r",12,HH2,", r",10,HH1,"")
741         TEST_UNSUPPORTED(__inst_arm(0xe61cff5a) "       @ ssax  pc, r12, r10")
742         TEST_RR(    "ssub16     r0, r",0,  HH1,", r",1, HH2,"")
743         TEST_RR(    "ssub16     r14, r",12,HH2,", r",10,HH1,"")
744         TEST_UNSUPPORTED(__inst_arm(0xe61cff7a) "       @ ssub16        pc, r12, r10")
745         TEST_RR(    "sadd8      r0, r",0,  HH1,", r",1, HH2,"")
746         TEST_RR(    "sadd8      r14, r",12,HH2,", r",10,HH1,"")
747         TEST_UNSUPPORTED(__inst_arm(0xe61cff9a) "       @ sadd8 pc, r12, r10")
748         TEST_UNSUPPORTED(__inst_arm(0xe61000b0) "") /* Unallocated space */
749         TEST_UNSUPPORTED(__inst_arm(0xe61fffbf) "") /* Unallocated space */
750         TEST_UNSUPPORTED(__inst_arm(0xe61000d0) "") /* Unallocated space */
751         TEST_UNSUPPORTED(__inst_arm(0xe61fffdf) "") /* Unallocated space */
752         TEST_RR(    "ssub8      r0, r",0,  HH1,", r",1, HH2,"")
753         TEST_RR(    "ssub8      r14, r",12,HH2,", r",10,HH1,"")
754         TEST_UNSUPPORTED(__inst_arm(0xe61cfffa) "       @ ssub8 pc, r12, r10")
755
756         TEST_RR(    "qadd16     r0, r",0,  HH1,", r",1, HH2,"")
757         TEST_RR(    "qadd16     r14, r",12,HH2,", r",10,HH1,"")
758         TEST_UNSUPPORTED(__inst_arm(0xe62cff1a) "       @ qadd16        pc, r12, r10")
759         TEST_RR(    "qasx       r0, r",0,  HH1,", r",1, HH2,"")
760         TEST_RR(    "qasx       r14, r",12,HH2,", r",10,HH1,"")
761         TEST_UNSUPPORTED(__inst_arm(0xe62cff3a) "       @ qasx  pc, r12, r10")
762         TEST_RR(    "qsax       r0, r",0,  HH1,", r",1, HH2,"")
763         TEST_RR(    "qsax       r14, r",12,HH2,", r",10,HH1,"")
764         TEST_UNSUPPORTED(__inst_arm(0xe62cff5a) "       @ qsax  pc, r12, r10")
765         TEST_RR(    "qsub16     r0, r",0,  HH1,", r",1, HH2,"")
766         TEST_RR(    "qsub16     r14, r",12,HH2,", r",10,HH1,"")
767         TEST_UNSUPPORTED(__inst_arm(0xe62cff7a) "       @ qsub16        pc, r12, r10")
768         TEST_RR(    "qadd8      r0, r",0,  HH1,", r",1, HH2,"")
769         TEST_RR(    "qadd8      r14, r",12,HH2,", r",10,HH1,"")
770         TEST_UNSUPPORTED(__inst_arm(0xe62cff9a) "       @ qadd8 pc, r12, r10")
771         TEST_UNSUPPORTED(__inst_arm(0xe62000b0) "") /* Unallocated space */
772         TEST_UNSUPPORTED(__inst_arm(0xe62fffbf) "") /* Unallocated space */
773         TEST_UNSUPPORTED(__inst_arm(0xe62000d0) "") /* Unallocated space */
774         TEST_UNSUPPORTED(__inst_arm(0xe62fffdf) "") /* Unallocated space */
775         TEST_RR(    "qsub8      r0, r",0,  HH1,", r",1, HH2,"")
776         TEST_RR(    "qsub8      r14, r",12,HH2,", r",10,HH1,"")
777         TEST_UNSUPPORTED(__inst_arm(0xe62cfffa) "       @ qsub8 pc, r12, r10")
778
779         TEST_RR(    "shadd16    r0, r",0,  HH1,", r",1, HH2,"")
780         TEST_RR(    "shadd16    r14, r",12,HH2,", r",10,HH1,"")
781         TEST_UNSUPPORTED(__inst_arm(0xe63cff1a) "       @ shadd16       pc, r12, r10")
782         TEST_RR(    "shasx      r0, r",0,  HH1,", r",1, HH2,"")
783         TEST_RR(    "shasx      r14, r",12,HH2,", r",10,HH1,"")
784         TEST_UNSUPPORTED(__inst_arm(0xe63cff3a) "       @ shasx pc, r12, r10")
785         TEST_RR(    "shsax      r0, r",0,  HH1,", r",1, HH2,"")
786         TEST_RR(    "shsax      r14, r",12,HH2,", r",10,HH1,"")
787         TEST_UNSUPPORTED(__inst_arm(0xe63cff5a) "       @ shsax pc, r12, r10")
788         TEST_RR(    "shsub16    r0, r",0,  HH1,", r",1, HH2,"")
789         TEST_RR(    "shsub16    r14, r",12,HH2,", r",10,HH1,"")
790         TEST_UNSUPPORTED(__inst_arm(0xe63cff7a) "       @ shsub16       pc, r12, r10")
791         TEST_RR(    "shadd8     r0, r",0,  HH1,", r",1, HH2,"")
792         TEST_RR(    "shadd8     r14, r",12,HH2,", r",10,HH1,"")
793         TEST_UNSUPPORTED(__inst_arm(0xe63cff9a) "       @ shadd8        pc, r12, r10")
794         TEST_UNSUPPORTED(__inst_arm(0xe63000b0) "") /* Unallocated space */
795         TEST_UNSUPPORTED(__inst_arm(0xe63fffbf) "") /* Unallocated space */
796         TEST_UNSUPPORTED(__inst_arm(0xe63000d0) "") /* Unallocated space */
797         TEST_UNSUPPORTED(__inst_arm(0xe63fffdf) "") /* Unallocated space */
798         TEST_RR(    "shsub8     r0, r",0,  HH1,", r",1, HH2,"")
799         TEST_RR(    "shsub8     r14, r",12,HH2,", r",10,HH1,"")
800         TEST_UNSUPPORTED(__inst_arm(0xe63cfffa) "       @ shsub8        pc, r12, r10")
801
802         TEST_GROUP("Parallel addition and subtraction, unsigned")
803
804         TEST_UNSUPPORTED(__inst_arm(0xe6400010) "") /* Unallocated space */
805         TEST_UNSUPPORTED(__inst_arm(0xe64fffff) "") /* Unallocated space */
806
807         TEST_RR(    "uadd16     r0, r",0,  HH1,", r",1, HH2,"")
808         TEST_RR(    "uadd16     r14, r",12,HH2,", r",10,HH1,"")
809         TEST_UNSUPPORTED(__inst_arm(0xe65cff1a) "       @ uadd16        pc, r12, r10")
810         TEST_RR(    "uasx       r0, r",0,  HH1,", r",1, HH2,"")
811         TEST_RR(    "uasx       r14, r",12,HH2,", r",10,HH1,"")
812         TEST_UNSUPPORTED(__inst_arm(0xe65cff3a) "       @ uasx  pc, r12, r10")
813         TEST_RR(    "usax       r0, r",0,  HH1,", r",1, HH2,"")
814         TEST_RR(    "usax       r14, r",12,HH2,", r",10,HH1,"")
815         TEST_UNSUPPORTED(__inst_arm(0xe65cff5a) "       @ usax  pc, r12, r10")
816         TEST_RR(    "usub16     r0, r",0,  HH1,", r",1, HH2,"")
817         TEST_RR(    "usub16     r14, r",12,HH2,", r",10,HH1,"")
818         TEST_UNSUPPORTED(__inst_arm(0xe65cff7a) "       @ usub16        pc, r12, r10")
819         TEST_RR(    "uadd8      r0, r",0,  HH1,", r",1, HH2,"")
820         TEST_RR(    "uadd8      r14, r",12,HH2,", r",10,HH1,"")
821         TEST_UNSUPPORTED(__inst_arm(0xe65cff9a) "       @ uadd8 pc, r12, r10")
822         TEST_UNSUPPORTED(__inst_arm(0xe65000b0) "") /* Unallocated space */
823         TEST_UNSUPPORTED(__inst_arm(0xe65fffbf) "") /* Unallocated space */
824         TEST_UNSUPPORTED(__inst_arm(0xe65000d0) "") /* Unallocated space */
825         TEST_UNSUPPORTED(__inst_arm(0xe65fffdf) "") /* Unallocated space */
826         TEST_RR(    "usub8      r0, r",0,  HH1,", r",1, HH2,"")
827         TEST_RR(    "usub8      r14, r",12,HH2,", r",10,HH1,"")
828         TEST_UNSUPPORTED(__inst_arm(0xe65cfffa) "       @ usub8 pc, r12, r10")
829
830         TEST_RR(    "uqadd16    r0, r",0,  HH1,", r",1, HH2,"")
831         TEST_RR(    "uqadd16    r14, r",12,HH2,", r",10,HH1,"")
832         TEST_UNSUPPORTED(__inst_arm(0xe66cff1a) "       @ uqadd16       pc, r12, r10")
833         TEST_RR(    "uqasx      r0, r",0,  HH1,", r",1, HH2,"")
834         TEST_RR(    "uqasx      r14, r",12,HH2,", r",10,HH1,"")
835         TEST_UNSUPPORTED(__inst_arm(0xe66cff3a) "       @ uqasx pc, r12, r10")
836         TEST_RR(    "uqsax      r0, r",0,  HH1,", r",1, HH2,"")
837         TEST_RR(    "uqsax      r14, r",12,HH2,", r",10,HH1,"")
838         TEST_UNSUPPORTED(__inst_arm(0xe66cff5a) "       @ uqsax pc, r12, r10")
839         TEST_RR(    "uqsub16    r0, r",0,  HH1,", r",1, HH2,"")
840         TEST_RR(    "uqsub16    r14, r",12,HH2,", r",10,HH1,"")
841         TEST_UNSUPPORTED(__inst_arm(0xe66cff7a) "       @ uqsub16       pc, r12, r10")
842         TEST_RR(    "uqadd8     r0, r",0,  HH1,", r",1, HH2,"")
843         TEST_RR(    "uqadd8     r14, r",12,HH2,", r",10,HH1,"")
844         TEST_UNSUPPORTED(__inst_arm(0xe66cff9a) "       @ uqadd8        pc, r12, r10")
845         TEST_UNSUPPORTED(__inst_arm(0xe66000b0) "") /* Unallocated space */
846         TEST_UNSUPPORTED(__inst_arm(0xe66fffbf) "") /* Unallocated space */
847         TEST_UNSUPPORTED(__inst_arm(0xe66000d0) "") /* Unallocated space */
848         TEST_UNSUPPORTED(__inst_arm(0xe66fffdf) "") /* Unallocated space */
849         TEST_RR(    "uqsub8     r0, r",0,  HH1,", r",1, HH2,"")
850         TEST_RR(    "uqsub8     r14, r",12,HH2,", r",10,HH1,"")
851         TEST_UNSUPPORTED(__inst_arm(0xe66cfffa) "       @ uqsub8        pc, r12, r10")
852
853         TEST_RR(    "uhadd16    r0, r",0,  HH1,", r",1, HH2,"")
854         TEST_RR(    "uhadd16    r14, r",12,HH2,", r",10,HH1,"")
855         TEST_UNSUPPORTED(__inst_arm(0xe67cff1a) "       @ uhadd16       pc, r12, r10")
856         TEST_RR(    "uhasx      r0, r",0,  HH1,", r",1, HH2,"")
857         TEST_RR(    "uhasx      r14, r",12,HH2,", r",10,HH1,"")
858         TEST_UNSUPPORTED(__inst_arm(0xe67cff3a) "       @ uhasx pc, r12, r10")
859         TEST_RR(    "uhsax      r0, r",0,  HH1,", r",1, HH2,"")
860         TEST_RR(    "uhsax      r14, r",12,HH2,", r",10,HH1,"")
861         TEST_UNSUPPORTED(__inst_arm(0xe67cff5a) "       @ uhsax pc, r12, r10")
862         TEST_RR(    "uhsub16    r0, r",0,  HH1,", r",1, HH2,"")
863         TEST_RR(    "uhsub16    r14, r",12,HH2,", r",10,HH1,"")
864         TEST_UNSUPPORTED(__inst_arm(0xe67cff7a) "       @ uhsub16       pc, r12, r10")
865         TEST_RR(    "uhadd8     r0, r",0,  HH1,", r",1, HH2,"")
866         TEST_RR(    "uhadd8     r14, r",12,HH2,", r",10,HH1,"")
867         TEST_UNSUPPORTED(__inst_arm(0xe67cff9a) "       @ uhadd8        pc, r12, r10")
868         TEST_UNSUPPORTED(__inst_arm(0xe67000b0) "") /* Unallocated space */
869         TEST_UNSUPPORTED(__inst_arm(0xe67fffbf) "") /* Unallocated space */
870         TEST_UNSUPPORTED(__inst_arm(0xe67000d0) "") /* Unallocated space */
871         TEST_UNSUPPORTED(__inst_arm(0xe67fffdf) "") /* Unallocated space */
872         TEST_RR(    "uhsub8     r0, r",0,  HH1,", r",1, HH2,"")
873         TEST_RR(    "uhsub8     r14, r",12,HH2,", r",10,HH1,"")
874         TEST_UNSUPPORTED(__inst_arm(0xe67cfffa) "       @ uhsub8        pc, r12, r10")
875         TEST_UNSUPPORTED(__inst_arm(0xe67feffa) "       @ uhsub8        r14, pc, r10")
876         TEST_UNSUPPORTED(__inst_arm(0xe67cefff) "       @ uhsub8        r14, r12, pc")
877 #endif /* __LINUX_ARM_ARCH__ >= 7 */
878
879 #if __LINUX_ARM_ARCH__ >= 6
880         TEST_GROUP("Packing, unpacking, saturation, and reversal")
881
882         TEST_RR(    "pkhbt      r0, r",0,  HH1,", r",1, HH2,"")
883         TEST_RR(    "pkhbt      r14,r",12, HH1,", r",10,HH2,", lsl #2")
884         TEST_UNSUPPORTED(__inst_arm(0xe68cf11a) "       @ pkhbt pc, r12, r10, lsl #2")
885         TEST_RR(    "pkhtb      r0, r",0,  HH1,", r",1, HH2,"")
886         TEST_RR(    "pkhtb      r14,r",12, HH1,", r",10,HH2,", asr #2")
887         TEST_UNSUPPORTED(__inst_arm(0xe68cf15a) "       @ pkhtb pc, r12, r10, asr #2")
888         TEST_UNSUPPORTED(__inst_arm(0xe68fe15a) "       @ pkhtb r14, pc, r10, asr #2")
889         TEST_UNSUPPORTED(__inst_arm(0xe68ce15f) "       @ pkhtb r14, r12, pc, asr #2")
890         TEST_UNSUPPORTED(__inst_arm(0xe6900010) "") /* Unallocated space */
891         TEST_UNSUPPORTED(__inst_arm(0xe69fffdf) "") /* Unallocated space */
892
893         TEST_R(     "ssat       r0, #24, r",0,   VAL1,"")
894         TEST_R(     "ssat       r14, #24, r",12, VAL2,"")
895         TEST_R(     "ssat       r0, #24, r",0,   VAL1,", lsl #8")
896         TEST_R(     "ssat       r14, #24, r",12, VAL2,", asr #8")
897         TEST_UNSUPPORTED(__inst_arm(0xe6b7f01c) "       @ ssat  pc, #24, r12")
898
899         TEST_R(     "usat       r0, #24, r",0,   VAL1,"")
900         TEST_R(     "usat       r14, #24, r",12, VAL2,"")
901         TEST_R(     "usat       r0, #24, r",0,   VAL1,", lsl #8")
902         TEST_R(     "usat       r14, #24, r",12, VAL2,", asr #8")
903         TEST_UNSUPPORTED(__inst_arm(0xe6f7f01c) "       @ usat  pc, #24, r12")
904
905         TEST_RR(    "sxtab16    r0, r",0,  HH1,", r",1, HH2,"")
906         TEST_RR(    "sxtab16    r14,r",12, HH2,", r",10,HH1,", ror #8")
907         TEST_R(     "sxtb16     r8, r",7,  HH1,"")
908         TEST_UNSUPPORTED(__inst_arm(0xe68cf47a) "       @ sxtab16       pc,r12, r10, ror #8")
909
910         TEST_RR(    "sel        r0, r",0,  VAL1,", r",1, VAL2,"")
911         TEST_RR(    "sel        r14, r",12,VAL1,", r",10, VAL2,"")
912         TEST_UNSUPPORTED(__inst_arm(0xe68cffba) "       @ sel   pc, r12, r10")
913         TEST_UNSUPPORTED(__inst_arm(0xe68fefba) "       @ sel   r14, pc, r10")
914         TEST_UNSUPPORTED(__inst_arm(0xe68cefbf) "       @ sel   r14, r12, pc")
915
916         TEST_R(     "ssat16     r0, #12, r",0,   HH1,"")
917         TEST_R(     "ssat16     r14, #12, r",12, HH2,"")
918         TEST_UNSUPPORTED(__inst_arm(0xe6abff3c) "       @ ssat16        pc, #12, r12")
919
920         TEST_RR(    "sxtab      r0, r",0,  HH1,", r",1, HH2,"")
921         TEST_RR(    "sxtab      r14,r",12, HH2,", r",10,HH1,", ror #8")
922         TEST_R(     "sxtb       r8, r",7,  HH1,"")
923         TEST_UNSUPPORTED(__inst_arm(0xe6acf47a) "       @ sxtab pc,r12, r10, ror #8")
924
925         TEST_R(     "rev        r0, r",0,   VAL1,"")
926         TEST_R(     "rev        r14, r",12, VAL2,"")
927         TEST_UNSUPPORTED(__inst_arm(0xe6bfff3c) "       @ rev   pc, r12")
928
929         TEST_RR(    "sxtah      r0, r",0,  HH1,", r",1, HH2,"")
930         TEST_RR(    "sxtah      r14,r",12, HH2,", r",10,HH1,", ror #8")
931         TEST_R(     "sxth       r8, r",7,  HH1,"")
932         TEST_UNSUPPORTED(__inst_arm(0xe6bcf47a) "       @ sxtah pc,r12, r10, ror #8")
933
934         TEST_R(     "rev16      r0, r",0,   VAL1,"")
935         TEST_R(     "rev16      r14, r",12, VAL2,"")
936         TEST_UNSUPPORTED(__inst_arm(0xe6bfffbc) "       @ rev16 pc, r12")
937
938         TEST_RR(    "uxtab16    r0, r",0,  HH1,", r",1, HH2,"")
939         TEST_RR(    "uxtab16    r14,r",12, HH2,", r",10,HH1,", ror #8")
940         TEST_R(     "uxtb16     r8, r",7,  HH1,"")
941         TEST_UNSUPPORTED(__inst_arm(0xe6ccf47a) "       @ uxtab16       pc,r12, r10, ror #8")
942
943         TEST_R(     "usat16     r0, #12, r",0,   HH1,"")
944         TEST_R(     "usat16     r14, #12, r",12, HH2,"")
945         TEST_UNSUPPORTED(__inst_arm(0xe6ecff3c) "       @ usat16        pc, #12, r12")
946         TEST_UNSUPPORTED(__inst_arm(0xe6ecef3f) "       @ usat16        r14, #12, pc")
947
948         TEST_RR(    "uxtab      r0, r",0,  HH1,", r",1, HH2,"")
949         TEST_RR(    "uxtab      r14,r",12, HH2,", r",10,HH1,", ror #8")
950         TEST_R(     "uxtb       r8, r",7,  HH1,"")
951         TEST_UNSUPPORTED(__inst_arm(0xe6ecf47a) "       @ uxtab pc,r12, r10, ror #8")
952
953 #if __LINUX_ARM_ARCH__ >= 7
954         TEST_R(     "rbit       r0, r",0,   VAL1,"")
955         TEST_R(     "rbit       r14, r",12, VAL2,"")
956         TEST_UNSUPPORTED(__inst_arm(0xe6ffff3c) "       @ rbit  pc, r12")
957 #endif
958
959         TEST_RR(    "uxtah      r0, r",0,  HH1,", r",1, HH2,"")
960         TEST_RR(    "uxtah      r14,r",12, HH2,", r",10,HH1,", ror #8")
961         TEST_R(     "uxth       r8, r",7,  HH1,"")
962         TEST_UNSUPPORTED(__inst_arm(0xe6fff077) "       @ uxth  pc, r7")
963         TEST_UNSUPPORTED(__inst_arm(0xe6ff807f) "       @ uxth  r8, pc")
964         TEST_UNSUPPORTED(__inst_arm(0xe6fcf47a) "       @ uxtah pc, r12, r10, ror #8")
965         TEST_UNSUPPORTED(__inst_arm(0xe6fce47f) "       @ uxtah r14, r12, pc, ror #8")
966
967         TEST_R(     "revsh      r0, r",0,   VAL1,"")
968         TEST_R(     "revsh      r14, r",12, VAL2,"")
969         TEST_UNSUPPORTED(__inst_arm(0xe6ffff3c) "       @ revsh pc, r12")
970         TEST_UNSUPPORTED(__inst_arm(0xe6ffef3f) "       @ revsh r14, pc")
971
972         TEST_UNSUPPORTED(__inst_arm(0xe6900070) "") /* Unallocated space */
973         TEST_UNSUPPORTED(__inst_arm(0xe69fff7f) "") /* Unallocated space */
974
975         TEST_UNSUPPORTED(__inst_arm(0xe6d00070) "") /* Unallocated space */
976         TEST_UNSUPPORTED(__inst_arm(0xe6dfff7f) "") /* Unallocated space */
977 #endif /* __LINUX_ARM_ARCH__ >= 6 */
978
979 #if __LINUX_ARM_ARCH__ >= 6
980         TEST_GROUP("Signed multiplies")
981
982         TEST_RRR(   "smlad      r0, r",0,  HH1,", r",1, HH2,", r",2, VAL1,"")
983         TEST_RRR(   "smlad      r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
984         TEST_UNSUPPORTED(__inst_arm(0xe70f8a1c) "       @ smlad pc, r12, r10, r8")
985         TEST_RRR(   "smladx     r0, r",0,  HH1,", r",1, HH2,", r",2, VAL1,"")
986         TEST_RRR(   "smladx     r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
987         TEST_UNSUPPORTED(__inst_arm(0xe70f8a3c) "       @ smladx        pc, r12, r10, r8")
988
989         TEST_RR(   "smuad       r0, r",0,  HH1,", r",1, HH2,"")
990         TEST_RR(   "smuad       r14, r",12,HH2,", r",10,HH1,"")
991         TEST_UNSUPPORTED(__inst_arm(0xe70ffa1c) "       @ smuad pc, r12, r10")
992         TEST_RR(   "smuadx      r0, r",0,  HH1,", r",1, HH2,"")
993         TEST_RR(   "smuadx      r14, r",12,HH2,", r",10,HH1,"")
994         TEST_UNSUPPORTED(__inst_arm(0xe70ffa3c) "       @ smuadx        pc, r12, r10")
995
996         TEST_RRR(   "smlsd      r0, r",0,  HH1,", r",1, HH2,", r",2, VAL1,"")
997         TEST_RRR(   "smlsd      r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
998         TEST_UNSUPPORTED(__inst_arm(0xe70f8a5c) "       @ smlsd pc, r12, r10, r8")
999         TEST_RRR(   "smlsdx     r0, r",0,  HH1,", r",1, HH2,", r",2, VAL1,"")
1000         TEST_RRR(   "smlsdx     r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
1001         TEST_UNSUPPORTED(__inst_arm(0xe70f8a7c) "       @ smlsdx        pc, r12, r10, r8")
1002
1003         TEST_RR(   "smusd       r0, r",0,  HH1,", r",1, HH2,"")
1004         TEST_RR(   "smusd       r14, r",12,HH2,", r",10,HH1,"")
1005         TEST_UNSUPPORTED(__inst_arm(0xe70ffa5c) "       @ smusd pc, r12, r10")
1006         TEST_RR(   "smusdx      r0, r",0,  HH1,", r",1, HH2,"")
1007         TEST_RR(   "smusdx      r14, r",12,HH2,", r",10,HH1,"")
1008         TEST_UNSUPPORTED(__inst_arm(0xe70ffa7c) "       @ smusdx        pc, r12, r10")
1009
1010         TEST_RRRR( "smlald      r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
1011         TEST_RRRR( "smlald      r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
1012         TEST_UNSUPPORTED(__inst_arm(0xe74af819) "       @ smlald        pc, r10, r9, r8")
1013         TEST_UNSUPPORTED(__inst_arm(0xe74fb819) "       @ smlald        r11, pc, r9, r8")
1014         TEST_UNSUPPORTED(__inst_arm(0xe74ab81f) "       @ smlald        r11, r10, pc, r8")
1015         TEST_UNSUPPORTED(__inst_arm(0xe74abf19) "       @ smlald        r11, r10, r9, pc")
1016
1017         TEST_RRRR( "smlaldx     r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
1018         TEST_RRRR( "smlaldx     r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
1019         TEST_UNSUPPORTED(__inst_arm(0xe74af839) "       @ smlaldx       pc, r10, r9, r8")
1020         TEST_UNSUPPORTED(__inst_arm(0xe74fb839) "       @ smlaldx       r11, pc, r9, r8")
1021
1022         TEST_RRR(  "smmla       r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL1,"")
1023         TEST_RRR(  "smmla       r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1024         TEST_UNSUPPORTED(__inst_arm(0xe75f8a1c) "       @ smmla pc, r12, r10, r8")
1025         TEST_RRR(  "smmlar      r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL1,"")
1026         TEST_RRR(  "smmlar      r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1027         TEST_UNSUPPORTED(__inst_arm(0xe75f8a3c) "       @ smmlar        pc, r12, r10, r8")
1028
1029         TEST_RR(   "smmul       r0, r",0,  VAL1,", r",1, VAL2,"")
1030         TEST_RR(   "smmul       r14, r",12,VAL2,", r",10,VAL1,"")
1031         TEST_UNSUPPORTED(__inst_arm(0xe75ffa1c) "       @ smmul pc, r12, r10")
1032         TEST_RR(   "smmulr      r0, r",0,  VAL1,", r",1, VAL2,"")
1033         TEST_RR(   "smmulr      r14, r",12,VAL2,", r",10,VAL1,"")
1034         TEST_UNSUPPORTED(__inst_arm(0xe75ffa3c) "       @ smmulr        pc, r12, r10")
1035
1036         TEST_RRR(  "smmls       r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL1,"")
1037         TEST_RRR(  "smmls       r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1038         TEST_UNSUPPORTED(__inst_arm(0xe75f8adc) "       @ smmls pc, r12, r10, r8")
1039         TEST_RRR(  "smmlsr      r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL1,"")
1040         TEST_RRR(  "smmlsr      r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1041         TEST_UNSUPPORTED(__inst_arm(0xe75f8afc) "       @ smmlsr        pc, r12, r10, r8")
1042         TEST_UNSUPPORTED(__inst_arm(0xe75e8aff) "       @ smmlsr        r14, pc, r10, r8")
1043         TEST_UNSUPPORTED(__inst_arm(0xe75e8ffc) "       @ smmlsr        r14, r12, pc, r8")
1044         TEST_UNSUPPORTED(__inst_arm(0xe75efafc) "       @ smmlsr        r14, r12, r10, pc")
1045
1046         TEST_RR(   "usad8       r0, r",0,  VAL1,", r",1, VAL2,"")
1047         TEST_RR(   "usad8       r14, r",12,VAL2,", r",10,VAL1,"")
1048         TEST_UNSUPPORTED(__inst_arm(0xe75ffa1c) "       @ usad8 pc, r12, r10")
1049         TEST_UNSUPPORTED(__inst_arm(0xe75efa1f) "       @ usad8 r14, pc, r10")
1050         TEST_UNSUPPORTED(__inst_arm(0xe75eff1c) "       @ usad8 r14, r12, pc")
1051
1052         TEST_RRR(  "usada8      r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL3,"")
1053         TEST_RRR(  "usada8      r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL3,"")
1054         TEST_UNSUPPORTED(__inst_arm(0xe78f8a1c) "       @ usada8        pc, r12, r10, r8")
1055         TEST_UNSUPPORTED(__inst_arm(0xe78e8a1f) "       @ usada8        r14, pc, r10, r8")
1056         TEST_UNSUPPORTED(__inst_arm(0xe78e8f1c) "       @ usada8        r14, r12, pc, r8")
1057 #endif /* __LINUX_ARM_ARCH__ >= 6 */
1058
1059 #if __LINUX_ARM_ARCH__ >= 7
1060         TEST_GROUP("Bit Field")
1061
1062         TEST_R(     "sbfx       r0, r",0  , VAL1,", #0, #31")
1063         TEST_R(     "sbfxeq     r14, r",12, VAL2,", #8, #16")
1064         TEST_R(     "sbfx       r4, r",10,  VAL1,", #16, #15")
1065         TEST_UNSUPPORTED(__inst_arm(0xe7aff45c) "       @ sbfx  pc, r12, #8, #16")
1066
1067         TEST_R(     "ubfx       r0, r",0  , VAL1,", #0, #31")
1068         TEST_R(     "ubfxcs     r14, r",12, VAL2,", #8, #16")
1069         TEST_R(     "ubfx       r4, r",10,  VAL1,", #16, #15")
1070         TEST_UNSUPPORTED(__inst_arm(0xe7eff45c) "       @ ubfx  pc, r12, #8, #16")
1071         TEST_UNSUPPORTED(__inst_arm(0xe7efc45f) "       @ ubfx  r12, pc, #8, #16")
1072
1073         TEST_R(     "bfc        r",0, VAL1,", #4, #20")
1074         TEST_R(     "bfcvs      r",14,VAL2,", #4, #20")
1075         TEST_R(     "bfc        r",7, VAL1,", #0, #31")
1076         TEST_R(     "bfc        r",8, VAL2,", #0, #31")
1077         TEST_UNSUPPORTED(__inst_arm(0xe7def01f) "       @ bfc   pc, #0, #31");
1078
1079         TEST_RR(    "bfi        r",0, VAL1,", r",0  , VAL2,", #0, #31")
1080         TEST_RR(    "bfipl      r",12,VAL1,", r",14 , VAL2,", #4, #20")
1081         TEST_UNSUPPORTED(__inst_arm(0xe7d7f21e) "       @ bfi   pc, r14, #4, #20")
1082
1083         TEST_UNSUPPORTED(__inst_arm(0x07f000f0) "")  /* Permanently UNDEFINED */
1084         TEST_UNSUPPORTED(__inst_arm(0x07ffffff) "")  /* Permanently UNDEFINED */
1085 #endif /* __LINUX_ARM_ARCH__ >= 6 */
1086
1087         TEST_GROUP("Branch, branch with link, and block data transfer")
1088
1089         TEST_P(   "stmda        r",0, 16*4,", {r0}")
1090         TEST_P(   "stmeqda      r",4, 16*4,", {r0-r15}")
1091         TEST_P(   "stmneda      r",8, 16*4,"!, {r8-r15}")
1092         TEST_P(   "stmda        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1093         TEST_P(   "stmda        r",13,0,   "!, {pc}")
1094
1095         TEST_P(   "ldmda        r",0, 16*4,", {r0}")
1096         TEST_BF_P("ldmcsda      r",4, 15*4,", {r0-r15}")
1097         TEST_BF_P("ldmccda      r",7, 15*4,"!, {r8-r15}")
1098         TEST_P(   "ldmda        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1099         TEST_BF_P("ldmda        r",14,15*4,"!, {pc}")
1100
1101         TEST_P(   "stmia        r",0, 16*4,", {r0}")
1102         TEST_P(   "stmmiia      r",4, 16*4,", {r0-r15}")
1103         TEST_P(   "stmplia      r",8, 16*4,"!, {r8-r15}")
1104         TEST_P(   "stmia        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1105         TEST_P(   "stmia        r",14,0,   "!, {pc}")
1106
1107         TEST_P(   "ldmia        r",0, 16*4,", {r0}")
1108         TEST_BF_P("ldmvsia      r",4, 0,   ", {r0-r15}")
1109         TEST_BF_P("ldmvcia      r",7, 8*4, "!, {r8-r15}")
1110         TEST_P(   "ldmia        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1111         TEST_BF_P("ldmia        r",14,15*4,"!, {pc}")
1112
1113         TEST_P(   "stmdb        r",0, 16*4,", {r0}")
1114         TEST_P(   "stmhidb      r",4, 16*4,", {r0-r15}")
1115         TEST_P(   "stmlsdb      r",8, 16*4,"!, {r8-r15}")
1116         TEST_P(   "stmdb        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1117         TEST_P(   "stmdb        r",13,4,   "!, {pc}")
1118
1119         TEST_P(   "ldmdb        r",0, 16*4,", {r0}")
1120         TEST_BF_P("ldmgedb      r",4, 16*4,", {r0-r15}")
1121         TEST_BF_P("ldmltdb      r",7, 16*4,"!, {r8-r15}")
1122         TEST_P(   "ldmdb        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1123         TEST_BF_P("ldmdb        r",14,16*4,"!, {pc}")
1124
1125         TEST_P(   "stmib        r",0, 16*4,", {r0}")
1126         TEST_P(   "stmgtib      r",4, 16*4,", {r0-r15}")
1127         TEST_P(   "stmleib      r",8, 16*4,"!, {r8-r15}")
1128         TEST_P(   "stmib        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1129         TEST_P(   "stmib        r",13,-4,  "!, {pc}")
1130
1131         TEST_P(   "ldmib        r",0, 16*4,", {r0}")
1132         TEST_BF_P("ldmeqib      r",4, -4,", {r0-r15}")
1133         TEST_BF_P("ldmneib      r",7, 7*4,"!, {r8-r15}")
1134         TEST_P(   "ldmib        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1135         TEST_BF_P("ldmib        r",14,14*4,"!, {pc}")
1136
1137         TEST_P(   "stmdb        r",13,16*4,"!, {r3-r12,lr}")
1138         TEST_P(   "stmeqdb      r",13,16*4,"!, {r3-r12}")
1139         TEST_P(   "stmnedb      r",2, 16*4,", {r3-r12,lr}")
1140         TEST_P(   "stmdb        r",13,16*4,"!, {r2-r12,lr}")
1141         TEST_P(   "stmdb        r",0, 16*4,", {r0-r12}")
1142         TEST_P(   "stmdb        r",0, 16*4,", {r0-r12,lr}")
1143
1144         TEST_BF_P("ldmia        r",13,5*4, "!, {r3-r12,pc}")
1145         TEST_P(   "ldmccia      r",13,5*4, "!, {r3-r12}")
1146         TEST_BF_P("ldmcsia      r",2, 5*4, "!, {r3-r12,pc}")
1147         TEST_BF_P("ldmia        r",13,4*4, "!, {r2-r12,pc}")
1148         TEST_P(   "ldmia        r",0, 16*4,", {r0-r12}")
1149         TEST_P(   "ldmia        r",0, 16*4,", {r0-r12,lr}")
1150
1151 #ifdef CONFIG_THUMB2_KERNEL
1152         TEST_ARM_TO_THUMB_INTERWORK_P("ldmplia  r",0,15*4,", {pc}")
1153         TEST_ARM_TO_THUMB_INTERWORK_P("ldmmiia  r",13,0,", {r0-r15}")
1154 #endif
1155         TEST_BF("b      2f")
1156         TEST_BF("bl     2f")
1157         TEST_BB("b      2b")
1158         TEST_BB("bl     2b")
1159
1160         TEST_BF("beq    2f")
1161         TEST_BF("bleq   2f")
1162         TEST_BB("bne    2b")
1163         TEST_BB("blne   2b")
1164
1165         TEST_BF("bgt    2f")
1166         TEST_BF("blgt   2f")
1167         TEST_BB("blt    2b")
1168         TEST_BB("bllt   2b")
1169
1170         TEST_GROUP("Supervisor Call, and coprocessor instructions")
1171
1172         /*
1173          * We can't really test these by executing them, so all
1174          * we can do is check that probes are, or are not allowed.
1175          * At the moment none are allowed...
1176          */
1177 #define TEST_COPROCESSOR(code) TEST_UNSUPPORTED(code)
1178
1179 #define COPROCESSOR_INSTRUCTIONS_ST_LD(two,cc)                                  \
1180         TEST_COPROCESSOR("stc"two"      0, cr0, [r13, #4]")                     \
1181         TEST_COPROCESSOR("stc"two"      0, cr0, [r13, #-4]")                    \
1182         TEST_COPROCESSOR("stc"two"      0, cr0, [r13, #4]!")                    \
1183         TEST_COPROCESSOR("stc"two"      0, cr0, [r13, #-4]!")                   \
1184         TEST_COPROCESSOR("stc"two"      0, cr0, [r13], #4")                     \
1185         TEST_COPROCESSOR("stc"two"      0, cr0, [r13], #-4")                    \
1186         TEST_COPROCESSOR("stc"two"      0, cr0, [r13], {1}")                    \
1187         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13, #4]")                     \
1188         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13, #-4]")                    \
1189         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13, #4]!")                    \
1190         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13, #-4]!")                   \
1191         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13], #4")                     \
1192         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13], #-4")                    \
1193         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13], {1}")                    \
1194         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13, #4]")                     \
1195         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13, #-4]")                    \
1196         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13, #4]!")                    \
1197         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13, #-4]!")                   \
1198         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13], #4")                     \
1199         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13], #-4")                    \
1200         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13], {1}")                    \
1201         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13, #4]")                     \
1202         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13, #-4]")                    \
1203         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13, #4]!")                    \
1204         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13, #-4]!")                   \
1205         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13], #4")                     \
1206         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13], #-4")                    \
1207         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13], {1}")                    \
1208                                                                                 \
1209         TEST_COPROCESSOR( "stc"two"     0, cr0, [r15, #4]")                     \
1210         TEST_COPROCESSOR( "stc"two"     0, cr0, [r15, #-4]")                    \
1211         TEST_UNSUPPORTED(__inst_arm(0x##cc##daf0001) "  @ stc"two"      0, cr0, [r15, #4]!")    \
1212         TEST_UNSUPPORTED(__inst_arm(0x##cc##d2f0001) "  @ stc"two"      0, cr0, [r15, #-4]!")   \
1213         TEST_UNSUPPORTED(__inst_arm(0x##cc##caf0001) "  @ stc"two"      0, cr0, [r15], #4")     \
1214         TEST_UNSUPPORTED(__inst_arm(0x##cc##c2f0001) "  @ stc"two"      0, cr0, [r15], #-4")    \
1215         TEST_COPROCESSOR( "stc"two"     0, cr0, [r15], {1}")                    \
1216         TEST_COPROCESSOR( "stc"two"l    0, cr0, [r15, #4]")                     \
1217         TEST_COPROCESSOR( "stc"two"l    0, cr0, [r15, #-4]")                    \
1218         TEST_UNSUPPORTED(__inst_arm(0x##cc##def0001) "  @ stc"two"l     0, cr0, [r15, #4]!")    \
1219         TEST_UNSUPPORTED(__inst_arm(0x##cc##d6f0001) "  @ stc"two"l     0, cr0, [r15, #-4]!")   \
1220         TEST_UNSUPPORTED(__inst_arm(0x##cc##cef0001) "  @ stc"two"l     0, cr0, [r15], #4")     \
1221         TEST_UNSUPPORTED(__inst_arm(0x##cc##c6f0001) "  @ stc"two"l     0, cr0, [r15], #-4")    \
1222         TEST_COPROCESSOR( "stc"two"l    0, cr0, [r15], {1}")                    \
1223         TEST_COPROCESSOR( "ldc"two"     0, cr0, [r15, #4]")                     \
1224         TEST_COPROCESSOR( "ldc"two"     0, cr0, [r15, #-4]")                    \
1225         TEST_UNSUPPORTED(__inst_arm(0x##cc##dbf0001) "  @ ldc"two"      0, cr0, [r15, #4]!")    \
1226         TEST_UNSUPPORTED(__inst_arm(0x##cc##d3f0001) "  @ ldc"two"      0, cr0, [r15, #-4]!")   \
1227         TEST_UNSUPPORTED(__inst_arm(0x##cc##cbf0001) "  @ ldc"two"      0, cr0, [r15], #4")     \
1228         TEST_UNSUPPORTED(__inst_arm(0x##cc##c3f0001) "  @ ldc"two"      0, cr0, [r15], #-4")    \
1229         TEST_COPROCESSOR( "ldc"two"     0, cr0, [r15], {1}")                    \
1230         TEST_COPROCESSOR( "ldc"two"l    0, cr0, [r15, #4]")                     \
1231         TEST_COPROCESSOR( "ldc"two"l    0, cr0, [r15, #-4]")                    \
1232         TEST_UNSUPPORTED(__inst_arm(0x##cc##dff0001) "  @ ldc"two"l     0, cr0, [r15, #4]!")    \
1233         TEST_UNSUPPORTED(__inst_arm(0x##cc##d7f0001) "  @ ldc"two"l     0, cr0, [r15, #-4]!")   \
1234         TEST_UNSUPPORTED(__inst_arm(0x##cc##cff0001) "  @ ldc"two"l     0, cr0, [r15], #4")     \
1235         TEST_UNSUPPORTED(__inst_arm(0x##cc##c7f0001) "  @ ldc"two"l     0, cr0, [r15], #-4")    \
1236         TEST_COPROCESSOR( "ldc"two"l    0, cr0, [r15], {1}")
1237
1238 #define COPROCESSOR_INSTRUCTIONS_MC_MR(two,cc)                                  \
1239                                                                                 \
1240         TEST_COPROCESSOR( "mcrr"two"    0, 15, r0, r14, cr0")                   \
1241         TEST_COPROCESSOR( "mcrr"two"    15, 0, r14, r0, cr15")                  \
1242         TEST_UNSUPPORTED(__inst_arm(0x##cc##c4f00f0) "  @ mcrr"two"     0, 15, r0, r15, cr0")   \
1243         TEST_UNSUPPORTED(__inst_arm(0x##cc##c40ff0f) "  @ mcrr"two"     15, 0, r15, r0, cr15")  \
1244         TEST_COPROCESSOR( "mrrc"two"    0, 15, r0, r14, cr0")                   \
1245         TEST_COPROCESSOR( "mrrc"two"    15, 0, r14, r0, cr15")                  \
1246         TEST_UNSUPPORTED(__inst_arm(0x##cc##c5f00f0) "  @ mrrc"two"     0, 15, r0, r15, cr0")   \
1247         TEST_UNSUPPORTED(__inst_arm(0x##cc##c50ff0f) "  @ mrrc"two"     15, 0, r15, r0, cr15")  \
1248         TEST_COPROCESSOR( "cdp"two"     15, 15, cr15, cr15, cr15, 7")           \
1249         TEST_COPROCESSOR( "cdp"two"     0, 0, cr0, cr0, cr0, 0")                \
1250         TEST_COPROCESSOR( "mcr"two"     15, 7, r15, cr15, cr15, 7")             \
1251         TEST_COPROCESSOR( "mcr"two"     0, 0, r0, cr0, cr0, 0")                 \
1252         TEST_COPROCESSOR( "mrc"two"     15, 7, r15, cr15, cr15, 7")             \
1253         TEST_COPROCESSOR( "mrc"two"     0, 0, r0, cr0, cr0, 0")
1254
1255         COPROCESSOR_INSTRUCTIONS_ST_LD("",e)
1256 #if __LINUX_ARM_ARCH__ >= 5
1257         COPROCESSOR_INSTRUCTIONS_MC_MR("",e)
1258 #endif
1259         TEST_UNSUPPORTED("svc   0")
1260         TEST_UNSUPPORTED("svc   0xffffff")
1261
1262         TEST_UNSUPPORTED("svc   0")
1263
1264         TEST_GROUP("Unconditional instruction")
1265
1266 #if __LINUX_ARM_ARCH__ >= 6
1267         TEST_UNSUPPORTED("srsda sp, 0x13")
1268         TEST_UNSUPPORTED("srsdb sp, 0x13")
1269         TEST_UNSUPPORTED("srsia sp, 0x13")
1270         TEST_UNSUPPORTED("srsib sp, 0x13")
1271         TEST_UNSUPPORTED("srsda sp!, 0x13")
1272         TEST_UNSUPPORTED("srsdb sp!, 0x13")
1273         TEST_UNSUPPORTED("srsia sp!, 0x13")
1274         TEST_UNSUPPORTED("srsib sp!, 0x13")
1275
1276         TEST_UNSUPPORTED("rfeda sp")
1277         TEST_UNSUPPORTED("rfedb sp")
1278         TEST_UNSUPPORTED("rfeia sp")
1279         TEST_UNSUPPORTED("rfeib sp")
1280         TEST_UNSUPPORTED("rfeda sp!")
1281         TEST_UNSUPPORTED("rfedb sp!")
1282         TEST_UNSUPPORTED("rfeia sp!")
1283         TEST_UNSUPPORTED("rfeib sp!")
1284         TEST_UNSUPPORTED(__inst_arm(0xf81d0a00) "       @ rfeda pc")
1285         TEST_UNSUPPORTED(__inst_arm(0xf91d0a00) "       @ rfedb pc")
1286         TEST_UNSUPPORTED(__inst_arm(0xf89d0a00) "       @ rfeia pc")
1287         TEST_UNSUPPORTED(__inst_arm(0xf99d0a00) "       @ rfeib pc")
1288         TEST_UNSUPPORTED(__inst_arm(0xf83d0a00) "       @ rfeda pc!")
1289         TEST_UNSUPPORTED(__inst_arm(0xf93d0a00) "       @ rfedb pc!")
1290         TEST_UNSUPPORTED(__inst_arm(0xf8bd0a00) "       @ rfeia pc!")
1291         TEST_UNSUPPORTED(__inst_arm(0xf9bd0a00) "       @ rfeib pc!")
1292 #endif /* __LINUX_ARM_ARCH__ >= 6 */
1293
1294 #if __LINUX_ARM_ARCH__ >= 6
1295         TEST_X( "blx    __dummy_thumb_subroutine_even",
1296                 ".thumb                         \n\t"
1297                 ".space 4                       \n\t"
1298                 ".type __dummy_thumb_subroutine_even, %%function \n\t"
1299                 "__dummy_thumb_subroutine_even: \n\t"
1300                 "mov    r0, pc                  \n\t"
1301                 "bx     lr                      \n\t"
1302                 ".arm                           \n\t"
1303         )
1304         TEST(   "blx    __dummy_thumb_subroutine_even")
1305
1306         TEST_X( "blx    __dummy_thumb_subroutine_odd",
1307                 ".thumb                         \n\t"
1308                 ".space 2                       \n\t"
1309                 ".type __dummy_thumb_subroutine_odd, %%function \n\t"
1310                 "__dummy_thumb_subroutine_odd:  \n\t"
1311                 "mov    r0, pc                  \n\t"
1312                 "bx     lr                      \n\t"
1313                 ".arm                           \n\t"
1314         )
1315         TEST(   "blx    __dummy_thumb_subroutine_odd")
1316 #endif /* __LINUX_ARM_ARCH__ >= 6 */
1317
1318 #if __LINUX_ARM_ARCH__ >= 5
1319         COPROCESSOR_INSTRUCTIONS_ST_LD("2",f)
1320 #endif
1321 #if __LINUX_ARM_ARCH__ >= 6
1322         COPROCESSOR_INSTRUCTIONS_MC_MR("2",f)
1323 #endif
1324
1325         TEST_GROUP("Miscellaneous instructions, memory hints, and Advanced SIMD instructions")
1326
1327 #if __LINUX_ARM_ARCH__ >= 6
1328         TEST_UNSUPPORTED("cps   0x13")
1329         TEST_UNSUPPORTED("cpsie i")
1330         TEST_UNSUPPORTED("cpsid i")
1331         TEST_UNSUPPORTED("cpsie i,0x13")
1332         TEST_UNSUPPORTED("cpsid i,0x13")
1333         TEST_UNSUPPORTED("setend        le")
1334         TEST_UNSUPPORTED("setend        be")
1335 #endif
1336
1337 #if __LINUX_ARM_ARCH__ >= 7
1338         TEST_P("pli     [r",0,0b,", #16]")
1339         TEST(  "pli     [pc, #0]")
1340         TEST_RR("pli    [r",12,0b,", r",0, 16,"]")
1341         TEST_RR("pli    [r",0, 0b,", -r",12,16,", lsl #4]")
1342 #endif
1343
1344 #if __LINUX_ARM_ARCH__ >= 5
1345         TEST_P("pld     [r",0,32,", #-16]")
1346         TEST(  "pld     [pc, #0]")
1347         TEST_PR("pld    [r",7, 24, ", r",0, 16,"]")
1348         TEST_PR("pld    [r",8, 24, ", -r",12,16,", lsl #4]")
1349 #endif
1350
1351 #if __LINUX_ARM_ARCH__ >= 7
1352         TEST_SUPPORTED(  __inst_arm(0xf590f000) "       @ pldw [r0, #0]")
1353         TEST_SUPPORTED(  __inst_arm(0xf797f000) "       @ pldw  [r7, r0]")
1354         TEST_SUPPORTED(  __inst_arm(0xf798f18c) "       @ pldw  [r8, r12, lsl #3]");
1355 #endif
1356
1357 #if __LINUX_ARM_ARCH__ >= 7
1358         TEST_UNSUPPORTED("clrex")
1359         TEST_UNSUPPORTED("dsb")
1360         TEST_UNSUPPORTED("dmb")
1361         TEST_UNSUPPORTED("isb")
1362 #endif
1363
1364         verbose("\n");
1365 }
1366