Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / arch / arm / mach-ux500 / id.c
1 /*
2  * Copyright (C) ST-Ericsson SA 2010
3  *
4  * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
5  * License terms: GNU General Public License (GPL) version 2
6  */
7
8 #include <linux/kernel.h>
9 #include <linux/init.h>
10 #include <linux/io.h>
11
12 #include <asm/cputype.h>
13 #include <asm/tlbflush.h>
14 #include <asm/cacheflush.h>
15 #include <asm/mach/map.h>
16
17 #include "setup.h"
18
19 #include "db8500-regs.h"
20 #include "id.h"
21
22 struct dbx500_asic_id dbx500_id;
23
24 static unsigned int __init ux500_read_asicid(phys_addr_t addr)
25 {
26         phys_addr_t base = addr & ~0xfff;
27         struct map_desc desc = {
28                 .virtual        = (unsigned long)UX500_VIRT_ROM,
29                 .pfn            = __phys_to_pfn(base),
30                 .length         = SZ_16K,
31                 .type           = MT_DEVICE,
32         };
33
34         iotable_init(&desc, 1);
35
36         /* As in devicemaps_init() */
37         local_flush_tlb_all();
38         flush_cache_all();
39
40         return readl(UX500_VIRT_ROM + (addr & 0xfff));
41 }
42
43 static void ux500_print_soc_info(unsigned int asicid)
44 {
45         unsigned int rev = dbx500_revision();
46
47         pr_info("DB%4x ", dbx500_partnumber());
48
49         if (rev == 0x01)
50                 pr_cont("Early Drop");
51         else if (rev >= 0xA0)
52                 pr_cont("v%d.%d" , (rev >> 4) - 0xA + 1, rev & 0xf);
53         else
54                 pr_cont("Unknown");
55
56         pr_cont(" [%#010x]\n", asicid);
57 }
58
59 static unsigned int partnumber(unsigned int asicid)
60 {
61         return (asicid >> 8) & 0xffff;
62 }
63
64 /*
65  * SOC          MIDR            ASICID ADDRESS          ASICID VALUE
66  * DB8500ed     0x410fc090      0x9001FFF4              0x00850001
67  * DB8500v1     0x411fc091      0x9001FFF4              0x008500A0
68  * DB8500v1.1   0x411fc091      0x9001FFF4              0x008500A1
69  * DB8500v2     0x412fc091      0x9001DBF4              0x008500B0
70  * DB8520v2.2   0x412fc091      0x9001DBF4              0x008500B2
71  * DB5500v1     0x412fc091      0x9001FFF4              0x005500A0
72  * DB9540       0x413fc090      0xFFFFDBF4              0x009540xx
73  */
74
75 void __init ux500_map_io(void)
76 {
77         unsigned int cpuid = read_cpuid_id();
78         unsigned int asicid = 0;
79         phys_addr_t addr = 0;
80
81         switch (cpuid) {
82         case 0x410fc090: /* DB8500ed */
83         case 0x411fc091: /* DB8500v1 */
84                 addr = 0x9001FFF4;
85                 break;
86
87         case 0x412fc091: /* DB8520 / DB8500v2 / DB5500v1 */
88                 asicid = ux500_read_asicid(0x9001DBF4);
89                 if (partnumber(asicid) == 0x8500 ||
90                     partnumber(asicid) == 0x8520)
91                         /* DB8500v2 */
92                         break;
93
94                 /* DB5500v1 */
95                 addr = 0x9001FFF4;
96                 break;
97
98         case 0x413fc090: /* DB9540 */
99                 addr = 0xFFFFDBF4;
100                 break;
101         }
102
103         if (addr)
104                 asicid = ux500_read_asicid(addr);
105
106         if (!asicid) {
107                 pr_err("Unable to identify SoC\n");
108                 ux500_unknown_soc();
109         }
110
111         dbx500_id.process = asicid >> 24;
112         dbx500_id.partnumber = partnumber(asicid);
113         dbx500_id.revision = asicid & 0xff;
114
115         ux500_print_soc_info(asicid);
116 }