These changes are the raw update to linux-4.4.6-rt14. Kernel sources
[kvmfornfv.git] / kernel / arch / arm / mach-sa1100 / generic.c
1 /*
2  * linux/arch/arm/mach-sa1100/generic.c
3  *
4  * Author: Nicolas Pitre
5  *
6  * Code common to all SA11x0 machines.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 #include <linux/gpio.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/pm.h>
19 #include <linux/cpufreq.h>
20 #include <linux/ioport.h>
21 #include <linux/platform_device.h>
22 #include <linux/reboot.h>
23 #include <linux/irqchip/irq-sa11x0.h>
24
25 #include <video/sa1100fb.h>
26
27 #include <soc/sa1100/pwer.h>
28
29 #include <asm/div64.h>
30 #include <asm/mach/map.h>
31 #include <asm/mach/flash.h>
32 #include <asm/irq.h>
33 #include <asm/system_misc.h>
34
35 #include <mach/hardware.h>
36 #include <mach/irqs.h>
37
38 #include "generic.h"
39 #include <clocksource/pxa.h>
40
41 unsigned int reset_status;
42 EXPORT_SYMBOL(reset_status);
43
44 #define NR_FREQS        16
45
46 /*
47  * This table is setup for a 3.6864MHz Crystal.
48  */
49 struct cpufreq_frequency_table sa11x0_freq_table[NR_FREQS+1] = {
50         { .frequency = 59000,   /*  59.0 MHz */},
51         { .frequency = 73700,   /*  73.7 MHz */},
52         { .frequency = 88500,   /*  88.5 MHz */},
53         { .frequency = 103200,  /* 103.2 MHz */},
54         { .frequency = 118000,  /* 118.0 MHz */},
55         { .frequency = 132700,  /* 132.7 MHz */},
56         { .frequency = 147500,  /* 147.5 MHz */},
57         { .frequency = 162200,  /* 162.2 MHz */},
58         { .frequency = 176900,  /* 176.9 MHz */},
59         { .frequency = 191700,  /* 191.7 MHz */},
60         { .frequency = 206400,  /* 206.4 MHz */},
61         { .frequency = 221200,  /* 221.2 MHz */},
62         { .frequency = 235900,  /* 235.9 MHz */},
63         { .frequency = 250700,  /* 250.7 MHz */},
64         { .frequency = 265400,  /* 265.4 MHz */},
65         { .frequency = 280200,  /* 280.2 MHz */},
66         { .frequency = CPUFREQ_TABLE_END, },
67 };
68
69 unsigned int sa11x0_getspeed(unsigned int cpu)
70 {
71         if (cpu)
72                 return 0;
73         return sa11x0_freq_table[PPCR & 0xf].frequency;
74 }
75
76 /*
77  * Default power-off for SA1100
78  */
79 static void sa1100_power_off(void)
80 {
81         mdelay(100);
82         local_irq_disable();
83         /* disable internal oscillator, float CS lines */
84         PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
85         /* enable wake-up on GPIO0 (Assabet...) */
86         PWER = GFER = GRER = 1;
87         /*
88          * set scratchpad to zero, just in case it is used as a
89          * restart address by the bootloader.
90          */
91         PSPR = 0;
92         /* enter sleep mode */
93         PMCR = PMCR_SF;
94 }
95
96 void sa11x0_restart(enum reboot_mode mode, const char *cmd)
97 {
98         if (mode == REBOOT_SOFT) {
99                 /* Jump into ROM at address 0 */
100                 soft_restart(0);
101         } else {
102                 /* Use on-chip reset capability */
103                 RSRR = RSRR_SWR;
104         }
105 }
106
107 static void sa11x0_register_device(struct platform_device *dev, void *data)
108 {
109         int err;
110         dev->dev.platform_data = data;
111         err = platform_device_register(dev);
112         if (err)
113                 printk(KERN_ERR "Unable to register device %s: %d\n",
114                         dev->name, err);
115 }
116
117
118 static struct resource sa11x0udc_resources[] = {
119         [0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K),
120         [1] = DEFINE_RES_IRQ(IRQ_Ser0UDC),
121 };
122
123 static u64 sa11x0udc_dma_mask = 0xffffffffUL;
124
125 static struct platform_device sa11x0udc_device = {
126         .name           = "sa11x0-udc",
127         .id             = -1,
128         .dev            = {
129                 .dma_mask = &sa11x0udc_dma_mask,
130                 .coherent_dma_mask = 0xffffffff,
131         },
132         .num_resources  = ARRAY_SIZE(sa11x0udc_resources),
133         .resource       = sa11x0udc_resources,
134 };
135
136 static struct resource sa11x0uart1_resources[] = {
137         [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
138         [1] = DEFINE_RES_IRQ(IRQ_Ser1UART),
139 };
140
141 static struct platform_device sa11x0uart1_device = {
142         .name           = "sa11x0-uart",
143         .id             = 1,
144         .num_resources  = ARRAY_SIZE(sa11x0uart1_resources),
145         .resource       = sa11x0uart1_resources,
146 };
147
148 static struct resource sa11x0uart3_resources[] = {
149         [0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K),
150         [1] = DEFINE_RES_IRQ(IRQ_Ser3UART),
151 };
152
153 static struct platform_device sa11x0uart3_device = {
154         .name           = "sa11x0-uart",
155         .id             = 3,
156         .num_resources  = ARRAY_SIZE(sa11x0uart3_resources),
157         .resource       = sa11x0uart3_resources,
158 };
159
160 static struct resource sa11x0mcp_resources[] = {
161         [0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0), SZ_64K),
162         [1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1), 4),
163         [2] = DEFINE_RES_IRQ(IRQ_Ser4MCP),
164 };
165
166 static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
167
168 static struct platform_device sa11x0mcp_device = {
169         .name           = "sa11x0-mcp",
170         .id             = -1,
171         .dev = {
172                 .dma_mask = &sa11x0mcp_dma_mask,
173                 .coherent_dma_mask = 0xffffffff,
174         },
175         .num_resources  = ARRAY_SIZE(sa11x0mcp_resources),
176         .resource       = sa11x0mcp_resources,
177 };
178
179 void __init sa11x0_ppc_configure_mcp(void)
180 {
181         /* Setup the PPC unit for the MCP */
182         PPDR &= ~PPC_RXD4;
183         PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
184         PSDR |= PPC_RXD4;
185         PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
186         PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
187 }
188
189 void sa11x0_register_mcp(struct mcp_plat_data *data)
190 {
191         sa11x0_register_device(&sa11x0mcp_device, data);
192 }
193
194 static struct resource sa11x0ssp_resources[] = {
195         [0] = DEFINE_RES_MEM(0x80070000, SZ_64K),
196         [1] = DEFINE_RES_IRQ(IRQ_Ser4SSP),
197 };
198
199 static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
200
201 static struct platform_device sa11x0ssp_device = {
202         .name           = "sa11x0-ssp",
203         .id             = -1,
204         .dev = {
205                 .dma_mask = &sa11x0ssp_dma_mask,
206                 .coherent_dma_mask = 0xffffffff,
207         },
208         .num_resources  = ARRAY_SIZE(sa11x0ssp_resources),
209         .resource       = sa11x0ssp_resources,
210 };
211
212 static struct resource sa11x0fb_resources[] = {
213         [0] = DEFINE_RES_MEM(0xb0100000, SZ_64K),
214         [1] = DEFINE_RES_IRQ(IRQ_LCD),
215 };
216
217 static struct platform_device sa11x0fb_device = {
218         .name           = "sa11x0-fb",
219         .id             = -1,
220         .dev = {
221                 .coherent_dma_mask = 0xffffffff,
222         },
223         .num_resources  = ARRAY_SIZE(sa11x0fb_resources),
224         .resource       = sa11x0fb_resources,
225 };
226
227 void sa11x0_register_lcd(struct sa1100fb_mach_info *inf)
228 {
229         sa11x0_register_device(&sa11x0fb_device, inf);
230 }
231
232 static struct platform_device sa11x0pcmcia_device = {
233         .name           = "sa11x0-pcmcia",
234         .id             = -1,
235 };
236
237 static struct platform_device sa11x0mtd_device = {
238         .name           = "sa1100-mtd",
239         .id             = -1,
240 };
241
242 void sa11x0_register_mtd(struct flash_platform_data *flash,
243                          struct resource *res, int nr)
244 {
245         flash->name = "sa1100";
246         sa11x0mtd_device.resource = res;
247         sa11x0mtd_device.num_resources = nr;
248         sa11x0_register_device(&sa11x0mtd_device, flash);
249 }
250
251 static struct resource sa11x0ir_resources[] = {
252         DEFINE_RES_MEM(__PREG(Ser2UTCR0), 0x24),
253         DEFINE_RES_MEM(__PREG(Ser2HSCR0), 0x1c),
254         DEFINE_RES_MEM(__PREG(Ser2HSCR2), 0x04),
255         DEFINE_RES_IRQ(IRQ_Ser2ICP),
256 };
257
258 static struct platform_device sa11x0ir_device = {
259         .name           = "sa11x0-ir",
260         .id             = -1,
261         .num_resources  = ARRAY_SIZE(sa11x0ir_resources),
262         .resource       = sa11x0ir_resources,
263 };
264
265 void sa11x0_register_irda(struct irda_platform_data *irda)
266 {
267         sa11x0_register_device(&sa11x0ir_device, irda);
268 }
269
270 static struct resource sa1100_rtc_resources[] = {
271         DEFINE_RES_MEM(0x90010000, 0x40),
272         DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"),
273         DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm"),
274 };
275
276 static struct platform_device sa11x0rtc_device = {
277         .name           = "sa1100-rtc",
278         .id             = -1,
279         .num_resources  = ARRAY_SIZE(sa1100_rtc_resources),
280         .resource       = sa1100_rtc_resources,
281 };
282
283 static struct resource sa11x0dma_resources[] = {
284         DEFINE_RES_MEM(DMA_PHYS, DMA_SIZE),
285         DEFINE_RES_IRQ(IRQ_DMA0),
286         DEFINE_RES_IRQ(IRQ_DMA1),
287         DEFINE_RES_IRQ(IRQ_DMA2),
288         DEFINE_RES_IRQ(IRQ_DMA3),
289         DEFINE_RES_IRQ(IRQ_DMA4),
290         DEFINE_RES_IRQ(IRQ_DMA5),
291 };
292
293 static u64 sa11x0dma_dma_mask = DMA_BIT_MASK(32);
294
295 static struct platform_device sa11x0dma_device = {
296         .name           = "sa11x0-dma",
297         .id             = -1,
298         .dev = {
299                 .dma_mask = &sa11x0dma_dma_mask,
300                 .coherent_dma_mask = 0xffffffff,
301         },
302         .num_resources  = ARRAY_SIZE(sa11x0dma_resources),
303         .resource       = sa11x0dma_resources,
304 };
305
306 static struct platform_device *sa11x0_devices[] __initdata = {
307         &sa11x0udc_device,
308         &sa11x0uart1_device,
309         &sa11x0uart3_device,
310         &sa11x0ssp_device,
311         &sa11x0pcmcia_device,
312         &sa11x0rtc_device,
313         &sa11x0dma_device,
314 };
315
316 static int __init sa1100_init(void)
317 {
318         pm_power_off = sa1100_power_off;
319         return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
320 }
321
322 arch_initcall(sa1100_init);
323
324 void __init sa11x0_init_late(void)
325 {
326         sa11x0_pm_init();
327 }
328
329 /*
330  * Common I/O mapping:
331  *
332  * Typically, static virtual address mappings are as follow:
333  *
334  * 0xf0000000-0xf3ffffff:       miscellaneous stuff (CPLDs, etc.)
335  * 0xf4000000-0xf4ffffff:       SA-1111
336  * 0xf5000000-0xf5ffffff:       reserved (used by cache flushing area)
337  * 0xf6000000-0xfffeffff:       reserved (internal SA1100 IO defined above)
338  * 0xffff0000-0xffff0fff:       SA1100 exception vectors
339  * 0xffff2000-0xffff2fff:       Minicache copy_user_page area
340  *
341  * Below 0xe8000000 is reserved for vm allocation.
342  *
343  * The machine specific code must provide the extra mapping beside the
344  * default mapping provided here.
345  */
346
347 static struct map_desc standard_io_desc[] __initdata = {
348         {       /* PCM */
349                 .virtual        =  0xf8000000,
350                 .pfn            = __phys_to_pfn(0x80000000),
351                 .length         = 0x00100000,
352                 .type           = MT_DEVICE
353         }, {    /* SCM */
354                 .virtual        =  0xfa000000,
355                 .pfn            = __phys_to_pfn(0x90000000),
356                 .length         = 0x00100000,
357                 .type           = MT_DEVICE
358         }, {    /* MER */
359                 .virtual        =  0xfc000000,
360                 .pfn            = __phys_to_pfn(0xa0000000),
361                 .length         = 0x00100000,
362                 .type           = MT_DEVICE
363         }, {    /* LCD + DMA */
364                 .virtual        =  0xfe000000,
365                 .pfn            = __phys_to_pfn(0xb0000000),
366                 .length         = 0x00200000,
367                 .type           = MT_DEVICE
368         },
369 };
370
371 void __init sa1100_map_io(void)
372 {
373         iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
374 }
375
376 void __init sa1100_timer_init(void)
377 {
378         pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x90000000), 3686400);
379 }
380
381 static struct resource irq_resource =
382         DEFINE_RES_MEM_NAMED(0x90050000, SZ_64K, "irqs");
383
384 void __init sa1100_init_irq(void)
385 {
386         request_resource(&iomem_resource, &irq_resource);
387
388         sa11x0_init_irq_nodt(IRQ_GPIO0_SC, irq_resource.start);
389
390         sa1100_init_gpio();
391 }
392
393 /*
394  * Disable the memory bus request/grant signals on the SA1110 to
395  * ensure that we don't receive spurious memory requests.  We set
396  * the MBGNT signal false to ensure the SA1111 doesn't own the
397  * SDRAM bus.
398  */
399 void sa1110_mb_disable(void)
400 {
401         unsigned long flags;
402
403         local_irq_save(flags);
404         
405         PGSR &= ~GPIO_MBGNT;
406         GPCR = GPIO_MBGNT;
407         GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
408
409         GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
410
411         local_irq_restore(flags);
412 }
413
414 /*
415  * If the system is going to use the SA-1111 DMA engines, set up
416  * the memory bus request/grant pins.
417  */
418 void sa1110_mb_enable(void)
419 {
420         unsigned long flags;
421
422         local_irq_save(flags);
423
424         PGSR &= ~GPIO_MBGNT;
425         GPCR = GPIO_MBGNT;
426         GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
427
428         GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
429         TUCR |= TUCR_MR;
430
431         local_irq_restore(flags);
432 }
433
434 int sa11x0_gpio_set_wake(unsigned int gpio, unsigned int on)
435 {
436         if (on)
437                 PWER |= BIT(gpio);
438         else
439                 PWER &= ~BIT(gpio);
440
441         return 0;
442 }
443
444 int sa11x0_sc_set_wake(unsigned int irq, unsigned int on)
445 {
446         if (BIT(irq) != IC_RTCAlrm)
447                 return -EINVAL;
448
449         if (on)
450                 PWER |= PWER_RTC;
451         else
452                 PWER &= ~PWER_RTC;
453
454         return 0;
455 }