kernel/arch/arm/mach-omap2/cm-regbits-7xx.h

   1 /*
   2  * DRA7xx Clock Management register bits
   3  *
   4  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
   5  *
   6  * Generated by code originally written by:
   7  * Paul Walmsley (paul@pwsan.com)
   8  * Rajendra Nayak (rnayak@ti.com)
   9  * Benoit Cousson (b-cousson@ti.com)
  10  *
  11  * This file is automatically generated from the OMAP hardware databases.
  12  * We respectfully ask that any modifications to this file be coordinated
  13  * with the public linux-omap@vger.kernel.org mailing list and the
  14  * authors above to ensure that the autogeneration scripts are kept
  15  * up-to-date with the file contents.
  16  *
  17  * This program is free software; you can redistribute it and/or modify
  18  * it under the terms of the GNU General Public License version 2 as
  19  * published by the Free Software Foundation.
  20  */
  21
  22 #ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_7XX_H
  23 #define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_7XX_H
  24
  25 #define DRA7XX_ATL_STATDEP_SHIFT                                30
  26 #define DRA7XX_CAM_STATDEP_SHIFT                                9
  27 #define DRA7XX_DSP1_STATDEP_SHIFT                               1
  28 #define DRA7XX_DSP2_STATDEP_SHIFT                               18
  29 #define DRA7XX_DSS_STATDEP_SHIFT                                8
  30 #define DRA7XX_EMIF_STATDEP_SHIFT                               4
  31 #define DRA7XX_EVE1_STATDEP_SHIFT                               19
  32 #define DRA7XX_EVE2_STATDEP_SHIFT                               20
  33 #define DRA7XX_EVE3_STATDEP_SHIFT                               21
  34 #define DRA7XX_EVE4_STATDEP_SHIFT                               22
  35 #define DRA7XX_GMAC_STATDEP_SHIFT                               25
  36 #define DRA7XX_GPU_STATDEP_SHIFT                                10
  37 #define DRA7XX_IPU1_STATDEP_SHIFT                               23
  38 #define DRA7XX_IPU2_STATDEP_SHIFT                               0
  39 #define DRA7XX_IPU_STATDEP_SHIFT                                24
  40 #define DRA7XX_IVA_STATDEP_SHIFT                                2
  41 #define DRA7XX_L3INIT_STATDEP_SHIFT                             7
  42 #define DRA7XX_L3MAIN1_STATDEP_SHIFT                            5
  43 #define DRA7XX_L4CFG_STATDEP_SHIFT                              12
  44 #define DRA7XX_L4PER2_STATDEP_SHIFT                             26
  45 #define DRA7XX_L4PER3_STATDEP_SHIFT                             27
  46 #define DRA7XX_L4PER_STATDEP_SHIFT                              13
  47 #define DRA7XX_L4SEC_STATDEP_SHIFT                              14
  48 #define DRA7XX_PCIE_STATDEP_SHIFT                               29
  49 #define DRA7XX_VPE_STATDEP_SHIFT                                28
  50 #define DRA7XX_WKUPAON_STATDEP_SHIFT                            15
  51 #endif