kernel/arch/arm/boot/dts/imx6sl-warp.dts

   1 /*
   2  * Copyright 2014, 2015 O.S. Systems Software LTDA.
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of
  12  *     the License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  *     You should have received a copy of the GNU General Public
  20  *     License along with this file; if not, write to the Free
  21  *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  22  *     MA 02110-1301 USA
  23  *
  24  * Or, alternatively,
  25  *
  26  *  b) Permission is hereby granted, free of charge, to any person
  27  *     obtaining a copy of this software and associated documentation
  28  *     files (the "Software"), to deal in the Software without
  29  *     restriction, including without limitation the rights to use,
  30  *     copy, modify, merge, publish, distribute, sublicense, and/or
  31  *     sell copies of the Software, and to permit persons to whom the
  32  *     Software is furnished to do so, subject to the following
  33  *     conditions:
  34  *
  35  *     The above copyright notice and this permission notice shall be
  36  *     included in all copies or substantial portions of the Software.
  37  *
  38  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  39  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  40  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  41  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  42  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  43  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  44  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  45  *     OTHER DEALINGS IN THE SOFTWARE.
  46  */
  47
  48 /dts-v1/;
  49
  50 #include <dt-bindings/gpio/gpio.h>
  51 #include "imx6sl.dtsi"
  52
  53 / {
  54         model = "WaRP Board";
  55         compatible = "warp,imx6sl-warp", "fsl,imx6sl";
  56
  57         memory {
  58                 reg = <0x80000000 0x20000000>;
  59         };
  60
  61         regulators {
  62                 compatible = "simple-bus";
  63                 #address-cells = <1>;
  64                 #size-cells = <0>;
  65
  66                 reg_usb_otg1_vbus: regulator@0 {
  67                         compatible = "regulator-fixed";
  68                         reg = <0>;
  69                         regulator-name = "usb_otg1_vbus";
  70                         regulator-min-microvolt = <5000000>;
  71                         regulator-max-microvolt = <5000000>;
  72                         gpio = <&gpio4 0 0>;
  73                         enable-active-high;
  74                 };
  75
  76                 reg_usb_otg2_vbus: regulator@1 {
  77                         compatible = "regulator-fixed";
  78                         reg = <1>;
  79                         regulator-name = "usb_otg2_vbus";
  80                         regulator-min-microvolt = <5000000>;
  81                         regulator-max-microvolt = <5000000>;
  82                         gpio = <&gpio4 2 0>;
  83                         enable-active-high;
  84                 };
  85
  86                 reg_1p8v: regulator@2 {
  87                         compatible = "regulator-fixed";
  88                         reg = <2>;
  89                         regulator-name = "1P8V";
  90                         regulator-min-microvolt = <1800000>;
  91                         regulator-max-microvolt = <1800000>;
  92                 };
  93         };
  94
  95         usdhc3_pwrseq: usdhc3_pwrseq {
  96                 compatible = "mmc-pwrseq-simple";
  97                 reset-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>,       /* WL_REG_ON */
  98                               <&gpio3 25 GPIO_ACTIVE_LOW>,      /* BT_REG_ON */
  99                               <&gpio4 4 GPIO_ACTIVE_LOW>,       /* BT_WAKE */
 100                               <&gpio4 6 GPIO_ACTIVE_LOW>;       /* BT_RST_N */
 101         };
 102 };
 103
 104 &uart1 {
 105         pinctrl-names = "default";
 106         pinctrl-0 = <&pinctrl_uart1>;
 107         status = "okay";
 108 };
 109
 110 &uart2 {
 111         pinctrl-names = "default";
 112         pinctrl-0 = <&pinctrl_uart2>;
 113         fsl,uart-has-rtscts;
 114         status = "okay";
 115 };
 116
 117 &uart3 {
 118         pinctrl-names = "default";
 119         pinctrl-0 = <&pinctrl_uart3>;
 120         status = "okay";
 121 };
 122
 123 &usbotg1 {
 124         vbus-supply = <&reg_usb_otg1_vbus>;
 125         dr_mode = "host";
 126         disable-over-current;
 127         status = "okay";
 128 };
 129
 130 &usbotg2 {
 131         vbus-supply = <&reg_usb_otg2_vbus>;
 132         disable-over-current;
 133         status = "okay";
 134 };
 135
 136 &usdhc2 {
 137         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 138         pinctrl-0 = <&pinctrl_usdhc2>;
 139         pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
 140         pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
 141         bus-width = <8>;
 142         non-removable;
 143         status = "okay";
 144 };
 145
 146 &usdhc3 {
 147         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 148         pinctrl-0 = <&pinctrl_usdhc3>;
 149         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
 150         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
 151         bus-width = <4>;
 152         non-removable;
 153         keep-power-in-suspend;
 154         enable-sdio-wakeup;
 155         mmc-pwrseq = <&usdhc3_pwrseq>;
 156         status = "okay";
 157 };
 158
 159 &iomuxc {
 160         imx6sl-warp {
 161                 pinctrl_uart1: uart1grp {
 162                         fsl,pins = <
 163                                 MX6SL_PAD_UART1_RXD__UART1_RX_DATA      0x41b0b1
 164                                 MX6SL_PAD_UART1_TXD__UART1_TX_DATA      0x41b0b1
 165                         >;
 166                 };
 167
 168                 pinctrl_uart2: uart2grp {
 169                         fsl,pins = <
 170                                 MX6SL_PAD_EPDC_D12__UART2_RX_DATA       0x41b0b1
 171                                 MX6SL_PAD_EPDC_D13__UART2_TX_DATA       0x41b0b1
 172                                 MX6SL_PAD_EPDC_D14__UART2_RTS_B         0x4130B1
 173                                 MX6SL_PAD_EPDC_D15__UART2_CTS_B         0x4130B1
 174                         >;
 175                 };
 176
 177                 pinctrl_uart3: uart3grp {
 178                         fsl,pins = <
 179                                 MX6SL_PAD_AUD_RXC__UART3_RX_DATA        0x41b0b1
 180                                 MX6SL_PAD_AUD_RXC__UART3_TX_DATA        0x41b0b1
 181                         >;
 182                 };
 183
 184                 pinctrl_usdhc2: usdhc2grp {
 185                         fsl,pins = <
 186                                 MX6SL_PAD_SD2_CMD__SD2_CMD              0x417059
 187                                 MX6SL_PAD_SD2_CLK__SD2_CLK              0x410059
 188                                 MX6SL_PAD_SD2_DAT0__SD2_DATA0           0x417059
 189                                 MX6SL_PAD_SD2_DAT1__SD2_DATA1           0x417059
 190                                 MX6SL_PAD_SD2_DAT2__SD2_DATA2           0x417059
 191                                 MX6SL_PAD_SD2_DAT3__SD2_DATA3           0x417059
 192                                 MX6SL_PAD_SD2_DAT4__SD2_DATA4           0x417059
 193                                 MX6SL_PAD_SD2_DAT5__SD2_DATA5           0x417059
 194                                 MX6SL_PAD_SD2_DAT6__SD2_DATA6           0x417059
 195                                 MX6SL_PAD_SD2_DAT7__SD2_DATA7           0x417059
 196                         >;
 197                 };
 198
 199                 pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
 200                         fsl,pins = <
 201                                 MX6SL_PAD_SD2_CMD__SD2_CMD              0x4170b9
 202                                 MX6SL_PAD_SD2_CLK__SD2_CLK              0x4100b9
 203                                 MX6SL_PAD_SD2_DAT0__SD2_DATA0           0x4170b9
 204                                 MX6SL_PAD_SD2_DAT1__SD2_DATA1           0x4170b9
 205                                 MX6SL_PAD_SD2_DAT2__SD2_DATA2           0x4170b9
 206                                 MX6SL_PAD_SD2_DAT3__SD2_DATA3           0x4170b9
 207                                 MX6SL_PAD_SD2_DAT4__SD2_DATA4           0x4170b9
 208                                 MX6SL_PAD_SD2_DAT5__SD2_DATA5           0x4170b9
 209                                 MX6SL_PAD_SD2_DAT6__SD2_DATA6           0x4170b9
 210                                 MX6SL_PAD_SD2_DAT7__SD2_DATA7           0x4170b9
 211                         >;
 212                 };
 213
 214                 pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
 215                         fsl,pins = <
 216                                 MX6SL_PAD_SD2_CMD__SD2_CMD              0x4170f9
 217                                 MX6SL_PAD_SD2_CLK__SD2_CLK              0x4100f9
 218                                 MX6SL_PAD_SD2_DAT0__SD2_DATA0           0x4170f9
 219                                 MX6SL_PAD_SD2_DAT1__SD2_DATA1           0x4170f9
 220                                 MX6SL_PAD_SD2_DAT2__SD2_DATA2           0x4170f9
 221                                 MX6SL_PAD_SD2_DAT3__SD2_DATA3           0x4170f9
 222                                 MX6SL_PAD_SD2_DAT4__SD2_DATA4           0x4170f9
 223                                 MX6SL_PAD_SD2_DAT5__SD2_DATA5           0x4170f9
 224                                 MX6SL_PAD_SD2_DAT6__SD2_DATA6           0x4170f9
 225                                 MX6SL_PAD_SD2_DAT7__SD2_DATA7           0x4170f9
 226                         >;
 227                 };
 228
 229                 pinctrl_usdhc3: usdhc3grp {
 230                         fsl,pins = <
 231                                 MX6SL_PAD_SD3_CMD__SD3_CMD              0x417059
 232                                 MX6SL_PAD_SD3_CLK__SD3_CLK              0x410059
 233                                 MX6SL_PAD_SD3_DAT0__SD3_DATA0           0x417059
 234                                 MX6SL_PAD_SD3_DAT1__SD3_DATA1           0x417059
 235                                 MX6SL_PAD_SD3_DAT2__SD3_DATA2           0x417059
 236                                 MX6SL_PAD_SD3_DAT3__SD3_DATA3           0x417059
 237                         >;
 238                 };
 239
 240                 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
 241                         fsl,pins = <
 242                                 MX6SL_PAD_SD3_CMD__SD3_CMD              0x4170b9
 243                                 MX6SL_PAD_SD3_CLK__SD3_CLK              0x4100b9
 244                                 MX6SL_PAD_SD3_DAT0__SD3_DATA0           0x4170b9
 245                                 MX6SL_PAD_SD3_DAT1__SD3_DATA1           0x4170b9
 246                                 MX6SL_PAD_SD3_DAT2__SD3_DATA2           0x4170b9
 247                                 MX6SL_PAD_SD3_DAT3__SD3_DATA3           0x4170b9
 248                         >;
 249                 };
 250
 251                 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
 252                         fsl,pins = <
 253                                 MX6SL_PAD_SD3_CMD__SD3_CMD              0x4170f9
 254                                 MX6SL_PAD_SD3_CLK__SD3_CLK              0x4100f9
 255                                 MX6SL_PAD_SD3_DAT0__SD3_DATA0           0x4170f9
 256                                 MX6SL_PAD_SD3_DAT1__SD3_DATA1           0x4170f9
 257                                 MX6SL_PAD_SD3_DAT2__SD3_DATA2           0x4170f9
 258                                 MX6SL_PAD_SD3_DAT3__SD3_DATA3           0x4170f9
 259                         >;
 260                 };
 261         };
 262 };