kernel/arch/arm/boot/dts/imx6qdl-wandboard.dtsi

   1 /*
   2  * Copyright 2013 Freescale Semiconductor, Inc.
   3  *
   4  * Author: Fabio Estevam <fabio.estevam@freescale.com>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  */
  11
  12 / {
  13         regulators {
  14                 compatible = "simple-bus";
  15                 #address-cells = <1>;
  16                 #size-cells = <0>;
  17
  18                 reg_2p5v: regulator@0 {
  19                         compatible = "regulator-fixed";
  20                         reg = <0>;
  21                         regulator-name = "2P5V";
  22                         regulator-min-microvolt = <2500000>;
  23                         regulator-max-microvolt = <2500000>;
  24                         regulator-always-on;
  25                 };
  26
  27                 reg_3p3v: regulator@1 {
  28                         compatible = "regulator-fixed";
  29                         reg = <1>;
  30                         regulator-name = "3P3V";
  31                         regulator-min-microvolt = <3300000>;
  32                         regulator-max-microvolt = <3300000>;
  33                         regulator-always-on;
  34                 };
  35         };
  36
  37         sound {
  38                 compatible = "fsl,imx6-wandboard-sgtl5000",
  39                              "fsl,imx-audio-sgtl5000";
  40                 model = "imx6-wandboard-sgtl5000";
  41                 ssi-controller = <&ssi1>;
  42                 audio-codec = <&codec>;
  43                 audio-routing =
  44                         "MIC_IN", "Mic Jack",
  45                         "Mic Jack", "Mic Bias",
  46                         "Headphone Jack", "HP_OUT";
  47                 mux-int-port = <1>;
  48                 mux-ext-port = <3>;
  49         };
  50
  51         sound-spdif {
  52                 compatible = "fsl,imx-audio-spdif";
  53                 model = "imx-spdif";
  54                 spdif-controller = <&spdif>;
  55                 spdif-out;
  56         };
  57 };
  58
  59 &audmux {
  60         pinctrl-names = "default";
  61         pinctrl-0 = <&pinctrl_audmux>;
  62         status = "okay";
  63 };
  64
  65 &hdmi {
  66         ddc-i2c-bus = <&i2c1>;
  67         status = "okay";
  68 };
  69
  70 &i2c1 {
  71         clock-frequency = <100000>;
  72         pinctrl-names = "default";
  73         pinctrl-0 = <&pinctrl_i2c1>;
  74         status = "okay";
  75 };
  76
  77 &i2c2 {
  78         clock-frequency = <100000>;
  79         pinctrl-names = "default";
  80         pinctrl-0 = <&pinctrl_i2c2>;
  81         status = "okay";
  82
  83         codec: sgtl5000@0a {
  84                 compatible = "fsl,sgtl5000";
  85                 reg = <0x0a>;
  86                 clocks = <&clks 201>;
  87                 VDDA-supply = <&reg_2p5v>;
  88                 VDDIO-supply = <&reg_3p3v>;
  89         };
  90 };
  91
  92 &iomuxc {
  93         pinctrl-names = "default";
  94
  95         imx6qdl-wandboard {
  96
  97                 pinctrl_audmux: audmuxgrp {
  98                         fsl,pins = <
  99                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
 100                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
 101                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
 102                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
 103                         >;
 104                 };
 105
 106                 pinctrl_enet: enetgrp {
 107                         fsl,pins = <
 108                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 109                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 110                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
 111                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
 112                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
 113                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
 114                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
 115                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
 116                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 117                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 118                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 119                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 120                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 121                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 122                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 123                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 124                                 MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
 125                         >;
 126                 };
 127
 128                 pinctrl_i2c1: i2c1grp {
 129                         fsl,pins = <
 130                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 131                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 132                         >;
 133                 };
 134
 135                 pinctrl_i2c2: i2c2grp {
 136                         fsl,pins = <
 137                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 138                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 139                         >;
 140                 };
 141
 142                 pinctrl_spdif: spdifgrp {
 143                         fsl,pins = <
 144                                 MX6QDL_PAD_ENET_RXD0__SPDIF_OUT         0x1b0b0
 145                         >;
 146                 };
 147
 148                 pinctrl_uart1: uart1grp {
 149                         fsl,pins = <
 150                                 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
 151                                 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
 152                         >;
 153                 };
 154
 155                 pinctrl_uart3: uart3grp {
 156                         fsl,pins = <
 157                                 MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
 158                                 MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
 159                                 MX6QDL_PAD_EIM_D23__UART3_CTS_B         0x1b0b1
 160                                 MX6QDL_PAD_EIM_EB3__UART3_RTS_B         0x1b0b1
 161                         >;
 162                 };
 163
 164                 pinctrl_usbotg: usbotggrp {
 165                         fsl,pins = <
 166                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 167                         >;
 168                 };
 169
 170                 pinctrl_usdhc1: usdhc1grp {
 171                         fsl,pins = <
 172                                 MX6QDL_PAD_SD1_CMD__SD1_CMD             0x17059
 173                                 MX6QDL_PAD_SD1_CLK__SD1_CLK             0x10059
 174                                 MX6QDL_PAD_SD1_DAT0__SD1_DATA0          0x17059
 175                                 MX6QDL_PAD_SD1_DAT1__SD1_DATA1          0x17059
 176                                 MX6QDL_PAD_SD1_DAT2__SD1_DATA2          0x17059
 177                                 MX6QDL_PAD_SD1_DAT3__SD1_DATA3          0x17059
 178                         >;
 179                 };
 180
 181                 pinctrl_usdhc2: usdhc2grp {
 182                         fsl,pins = <
 183                                 MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
 184                                 MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
 185                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
 186                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
 187                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
 188                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
 189                         >;
 190                 };
 191
 192                 pinctrl_usdhc3: usdhc3grp {
 193                         fsl,pins = <
 194                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 195                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 196                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 197                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 198                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 199                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 200                         >;
 201                 };
 202         };
 203 };
 204
 205 &fec {
 206         pinctrl-names = "default";
 207         pinctrl-0 = <&pinctrl_enet>;
 208         phy-mode = "rgmii";
 209         phy-reset-gpios = <&gpio3 29 0>;
 210         interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
 211                               <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
 212         status = "okay";
 213 };
 214
 215 &spdif {
 216         pinctrl-names = "default";
 217         pinctrl-0 = <&pinctrl_spdif>;
 218         status = "okay";
 219 };
 220
 221 &ssi1 {
 222         status = "okay";
 223 };
 224
 225 &uart1 {
 226         pinctrl-names = "default";
 227         pinctrl-0 = <&pinctrl_uart1>;
 228         status = "okay";
 229 };
 230
 231 &uart3 {
 232         pinctrl-names = "default";
 233         pinctrl-0 = <&pinctrl_uart3>;
 234         fsl,uart-has-rtscts;
 235         status = "okay";
 236 };
 237
 238 &usbh1 {
 239         status = "okay";
 240 };
 241
 242 &usbotg {
 243         pinctrl-names = "default";
 244         pinctrl-0 = <&pinctrl_usbotg>;
 245         disable-over-current;
 246         dr_mode = "peripheral";
 247         status = "okay";
 248 };
 249
 250 &usdhc1 {
 251         pinctrl-names = "default";
 252         pinctrl-0 = <&pinctrl_usdhc1>;
 253         cd-gpios = <&gpio1 2 0>;
 254         status = "okay";
 255 };
 256
 257 &usdhc3 {
 258         pinctrl-names = "default";
 259         pinctrl-0 = <&pinctrl_usdhc3>;
 260         cd-gpios = <&gpio3 9 0>;
 261         status = "okay";
 262 };