kernel/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt

   1 * Temperature Sensor ADC (TSADC) on rockchip SoCs
   2
   3 Required properties:
   4 - compatible : should be "rockchip,<name>-tsadc"
   5    "rockchip,rk3288-tsadc": found on RK3288 SoCs
   6    "rockchip,rk3368-tsadc": found on RK3368 SoCs
   7 - reg : physical base address of the controller and length of memory mapped
   8         region.
   9 - interrupts : The interrupt number to the cpu. The interrupt specifier format
  10                depends on the interrupt controller.
  11 - clocks : Must contain an entry for each entry in clock-names.
  12 - clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for
  13                 the peripheral clock.
  14 - resets : Must contain an entry for each entry in reset-names.
  15            See ../reset/reset.txt for details.
  16 - reset-names : Must include the name "tsadc-apb".
  17 - pinctrl-names : The pin control state names;
  18 - pinctrl-0 : The "init" pinctrl state, it will be set before device probe.
  19 - pinctrl-1 : The "default" pinctrl state, it will be set after reset the
  20               TSADC controller.
  21 - pinctrl-2 : The "sleep" pinctrl state, it will be in for suspend.
  22 - #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description.
  23 - rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value.
  24 - rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO.
  25 - rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW
  26                                1:HIGH.
  27
  28 Exiample:
  29 tsadc: tsadc@ff280000 {
  30         compatible = "rockchip,rk3288-tsadc";
  31         reg = <0xff280000 0x100>;
  32         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
  33         clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
  34         clock-names = "tsadc", "apb_pclk";
  35         resets = <&cru SRST_TSADC>;
  36         reset-names = "tsadc-apb";
  37         pinctrl-names = "init", "default", "sleep";
  38         pinctrl-0 = <&otp_gpio>;
  39         pinctrl-1 = <&otp_out>;
  40         pinctrl-2 = <&otp_gpio>;
  41         #thermal-sensor-cells = <1>;
  42         rockchip,hw-tshut-temp = <95000>;
  43         rockchip,hw-tshut-mode = <0>;
  44         rockchip,hw-tshut-polarity = <0>;
  45 };
  46
  47 Example: referring to thermal sensors:
  48 thermal-zones {
  49         cpu_thermal: cpu_thermal {
  50                 polling-delay-passive = <1000>; /* milliseconds */
  51                 polling-delay = <5000>; /* milliseconds */
  52
  53                 /* sensor       ID */
  54                 thermal-sensors = <&tsadc       1>;
  55
  56                 trips {
  57                         cpu_alert0: cpu_alert {
  58                                 temperature = <70000>; /* millicelsius */
  59                                 hysteresis = <2000>; /* millicelsius */
  60                                 type = "passive";
  61                         };
  62                         cpu_crit: cpu_crit {
  63                                 temperature = <90000>; /* millicelsius */
  64                                 hysteresis = <2000>; /* millicelsius */
  65                                 type = "critical";
  66                         };
  67                 };
  68
  69                 cooling-maps {
  70                         map0 {
  71                                 trip = <&cpu_alert0>;
  72                                 cooling-device =
  73                                     <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
  74                         };
  75                 };
  76         };
  77 };