2 * comedi/drivers/pcl812.c
4 * Author: Michal Dobes <dobes@tesnet.cz>
6 * hardware driver for Advantech cards
7 * card: PCL-812, PCL-812PG, PCL-813, PCL-813B
8 * driver: pcl812, pcl812pg, pcl813, pcl813b
10 * card: ACL-8112DG, ACL-8112HG, ACL-8112PG, ACL-8113, ACL-8216
11 * driver: acl8112dg, acl8112hg, acl8112pg, acl8113, acl8216
12 * and for ICP DAS cards
13 * card: ISO-813, A-821PGH, A-821PGL, A-821PGL-NDA, A-822PGH, A-822PGL,
14 * driver: iso813, a821pgh, a-821pgl, a-821pglnda, a822pgh, a822pgl,
15 * card: A-823PGH, A-823PGL, A-826PG
16 * driver: a823pgh, a823pgl, a826pg
21 * Description: Advantech PCL-812/PG, PCL-813/B,
22 * ADLink ACL-8112DG/HG/PG, ACL-8113, ACL-8216,
23 * ICP DAS A-821PGH/PGL/PGL-NDA, A-822PGH/PGL, A-823PGH/PGL, A-826PG,
25 * Author: Michal Dobes <dobes@tesnet.cz>
26 * Devices: [Advantech] PCL-812 (pcl812), PCL-812PG (pcl812pg),
27 * PCL-813 (pcl813), PCL-813B (pcl813b), [ADLink] ACL-8112DG (acl8112dg),
28 * ACL-8112HG (acl8112hg), ACL-8113 (acl-8113), ACL-8216 (acl8216),
29 * [ICP] ISO-813 (iso813), A-821PGH (a821pgh), A-821PGL (a821pgl),
30 * A-821PGL-NDA (a821pclnda), A-822PGH (a822pgh), A-822PGL (a822pgl),
31 * A-823PGH (a823pgh), A-823PGL (a823pgl), A-826PG (a826pg)
32 * Updated: Mon, 06 Aug 2007 12:03:15 +0100
33 * Status: works (I hope. My board fire up under my hands
34 * and I cann't test all features.)
36 * This driver supports insn and cmd interfaces. Some boards support only insn
37 * because their hardware don't allow more (PCL-813/B, ACL-8113, ISO-813).
38 * Data transfer over DMA is supported only when you measure only one
39 * channel, this is too hardware limitation of these boards.
41 * Options for PCL-812:
43 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7; 10, 11, 12, 14, 15)
44 * [2] - DMA (0=disable, 1, 3)
45 * [3] - 0=trigger source is internal 8253 with 2MHz clock
46 * 1=trigger source is external
47 * [4] - 0=A/D input range is +/-10V
48 * 1=A/D input range is +/-5V
49 * 2=A/D input range is +/-2.5V
50 * 3=A/D input range is +/-1.25V
51 * 4=A/D input range is +/-0.625V
52 * 5=A/D input range is +/-0.3125V
53 * [5] - 0=D/A outputs 0-5V (internal reference -5V)
54 * 1=D/A outputs 0-10V (internal reference -10V)
55 * 2=D/A outputs unknown (external reference)
57 * Options for PCL-812PG, ACL-8112PG:
59 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7; 10, 11, 12, 14, 15)
60 * [2] - DMA (0=disable, 1, 3)
61 * [3] - 0=trigger source is internal 8253 with 2MHz clock
62 * 1=trigger source is external
63 * [4] - 0=A/D have max +/-5V input
64 * 1=A/D have max +/-10V input
65 * [5] - 0=D/A outputs 0-5V (internal reference -5V)
66 * 1=D/A outputs 0-10V (internal reference -10V)
67 * 2=D/A outputs unknown (external reference)
69 * Options for ACL-8112DG/HG, A-822PGL/PGH, A-823PGL/PGH, ACL-8216, A-826PG:
71 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7; 10, 11, 12, 14, 15)
72 * [2] - DMA (0=disable, 1, 3)
73 * [3] - 0=trigger source is internal 8253 with 2MHz clock
74 * 1=trigger source is external
75 * [4] - 0=A/D channels are S.E.
76 * 1=A/D channels are DIFF
77 * [5] - 0=D/A outputs 0-5V (internal reference -5V)
78 * 1=D/A outputs 0-10V (internal reference -10V)
79 * 2=D/A outputs unknown (external reference)
81 * Options for A-821PGL/PGH:
83 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7)
84 * [2] - 0=A/D channels are S.E.
85 * 1=A/D channels are DIFF
86 * [3] - 0=D/A output 0-5V (internal reference -5V)
87 * 1=D/A output 0-10V (internal reference -10V)
89 * Options for A-821PGL-NDA:
91 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7)
92 * [2] - 0=A/D channels are S.E.
93 * 1=A/D channels are DIFF
95 * Options for PCL-813:
98 * Options for PCL-813B:
100 * [1] - 0= bipolar inputs
103 * Options for ACL-8113, ISO-813:
105 * [1] - 0= 10V bipolar inputs
106 * 1= 10V unipolar inputs
107 * 2= 20V bipolar inputs
108 * 3= 20V unipolar inputs
111 #include <linux/module.h>
112 #include <linux/interrupt.h>
113 #include <linux/gfp.h>
114 #include <linux/delay.h>
115 #include <linux/io.h>
117 #include "../comedidev.h"
119 #include "comedi_isadma.h"
120 #include "comedi_8254.h"
125 #define PCL812_TIMER_BASE 0x00
126 #define PCL812_AI_LSB_REG 0x04
127 #define PCL812_AI_MSB_REG 0x05
128 #define PCL812_AI_MSB_DRDY BIT(4)
129 #define PCL812_AO_LSB_REG(x) (0x04 + ((x) * 2))
130 #define PCL812_AO_MSB_REG(x) (0x05 + ((x) * 2))
131 #define PCL812_DI_LSB_REG 0x06
132 #define PCL812_DI_MSB_REG 0x07
133 #define PCL812_STATUS_REG 0x08
134 #define PCL812_STATUS_DRDY BIT(5)
135 #define PCL812_RANGE_REG 0x09
136 #define PCL812_MUX_REG 0x0a
137 #define PCL812_MUX_CHAN(x) ((x) << 0)
138 #define PCL812_MUX_CS0 BIT(4)
139 #define PCL812_MUX_CS1 BIT(5)
140 #define PCL812_CTRL_REG 0x0b
141 #define PCL812_CTRL_TRIG(x) (((x) & 0x7) << 0)
142 #define PCL812_CTRL_DISABLE_TRIG PCL812_CTRL_TRIG(0)
143 #define PCL812_CTRL_SOFT_TRIG PCL812_CTRL_TRIG(1)
144 #define PCL812_CTRL_PACER_DMA_TRIG PCL812_CTRL_TRIG(2)
145 #define PCL812_CTRL_PACER_EOC_TRIG PCL812_CTRL_TRIG(6)
146 #define PCL812_SOFTTRIG_REG 0x0c
147 #define PCL812_DO_LSB_REG 0x0d
148 #define PCL812_DO_MSB_REG 0x0e
150 #define MAX_CHANLIST_LEN 256 /* length of scan list */
152 static const struct comedi_lrange range_pcl812pg_ai = {
162 static const struct comedi_lrange range_pcl812pg2_ai = {
172 static const struct comedi_lrange range812_bipolar1_25 = {
178 static const struct comedi_lrange range812_bipolar0_625 = {
184 static const struct comedi_lrange range812_bipolar0_3125 = {
190 static const struct comedi_lrange range_pcl813b_ai = {
199 static const struct comedi_lrange range_pcl813b2_ai = {
208 static const struct comedi_lrange range_iso813_1_ai = {
218 static const struct comedi_lrange range_iso813_1_2_ai = {
228 static const struct comedi_lrange range_iso813_2_ai = {
237 static const struct comedi_lrange range_iso813_2_2_ai = {
246 static const struct comedi_lrange range_acl8113_1_ai = {
255 static const struct comedi_lrange range_acl8113_1_2_ai = {
264 static const struct comedi_lrange range_acl8113_2_ai = {
272 static const struct comedi_lrange range_acl8113_2_2_ai = {
280 static const struct comedi_lrange range_acl8112dg_ai = {
294 static const struct comedi_lrange range_acl8112hg_ai = {
311 static const struct comedi_lrange range_a821pgh_ai = {
320 enum pcl812_boardtype {
321 BOARD_PCL812PG = 0, /* and ACL-8112PG */
327 BOARD_ACL8112 = 7, /* ACL-8112DG/HG, A-822PGL/PGH, A-823PGL/PGH */
328 BOARD_ACL8216 = 8, /* and ICP DAS A-826PG */
329 BOARD_A821 = 9, /* PGH, PGL, PGL/NDA versions */
332 struct pcl812_board {
334 enum pcl812_boardtype board_type;
337 unsigned int ai_ns_min;
338 const struct comedi_lrange *rangelist_ai;
339 unsigned int irq_bits;
340 unsigned int has_dma:1;
341 unsigned int has_16bit_ai:1;
342 unsigned int has_mpc508_mux:1;
343 unsigned int has_dio:1;
346 static const struct pcl812_board boardtypes[] = {
349 .board_type = BOARD_PCL812,
353 .rangelist_ai = &range_bipolar10,
359 .board_type = BOARD_PCL812PG,
363 .rangelist_ai = &range_pcl812pg_ai,
369 .board_type = BOARD_PCL812PG,
373 .rangelist_ai = &range_pcl812pg_ai,
379 .board_type = BOARD_ACL8112,
380 .n_aichan = 16, /* 8 differential */
383 .rangelist_ai = &range_acl8112dg_ai,
390 .board_type = BOARD_ACL8112,
391 .n_aichan = 16, /* 8 differential */
394 .rangelist_ai = &range_acl8112hg_ai,
401 .board_type = BOARD_A821,
402 .n_aichan = 16, /* 8 differential */
405 .rangelist_ai = &range_pcl813b_ai,
409 .name = "a821pglnda",
410 .board_type = BOARD_A821,
411 .n_aichan = 16, /* 8 differential */
413 .rangelist_ai = &range_pcl813b_ai,
417 .board_type = BOARD_A821,
418 .n_aichan = 16, /* 8 differential */
421 .rangelist_ai = &range_a821pgh_ai,
426 .board_type = BOARD_ACL8112,
427 .n_aichan = 16, /* 8 differential */
430 .rangelist_ai = &range_acl8112dg_ai,
436 .board_type = BOARD_ACL8112,
437 .n_aichan = 16, /* 8 differential */
440 .rangelist_ai = &range_acl8112hg_ai,
446 .board_type = BOARD_ACL8112,
447 .n_aichan = 16, /* 8 differential */
450 .rangelist_ai = &range_acl8112dg_ai,
456 .board_type = BOARD_ACL8112,
457 .n_aichan = 16, /* 8 differential */
460 .rangelist_ai = &range_acl8112hg_ai,
466 .board_type = BOARD_PCL813,
468 .rangelist_ai = &range_pcl813b_ai,
471 .board_type = BOARD_PCL813B,
473 .rangelist_ai = &range_pcl813b_ai,
476 .board_type = BOARD_ACL8113,
478 .rangelist_ai = &range_acl8113_1_ai,
481 .board_type = BOARD_ISO813,
483 .rangelist_ai = &range_iso813_1_ai,
486 .board_type = BOARD_ACL8216,
487 .n_aichan = 16, /* 8 differential */
490 .rangelist_ai = &range_pcl813b2_ai,
498 .board_type = BOARD_ACL8216,
499 .n_aichan = 16, /* 8 differential */
502 .rangelist_ai = &range_pcl813b2_ai,
510 struct pcl812_private {
511 struct comedi_isadma *dma;
512 unsigned char range_correction; /* =1 we must add 1 to range number */
513 unsigned int last_ai_chanspec;
514 unsigned char mode_reg_int; /* stored INT number for some cards */
515 unsigned int ai_poll_ptr; /* how many samples transfer poll */
516 unsigned int max_812_ai_mode0_rangewait; /* settling time for gain */
517 unsigned int use_diff:1;
518 unsigned int use_mpc508:1;
519 unsigned int use_ext_trg:1;
520 unsigned int ai_dma:1;
521 unsigned int ai_eos:1;
524 static void pcl812_ai_setup_dma(struct comedi_device *dev,
525 struct comedi_subdevice *s,
526 unsigned int unread_samples)
528 struct pcl812_private *devpriv = dev->private;
529 struct comedi_isadma *dma = devpriv->dma;
530 struct comedi_isadma_desc *desc = &dma->desc[dma->cur_dma];
532 unsigned int max_samples;
533 unsigned int nsamples;
535 comedi_isadma_disable(dma->chan);
537 /* if using EOS, adapt DMA buffer to one scan */
538 bytes = devpriv->ai_eos ? comedi_bytes_per_scan(s) : desc->maxsize;
539 max_samples = comedi_bytes_to_samples(s, bytes);
542 * Determine dma size based on the buffer size plus the number of
543 * unread samples and the number of samples remaining in the command.
545 nsamples = comedi_nsamples_left(s, max_samples + unread_samples);
546 if (nsamples > unread_samples) {
547 nsamples -= unread_samples;
548 desc->size = comedi_samples_to_bytes(s, nsamples);
549 comedi_isadma_program(desc);
553 static void pcl812_ai_set_chan_range(struct comedi_device *dev,
554 unsigned int chanspec, char wait)
556 struct pcl812_private *devpriv = dev->private;
557 unsigned int chan = CR_CHAN(chanspec);
558 unsigned int range = CR_RANGE(chanspec);
559 unsigned int mux = 0;
561 if (chanspec == devpriv->last_ai_chanspec)
564 devpriv->last_ai_chanspec = chanspec;
566 if (devpriv->use_mpc508) {
567 if (devpriv->use_diff) {
568 mux |= PCL812_MUX_CS0 | PCL812_MUX_CS1;
571 mux |= PCL812_MUX_CS0;
573 mux |= PCL812_MUX_CS1;
577 outb(mux | PCL812_MUX_CHAN(chan), dev->iobase + PCL812_MUX_REG);
578 outb(range + devpriv->range_correction, dev->iobase + PCL812_RANGE_REG);
582 * XXX this depends on selected range and can be very long for
583 * some high gain ranges!
585 udelay(devpriv->max_812_ai_mode0_rangewait);
588 static void pcl812_ai_clear_eoc(struct comedi_device *dev)
590 /* writing any value clears the interrupt request */
591 outb(0, dev->iobase + PCL812_STATUS_REG);
594 static void pcl812_ai_soft_trig(struct comedi_device *dev)
596 /* writing any value triggers a software conversion */
597 outb(255, dev->iobase + PCL812_SOFTTRIG_REG);
600 static unsigned int pcl812_ai_get_sample(struct comedi_device *dev,
601 struct comedi_subdevice *s)
605 val = inb(dev->iobase + PCL812_AI_MSB_REG) << 8;
606 val |= inb(dev->iobase + PCL812_AI_LSB_REG);
608 return val & s->maxdata;
611 static int pcl812_ai_eoc(struct comedi_device *dev,
612 struct comedi_subdevice *s,
613 struct comedi_insn *insn,
614 unsigned long context)
618 if (s->maxdata > 0x0fff) {
619 status = inb(dev->iobase + PCL812_STATUS_REG);
620 if ((status & PCL812_STATUS_DRDY) == 0)
623 status = inb(dev->iobase + PCL812_AI_MSB_REG);
624 if ((status & PCL812_AI_MSB_DRDY) == 0)
630 static int pcl812_ai_cmdtest(struct comedi_device *dev,
631 struct comedi_subdevice *s, struct comedi_cmd *cmd)
633 const struct pcl812_board *board = dev->board_ptr;
634 struct pcl812_private *devpriv = dev->private;
638 /* Step 1 : check if triggers are trivially valid */
640 err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
641 err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
643 if (devpriv->use_ext_trg)
647 err |= comedi_check_trigger_src(&cmd->convert_src, flags);
649 err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
650 err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
655 /* Step 2a : make sure trigger sources are unique */
657 err |= comedi_check_trigger_is_unique(cmd->stop_src);
659 /* Step 2b : and mutually compatible */
664 /* Step 3: check if arguments are trivially valid */
666 err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
667 err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
669 if (cmd->convert_src == TRIG_TIMER) {
670 err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
672 } else { /* TRIG_EXT */
673 err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
676 err |= comedi_check_trigger_arg_min(&cmd->chanlist_len, 1);
677 err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
680 if (cmd->stop_src == TRIG_COUNT)
681 err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
683 err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
688 /* step 4: fix up any arguments */
690 if (cmd->convert_src == TRIG_TIMER) {
691 unsigned int arg = cmd->convert_arg;
693 comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
694 err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
703 static int pcl812_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
705 struct pcl812_private *devpriv = dev->private;
706 struct comedi_isadma *dma = devpriv->dma;
707 struct comedi_cmd *cmd = &s->async->cmd;
708 unsigned int ctrl = 0;
711 pcl812_ai_set_chan_range(dev, cmd->chanlist[0], 1);
713 if (dma) { /* check if we can use DMA transfer */
715 for (i = 1; i < cmd->chanlist_len; i++)
716 if (cmd->chanlist[0] != cmd->chanlist[i]) {
717 /* we cann't use DMA :-( */
725 devpriv->ai_poll_ptr = 0;
727 /* don't we want wake up every scan? */
728 if (cmd->flags & CMDF_WAKE_EOS) {
731 /* DMA is useless for this situation */
732 if (cmd->chanlist_len == 1)
736 if (devpriv->ai_dma) {
737 /* setup and enable dma for the first buffer */
739 pcl812_ai_setup_dma(dev, s, 0);
742 switch (cmd->convert_src) {
744 comedi_8254_update_divisors(dev->pacer);
745 comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
750 ctrl |= PCL812_CTRL_PACER_DMA_TRIG;
752 ctrl |= PCL812_CTRL_PACER_EOC_TRIG;
753 outb(devpriv->mode_reg_int | ctrl, dev->iobase + PCL812_CTRL_REG);
758 static bool pcl812_ai_next_chan(struct comedi_device *dev,
759 struct comedi_subdevice *s)
761 struct comedi_cmd *cmd = &s->async->cmd;
763 if (cmd->stop_src == TRIG_COUNT &&
764 s->async->scans_done >= cmd->stop_arg) {
765 s->async->events |= COMEDI_CB_EOA;
772 static void pcl812_handle_eoc(struct comedi_device *dev,
773 struct comedi_subdevice *s)
775 struct comedi_cmd *cmd = &s->async->cmd;
776 unsigned int chan = s->async->cur_chan;
777 unsigned int next_chan;
780 if (pcl812_ai_eoc(dev, s, NULL, 0)) {
781 dev_dbg(dev->class_dev, "A/D cmd IRQ without DRDY!\n");
782 s->async->events |= COMEDI_CB_ERROR;
786 val = pcl812_ai_get_sample(dev, s);
787 comedi_buf_write_samples(s, &val, 1);
789 /* Set up next channel. Added by abbotti 2010-01-20, but untested. */
790 next_chan = s->async->cur_chan;
791 if (cmd->chanlist[chan] != cmd->chanlist[next_chan])
792 pcl812_ai_set_chan_range(dev, cmd->chanlist[next_chan], 0);
794 pcl812_ai_next_chan(dev, s);
797 static void transfer_from_dma_buf(struct comedi_device *dev,
798 struct comedi_subdevice *s,
800 unsigned int bufptr, unsigned int len)
805 for (i = len; i; i--) {
807 comedi_buf_write_samples(s, &val, 1);
809 if (!pcl812_ai_next_chan(dev, s))
814 static void pcl812_handle_dma(struct comedi_device *dev,
815 struct comedi_subdevice *s)
817 struct pcl812_private *devpriv = dev->private;
818 struct comedi_isadma *dma = devpriv->dma;
819 struct comedi_isadma_desc *desc = &dma->desc[dma->cur_dma];
820 unsigned int nsamples;
823 nsamples = comedi_bytes_to_samples(s, desc->size) -
824 devpriv->ai_poll_ptr;
825 bufptr = devpriv->ai_poll_ptr;
826 devpriv->ai_poll_ptr = 0;
828 /* restart dma with the next buffer */
829 dma->cur_dma = 1 - dma->cur_dma;
830 pcl812_ai_setup_dma(dev, s, nsamples);
832 transfer_from_dma_buf(dev, s, desc->virt_addr, bufptr, nsamples);
835 static irqreturn_t pcl812_interrupt(int irq, void *d)
837 struct comedi_device *dev = d;
838 struct comedi_subdevice *s = dev->read_subdev;
839 struct pcl812_private *devpriv = dev->private;
841 if (!dev->attached) {
842 pcl812_ai_clear_eoc(dev);
847 pcl812_handle_dma(dev, s);
849 pcl812_handle_eoc(dev, s);
851 pcl812_ai_clear_eoc(dev);
853 comedi_handle_events(dev, s);
857 static int pcl812_ai_poll(struct comedi_device *dev, struct comedi_subdevice *s)
859 struct pcl812_private *devpriv = dev->private;
860 struct comedi_isadma *dma = devpriv->dma;
861 struct comedi_isadma_desc *desc;
866 /* poll is valid only for DMA transfer */
867 if (!devpriv->ai_dma)
870 spin_lock_irqsave(&dev->spinlock, flags);
872 poll = comedi_isadma_poll(dma);
873 poll = comedi_bytes_to_samples(s, poll);
874 if (poll > devpriv->ai_poll_ptr) {
875 desc = &dma->desc[dma->cur_dma];
876 transfer_from_dma_buf(dev, s, desc->virt_addr,
877 devpriv->ai_poll_ptr,
878 poll - devpriv->ai_poll_ptr);
879 /* new buffer position */
880 devpriv->ai_poll_ptr = poll;
882 ret = comedi_buf_n_bytes_ready(s);
888 spin_unlock_irqrestore(&dev->spinlock, flags);
893 static int pcl812_ai_cancel(struct comedi_device *dev,
894 struct comedi_subdevice *s)
896 struct pcl812_private *devpriv = dev->private;
899 comedi_isadma_disable(devpriv->dma->chan);
901 outb(devpriv->mode_reg_int | PCL812_CTRL_DISABLE_TRIG,
902 dev->iobase + PCL812_CTRL_REG);
903 comedi_8254_pacer_enable(dev->pacer, 1, 2, false);
904 pcl812_ai_clear_eoc(dev);
908 static int pcl812_ai_insn_read(struct comedi_device *dev,
909 struct comedi_subdevice *s,
910 struct comedi_insn *insn,
913 struct pcl812_private *devpriv = dev->private;
917 outb(devpriv->mode_reg_int | PCL812_CTRL_SOFT_TRIG,
918 dev->iobase + PCL812_CTRL_REG);
920 pcl812_ai_set_chan_range(dev, insn->chanspec, 1);
922 for (i = 0; i < insn->n; i++) {
923 pcl812_ai_clear_eoc(dev);
924 pcl812_ai_soft_trig(dev);
926 ret = comedi_timeout(dev, s, insn, pcl812_ai_eoc, 0);
930 data[i] = pcl812_ai_get_sample(dev, s);
932 outb(devpriv->mode_reg_int | PCL812_CTRL_DISABLE_TRIG,
933 dev->iobase + PCL812_CTRL_REG);
934 pcl812_ai_clear_eoc(dev);
936 return ret ? ret : insn->n;
939 static int pcl812_ao_insn_write(struct comedi_device *dev,
940 struct comedi_subdevice *s,
941 struct comedi_insn *insn,
944 unsigned int chan = CR_CHAN(insn->chanspec);
945 unsigned int val = s->readback[chan];
948 for (i = 0; i < insn->n; i++) {
950 outb(val & 0xff, dev->iobase + PCL812_AO_LSB_REG(chan));
951 outb((val >> 8) & 0x0f, dev->iobase + PCL812_AO_MSB_REG(chan));
953 s->readback[chan] = val;
958 static int pcl812_di_insn_bits(struct comedi_device *dev,
959 struct comedi_subdevice *s,
960 struct comedi_insn *insn,
963 data[1] = inb(dev->iobase + PCL812_DI_LSB_REG) |
964 (inb(dev->iobase + PCL812_DI_MSB_REG) << 8);
969 static int pcl812_do_insn_bits(struct comedi_device *dev,
970 struct comedi_subdevice *s,
971 struct comedi_insn *insn,
974 if (comedi_dio_update_state(s, data)) {
975 outb(s->state & 0xff, dev->iobase + PCL812_DO_LSB_REG);
976 outb((s->state >> 8), dev->iobase + PCL812_DO_MSB_REG);
984 static void pcl812_reset(struct comedi_device *dev)
986 const struct pcl812_board *board = dev->board_ptr;
987 struct pcl812_private *devpriv = dev->private;
990 /* disable analog input trigger */
991 outb(devpriv->mode_reg_int | PCL812_CTRL_DISABLE_TRIG,
992 dev->iobase + PCL812_CTRL_REG);
993 pcl812_ai_clear_eoc(dev);
996 * Invalidate last_ai_chanspec then set analog input to
997 * known channel/range.
999 devpriv->last_ai_chanspec = CR_PACK(16, 0, 0);
1000 pcl812_ai_set_chan_range(dev, CR_PACK(0, 0, 0), 0);
1002 /* set analog output channels to 0V */
1003 for (chan = 0; chan < board->n_aochan; chan++) {
1004 outb(0, dev->iobase + PCL812_AO_LSB_REG(chan));
1005 outb(0, dev->iobase + PCL812_AO_MSB_REG(chan));
1008 /* set all digital outputs low */
1009 if (board->has_dio) {
1010 outb(0, dev->iobase + PCL812_DO_MSB_REG);
1011 outb(0, dev->iobase + PCL812_DO_LSB_REG);
1015 static void pcl812_set_ai_range_table(struct comedi_device *dev,
1016 struct comedi_subdevice *s,
1017 struct comedi_devconfig *it)
1019 const struct pcl812_board *board = dev->board_ptr;
1020 struct pcl812_private *devpriv = dev->private;
1022 switch (board->board_type) {
1023 case BOARD_PCL812PG:
1024 if (it->options[4] == 1)
1025 s->range_table = &range_pcl812pg2_ai;
1027 s->range_table = board->rangelist_ai;
1030 switch (it->options[4]) {
1032 s->range_table = &range_bipolar10;
1035 s->range_table = &range_bipolar5;
1038 s->range_table = &range_bipolar2_5;
1041 s->range_table = &range812_bipolar1_25;
1044 s->range_table = &range812_bipolar0_625;
1047 s->range_table = &range812_bipolar0_3125;
1050 s->range_table = &range_bipolar10;
1055 if (it->options[1] == 1)
1056 s->range_table = &range_pcl813b2_ai;
1058 s->range_table = board->rangelist_ai;
1061 switch (it->options[1]) {
1063 s->range_table = &range_iso813_1_ai;
1066 s->range_table = &range_iso813_1_2_ai;
1069 s->range_table = &range_iso813_2_ai;
1070 devpriv->range_correction = 1;
1073 s->range_table = &range_iso813_2_2_ai;
1074 devpriv->range_correction = 1;
1077 s->range_table = &range_iso813_1_ai;
1082 switch (it->options[1]) {
1084 s->range_table = &range_acl8113_1_ai;
1087 s->range_table = &range_acl8113_1_2_ai;
1090 s->range_table = &range_acl8113_2_ai;
1091 devpriv->range_correction = 1;
1094 s->range_table = &range_acl8113_2_2_ai;
1095 devpriv->range_correction = 1;
1098 s->range_table = &range_acl8113_1_ai;
1103 s->range_table = board->rangelist_ai;
1108 static void pcl812_alloc_dma(struct comedi_device *dev, unsigned int dma_chan)
1110 struct pcl812_private *devpriv = dev->private;
1112 /* only DMA channels 3 and 1 are valid */
1113 if (!(dma_chan == 3 || dma_chan == 1))
1116 /* DMA uses two 8K buffers */
1117 devpriv->dma = comedi_isadma_alloc(dev, 2, dma_chan, dma_chan,
1118 PAGE_SIZE * 2, COMEDI_ISADMA_READ);
1121 static void pcl812_free_dma(struct comedi_device *dev)
1123 struct pcl812_private *devpriv = dev->private;
1126 comedi_isadma_free(devpriv->dma);
1129 static int pcl812_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1131 const struct pcl812_board *board = dev->board_ptr;
1132 struct pcl812_private *devpriv;
1133 struct comedi_subdevice *s;
1138 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
1142 ret = comedi_request_region(dev, it->options[0], 0x10);
1146 if (board->irq_bits) {
1147 dev->pacer = comedi_8254_init(dev->iobase + PCL812_TIMER_BASE,
1148 I8254_OSC_BASE_2MHZ,
1153 if ((1 << it->options[1]) & board->irq_bits) {
1154 ret = request_irq(it->options[1], pcl812_interrupt, 0,
1155 dev->board_name, dev);
1157 dev->irq = it->options[1];
1161 /* we need an IRQ to do DMA on channel 3 or 1 */
1162 if (dev->irq && board->has_dma)
1163 pcl812_alloc_dma(dev, it->options[2]);
1165 /* differential analog inputs? */
1166 switch (board->board_type) {
1168 if (it->options[2] == 1)
1169 devpriv->use_diff = 1;
1173 if (it->options[4] == 1)
1174 devpriv->use_diff = 1;
1180 n_subdevices = 1; /* all boardtypes have analog inputs */
1181 if (board->n_aochan > 0)
1186 ret = comedi_alloc_subdevices(dev, n_subdevices);
1192 /* Analog Input subdevice */
1193 s = &dev->subdevices[subdev];
1194 s->type = COMEDI_SUBD_AI;
1195 s->subdev_flags = SDF_READABLE;
1196 if (devpriv->use_diff) {
1197 s->subdev_flags |= SDF_DIFF;
1198 s->n_chan = board->n_aichan / 2;
1200 s->subdev_flags |= SDF_GROUND;
1201 s->n_chan = board->n_aichan;
1203 s->maxdata = board->has_16bit_ai ? 0xffff : 0x0fff;
1205 pcl812_set_ai_range_table(dev, s, it);
1207 s->insn_read = pcl812_ai_insn_read;
1210 dev->read_subdev = s;
1211 s->subdev_flags |= SDF_CMD_READ;
1212 s->len_chanlist = MAX_CHANLIST_LEN;
1213 s->do_cmdtest = pcl812_ai_cmdtest;
1214 s->do_cmd = pcl812_ai_cmd;
1215 s->poll = pcl812_ai_poll;
1216 s->cancel = pcl812_ai_cancel;
1219 devpriv->use_mpc508 = board->has_mpc508_mux;
1224 if (board->n_aochan > 0) {
1225 s = &dev->subdevices[subdev];
1226 s->type = COMEDI_SUBD_AO;
1227 s->subdev_flags = SDF_WRITABLE | SDF_GROUND;
1228 s->n_chan = board->n_aochan;
1230 switch (board->board_type) {
1232 if (it->options[3] == 1)
1233 s->range_table = &range_unipolar10;
1235 s->range_table = &range_unipolar5;
1239 case BOARD_PCL812PG:
1241 switch (it->options[5]) {
1243 s->range_table = &range_unipolar10;
1246 s->range_table = &range_unknown;
1249 s->range_table = &range_unipolar5;
1254 s->range_table = &range_unipolar5;
1257 s->insn_write = pcl812_ao_insn_write;
1259 ret = comedi_alloc_subdev_readback(s);
1266 if (board->has_dio) {
1267 /* Digital Input subdevice */
1268 s = &dev->subdevices[subdev];
1269 s->type = COMEDI_SUBD_DI;
1270 s->subdev_flags = SDF_READABLE;
1273 s->range_table = &range_digital;
1274 s->insn_bits = pcl812_di_insn_bits;
1277 /* Digital Output subdevice */
1278 s = &dev->subdevices[subdev];
1279 s->type = COMEDI_SUBD_DO;
1280 s->subdev_flags = SDF_WRITABLE;
1283 s->range_table = &range_digital;
1284 s->insn_bits = pcl812_do_insn_bits;
1288 switch (board->board_type) {
1290 case BOARD_PCL812PG:
1293 devpriv->max_812_ai_mode0_rangewait = 1;
1294 if (it->options[3] > 0)
1295 /* we use external trigger */
1296 devpriv->use_ext_trg = 1;
1299 devpriv->max_812_ai_mode0_rangewait = 1;
1300 devpriv->mode_reg_int = (dev->irq << 4) & 0xf0;
1306 /* maybe there must by greatest timeout */
1307 devpriv->max_812_ai_mode0_rangewait = 5;
1316 static void pcl812_detach(struct comedi_device *dev)
1318 pcl812_free_dma(dev);
1319 comedi_legacy_detach(dev);
1322 static struct comedi_driver pcl812_driver = {
1323 .driver_name = "pcl812",
1324 .module = THIS_MODULE,
1325 .attach = pcl812_attach,
1326 .detach = pcl812_detach,
1327 .board_name = &boardtypes[0].name,
1328 .num_names = ARRAY_SIZE(boardtypes),
1329 .offset = sizeof(struct pcl812_board),
1331 module_comedi_driver(pcl812_driver);
1333 MODULE_AUTHOR("Comedi http://www.comedi.org");
1334 MODULE_DESCRIPTION("Comedi low-level driver");
1335 MODULE_LICENSE("GPL");