Merge "Fix imprecise timer interrupts by eliminating TSC clockevents frequency round...
authorJiang, Yunhong <yunhong.jiang@intel.com>
Fri, 28 Oct 2016 23:29:05 +0000 (23:29 +0000)
committerGerrit Code Review <gerrit@opnfv.org>
Fri, 28 Oct 2016 23:29:05 +0000 (23:29 +0000)
commitf2e379228d244be691bee350da1cb3d820cb6dfb
tree3061748572f9dcb06fea9c367e366b2691f3a6ba
parentc0946a21d3e299d73620b6fee2327f5f0f6ebb32
parent540333b9f4ebaaf2362437da2990f3c63ac4f2e8
Merge "Fix imprecise timer interrupts by  eliminating TSC clockevents frequency roundoff error"