Add qemu 2.4.0

[kvmfornfv.git] / qemu / roms / u-boot / drivers / mtd / nand / kirkwood_nand.c

diff --git a/qemu/roms/u-boot/drivers/mtd/nand/kirkwood_nand.c b/qemu/roms/u-boot/drivers/mtd/nand/kirkwood_nand.c
new file mode 100644 (file)
index 0000000..72687a1
--- /dev/null
+++ b/qemu/roms/u-boot/drivers/mtd/nand/kirkwood_nand.c
@@ -0,0 +1,70 @@
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/kirkwood.h>
+#include <nand.h>
+
+/* NAND Flash Soc registers */
+struct kwnandf_registers {
+       u32 rd_params;  /* 0x10418 */
+       u32 wr_param;   /* 0x1041c */
+       u8  pad[0x10470 - 0x1041c - 4];
+       u32 ctrl;       /* 0x10470 */
+};
+
+static struct kwnandf_registers *nf_reg =
+       (struct kwnandf_registers *)KW_NANDF_BASE;
+
+/*
+ * hardware specific access to control-lines/bits
+ */
+#define NAND_ACTCEBOOT_BIT             0x02
+
+static void kw_nand_hwcontrol(struct mtd_info *mtd, int cmd,
+                             unsigned int ctrl)
+{
+       struct nand_chip *nc = mtd->priv;
+       u32 offs;
+
+       if (cmd == NAND_CMD_NONE)
+               return;
+
+       if (ctrl & NAND_CLE)
+               offs = (1 << 0);        /* Commands with A[1:0] == 01 */
+       else if (ctrl & NAND_ALE)
+               offs = (1 << 1);        /* Addresses with A[1:0] == 10 */
+       else
+               return;
+
+       writeb(cmd, nc->IO_ADDR_W + offs);
+}
+
+void kw_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+       u32 data;
+
+       data = readl(&nf_reg->ctrl);
+       data |= NAND_ACTCEBOOT_BIT;
+       writel(data, &nf_reg->ctrl);
+}
+
+int board_nand_init(struct nand_chip *nand)
+{
+       nand->options = NAND_COPYBACK | NAND_CACHEPRG | NAND_NO_PADDING;
+#if defined(CONFIG_NAND_ECC_BCH)
+       nand->ecc.mode = NAND_ECC_SOFT_BCH;
+#else
+       nand->ecc.mode = NAND_ECC_SOFT;
+#endif
+       nand->cmd_ctrl = kw_nand_hwcontrol;
+       nand->chip_delay = 40;
+       nand->select_chip = kw_nand_select_chip;
+       return 0;
+}