Add qemu 2.4.0

[kvmfornfv.git] / qemu / roms / u-boot / board / taskit / stamp9g20 / stamp9g20.c

diff --git a/qemu/roms/u-boot/board/taskit/stamp9g20/stamp9g20.c b/qemu/roms/u-boot/board/taskit/stamp9g20/stamp9g20.c
new file mode 100644 (file)
index 0000000..27cdf77
--- /dev/null
+++ b/qemu/roms/u-boot/board/taskit/stamp9g20/stamp9g20.c
@@ -0,0 +1,159 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian@popies.net>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * Achim Ehrlich <aehrlich@taskit.de>
+ * taskit GmbH <www.taskit.de>
+ *
+ * (C) Copyright 2012-
+ * Markus Hubig <mhubig@imko.de>
+ * IMKO GmbH <www.imko.de>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/at91sam9260_matrix.h>
+#include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <watchdog.h>
+
+#ifdef CONFIG_MACB
+# include <net.h>
+# include <netdev.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void stamp9G20_nand_hw_init(void)
+{
+       struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+       struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
+       unsigned long csa;
+
+       /* Assign CS3 to NAND/SmartMedia Interface */
+       csa = readl(&matrix->ebicsa);
+       csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
+       writel(csa, &matrix->ebicsa);
+
+       /* Configure SMC CS3 for NAND/SmartMedia */
+       writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
+               AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
+               &smc->cs[3].setup);
+       writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
+               AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
+               &smc->cs[3].pulse);
+       writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+               &smc->cs[3].cycle);
+       writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+               AT91_SMC_MODE_EXNW_DISABLE |
+               AT91_SMC_MODE_DBW_8 |
+               AT91_SMC_MODE_TDF_CYCLE(2),
+               &smc->cs[3].mode);
+
+       /* Configure RDY/BSY */
+       at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
+
+       /* Enable NandFlash */
+       at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+}
+
+#ifdef CONFIG_MACB
+static void stamp9G20_macb_hw_init(void)
+{
+       struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
+
+       /* Enable the PHY Chip via PA26 on the Stamp 2 Adaptor */
+       at91_set_gpio_output(AT91_PIN_PA26, 0);
+
+       /*
+        * Disable pull-up on:
+        *      RXDV (PA17) => PHY normal mode (not Test mode)
+        *      ERX0 (PA14) => PHY ADDR0
+        *      ERX1 (PA15) => PHY ADDR1
+        *      ERX2 (PA25) => PHY ADDR2
+        *      ERX3 (PA26) => PHY ADDR3
+        *      ECRS (PA28) => PHY ADDR4  => PHYADDR = 0x0
+        *
+        * PHY has internal pull-down
+        */
+       writel(pin_to_mask(AT91_PIN_PA14) |
+               pin_to_mask(AT91_PIN_PA15) |
+               pin_to_mask(AT91_PIN_PA17) |
+               pin_to_mask(AT91_PIN_PA18) |
+               pin_to_mask(AT91_PIN_PA28),
+               &pioa->pudr);
+
+       at91_phy_reset();
+
+       /* Re-enable pull-up */
+       writel(pin_to_mask(AT91_PIN_PA14) |
+               pin_to_mask(AT91_PIN_PA15) |
+               pin_to_mask(AT91_PIN_PA17) |
+               pin_to_mask(AT91_PIN_PA18) |
+               pin_to_mask(AT91_PIN_PA28),
+               &pioa->puer);
+
+       /* Initialize EMAC=MACB hardware */
+       at91_macb_hw_init();
+}
+#endif /* CONFIG_MACB */
+
+int board_early_init_f(void)
+{
+       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+       /* Enable clocks for all PIOs */
+       writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
+               (1 << ATMEL_ID_PIOC), &pmc->pcer);
+
+       return 0;
+}
+
+int board_postclk_init(void)
+{
+       /*
+        * Initialize the serial interface here, because be need a running
+        * timer to set PC9 to high and wait for some time to enable the
+        * level converter of the RS232 interface on the PortuxG20 board.
+        */
+
+#ifdef CONFIG_PORTUXG20
+       at91_set_gpio_output(AT91_PIN_PC9, 1);
+       mdelay(1);
+#endif
+       at91_seriald_hw_init();
+
+       return 0;
+}
+
+int board_init(void)
+{
+       /* Adress of boot parameters */
+       gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+       stamp9G20_nand_hw_init();
+#ifdef CONFIG_MACB
+       stamp9G20_macb_hw_init();
+#endif
+       return 0;
+}
+
+int dram_init(void)
+{
+       gd->ram_size = get_ram_size(
+               (void *)CONFIG_SYS_SDRAM_BASE,
+               CONFIG_SYS_SDRAM_SIZE);
+       return 0;
+}
+
+#ifdef CONFIG_MACB
+int board_eth_init(bd_t *bis)
+{
+       return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
+}
+#endif /* CONFIG_MACB */