These changes are the raw update to qemu-2.6.

[kvmfornfv.git] / qemu / roms / ipxe / src / drivers / net / intel.h

diff --git a/qemu/roms/ipxe/src/drivers/net/intel.h b/qemu/roms/ipxe/src/drivers/net/intel.h
index 8c4479b..ce9e3f4 100644 (file)
--- a/qemu/roms/ipxe/src/drivers/net/intel.h
+++ b/qemu/roms/ipxe/src/drivers/net/intel.h
@@ -7,7 +7,7 @@
  *
  */
 
-FILE_LICENCE ( GPL2_OR_LATER );
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
 
 #include <stdint.h>
 #include <ipxe/if_ether.h>
@@ -22,33 +22,38 @@ struct intel_descriptor {
        uint64_t address;
        /** Length */
        uint16_t length;
-       /** Reserved */
-       uint8_t reserved_a;
+       /** Flags */
+       uint8_t flags;
        /** Command */
        uint8_t command;
        /** Status */
-       uint8_t status;
-       /** Errors */
-       uint8_t errors;
-       /** Reserved */
-       uint16_t reserved_b;
+       uint32_t status;
 } __attribute__ (( packed ));
 
-/** Packet descriptor command bits */
-enum intel_descriptor_command {
-       /** Report status */
-       INTEL_DESC_CMD_RS = 0x08,
-       /** Insert frame checksum (CRC) */
-       INTEL_DESC_CMD_IFCS = 0x02,
-       /** End of packet */
-       INTEL_DESC_CMD_EOP = 0x01,
-};
+/** Descriptor type */
+#define INTEL_DESC_FL_DTYP( dtyp ) ( (dtyp) << 4 )
+#define INTEL_DESC_FL_DTYP_DATA INTEL_DESC_FL_DTYP ( 0x03 )
 
-/** Packet descriptor status bits */
-enum intel_descriptor_status {
-       /** Descriptor done */
-       INTEL_DESC_STATUS_DD = 0x01,
-};
+/** Descriptor extension */
+#define INTEL_DESC_CMD_DEXT 0x20
+
+/** Report status */
+#define INTEL_DESC_CMD_RS 0x08
+
+/** Insert frame checksum (CRC) */
+#define INTEL_DESC_CMD_IFCS 0x02
+
+/** End of packet */
+#define INTEL_DESC_CMD_EOP 0x01
+
+/** Descriptor done */
+#define INTEL_DESC_STATUS_DD 0x00000001UL
+
+/** Receive error */
+#define INTEL_DESC_STATUS_RXE 0x00000100UL
+
+/** Payload length */
+#define INTEL_DESC_STATUS_PAYLEN( len ) ( (len) << 14 )
 
 /** Device Control Register */
 #define INTEL_CTRL 0x00000UL
@@ -91,7 +96,9 @@ enum intel_descriptor_status {
 /** Interrupt Cause Read Register */
 #define INTEL_ICR 0x000c0UL
 #define INTEL_IRQ_TXDW         0x00000001UL    /**< Transmit descriptor done */
+#define INTEL_IRQ_TXQE         0x00000002UL    /**< Transmit queue empty */
 #define INTEL_IRQ_LSC          0x00000004UL    /**< Link status change */
+#define INTEL_IRQ_RXDMT0       0x00000010UL    /**< Receive queue low */
 #define INTEL_IRQ_RXT0         0x00000080UL    /**< Receive timer */
 #define INTEL_IRQ_RXO          0x00000400UL    /**< Receive overrun */
 
@@ -207,6 +214,15 @@ struct intel_ring {
        unsigned int reg;
        /** Length (in bytes) */
        size_t len;
+
+       /** Populate descriptor
+        *
+        * @v desc              Descriptor
+        * @v addr              Data buffer address
+        * @v len               Length of data
+        */
+       void ( * describe ) ( struct intel_descriptor *desc, physaddr_t addr,
+                             size_t len );
 };
 
 /**
@@ -215,12 +231,39 @@ struct intel_ring {
  * @v ring             Descriptor ring
  * @v count            Number of descriptors
  * @v reg              Descriptor register block
+ * @v describe         Method to populate descriptor
  */
 static inline __attribute__ (( always_inline)) void
-intel_init_ring ( struct intel_ring *ring, unsigned int count,
-                 unsigned int reg ) {
+intel_init_ring ( struct intel_ring *ring, unsigned int count, unsigned int reg,
+                 void ( * describe ) ( struct intel_descriptor *desc,
+                                       physaddr_t addr, size_t len ) ) {
+
        ring->len = ( count * sizeof ( ring->desc[0] ) );
        ring->reg = reg;
+       ring->describe = describe;
+}
+
+/** An Intel virtual function mailbox */
+struct intel_mailbox {
+       /** Mailbox control register */
+       unsigned int ctrl;
+       /** Mailbox memory base */
+       unsigned int mem;
+};
+
+/**
+ * Initialise mailbox
+ *
+ * @v mbox             Mailbox
+ * @v ctrl             Mailbox control register
+ * @v mem              Mailbox memory register base
+ */
+static inline __attribute__ (( always_inline )) void
+intel_init_mbox ( struct intel_mailbox *mbox, unsigned int ctrl,
+                 unsigned int mem ) {
+
+       mbox->ctrl = ctrl;
+       mbox->mem = mem;
 }
 
 /** An Intel network card */
@@ -231,6 +274,8 @@ struct intel_nic {
        unsigned int port;
        /** Flags */
        unsigned int flags;
+       /** Forced interrupts */
+       unsigned int force_icr;
 
        /** EEPROM */
        struct nvs_device eeprom;
@@ -239,6 +284,9 @@ struct intel_nic {
        /** EEPROM address shift */
        unsigned int eerd_addr_shift;
 
+       /** Mailbox */
+       struct intel_mailbox mbox;
+
        /** Transmit descriptor ring */
        struct intel_ring tx;
        /** Receive descriptor ring */
@@ -251,8 +299,35 @@ struct intel_nic {
 enum intel_flags {
        /** PBS/PBA errata workaround required */
        INTEL_PBS_ERRATA = 0x0001,
+       /** VMware missing interrupt workaround required */
+       INTEL_VMWARE = 0x0002,
 };
 
+/**
+ * Dump diagnostic information
+ *
+ * @v intel            Intel device
+ */
+static inline void intel_diag ( struct intel_nic *intel ) {
+
+       DBGC ( intel, "INTEL %p TX %04x(%02x)/%04x(%02x) "
+              "RX %04x(%02x)/%04x(%02x)\n", intel,
+              ( intel->tx.cons & 0xffff ),
+              readl ( intel->regs + intel->tx.reg + INTEL_xDH ),
+              ( intel->tx.prod & 0xffff ),
+              readl ( intel->regs + intel->tx.reg + INTEL_xDT ),
+              ( intel->rx.cons & 0xffff ),
+              readl ( intel->regs + intel->rx.reg + INTEL_xDH ),
+              ( intel->rx.prod & 0xffff ),
+              readl ( intel->regs + intel->rx.reg + INTEL_xDT ) );
+}
+
+extern void intel_describe_tx ( struct intel_descriptor *tx,
+                               physaddr_t addr, size_t len );
+extern void intel_describe_tx_adv ( struct intel_descriptor *tx,
+                                   physaddr_t addr, size_t len );
+extern void intel_describe_rx ( struct intel_descriptor *rx,
+                               physaddr_t addr, size_t len );
 extern int intel_create_ring ( struct intel_nic *intel,
                               struct intel_ring *ring );
 extern void intel_destroy_ring ( struct intel_nic *intel,