These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / drivers / staging / xgifb / vb_init.c

diff --git a/kernel/drivers/staging/xgifb/vb_init.c b/kernel/drivers/staging/xgifb/vb_init.c
index 2b233af..879a7e6 100644 (file)
--- a/kernel/drivers/staging/xgifb/vb_init.c
+++ b/kernel/drivers/staging/xgifb/vb_init.c
@@ -51,7 +51,7 @@ XGINew_GetXG20DRAMType(struct xgi_hw_device_info *HwDeviceExtension,
        } else if (HwDeviceExtension->jChipType == XG21) {
                /* Independent GPIO control */
                xgifb_reg_and(pVBInfo->P3d4, 0xB4, ~0x02);
-               udelay(800);
+               usleep_range(800, 1800);
                xgifb_reg_or(pVBInfo->P3d4, 0x4A, 0x80); /* Enable GPIOH read */
                /* GPIOF 0:DVI 1:DVO */
                data = xgifb_reg_get(pVBInfo->P3d4, 0x48);
@@ -80,20 +80,20 @@ static void XGINew_DDR1x_MRS_340(unsigned long P3c4,
        xgifb_reg_set(P3c4, 0x16, 0x00);
        xgifb_reg_set(P3c4, 0x16, 0x80);
 
-       mdelay(3);
+       usleep_range(3, 1003);
        xgifb_reg_set(P3c4, 0x18, 0x00);
        xgifb_reg_set(P3c4, 0x19, 0x20);
        xgifb_reg_set(P3c4, 0x16, 0x00);
        xgifb_reg_set(P3c4, 0x16, 0x80);
 
-       udelay(60);
+       usleep_range(60, 1060);
        xgifb_reg_set(P3c4, 0x18, pVBInfo->SR18[pVBInfo->ram_type]); /* SR18 */
        xgifb_reg_set(P3c4, 0x19, 0x01);
        xgifb_reg_set(P3c4, 0x16, 0x03);
        xgifb_reg_set(P3c4, 0x16, 0x83);
-       mdelay(1);
+       usleep_range(1, 1001);
        xgifb_reg_set(P3c4, 0x1B, 0x03);
-       udelay(500);
+       usleep_range(500, 1500);
        xgifb_reg_set(P3c4, 0x18, pVBInfo->SR18[pVBInfo->ram_type]); /* SR18 */
        xgifb_reg_set(P3c4, 0x19, 0x00);
        xgifb_reg_set(P3c4, 0x16, 0x03);
@@ -136,66 +136,65 @@ static void XGINew_DDRII_Bootup_XG27(
        /* Set Double Frequency */
        xgifb_reg_set(P3d4, 0x97, pVBInfo->XGINew_CR97); /* CR97 */
 
-       udelay(200);
+       usleep_range(200, 1200);
 
        xgifb_reg_set(P3c4, 0x18, 0x00); /* Set SR18 */ /* EMRS2 */
        xgifb_reg_set(P3c4, 0x19, 0x80); /* Set SR19 */
        xgifb_reg_set(P3c4, 0x16, 0x20); /* Set SR16 */
-       udelay(15);
+       usleep_range(15, 1015);
        xgifb_reg_set(P3c4, 0x16, 0xA0); /* Set SR16 */
-       udelay(15);
+       usleep_range(15, 1015);
 
        xgifb_reg_set(P3c4, 0x18, 0x00); /* Set SR18 */ /* EMRS3 */
        xgifb_reg_set(P3c4, 0x19, 0xC0); /* Set SR19 */
        xgifb_reg_set(P3c4, 0x16, 0x20); /* Set SR16 */
-       udelay(15);
+       usleep_range(15, 1015);
        xgifb_reg_set(P3c4, 0x16, 0xA0); /* Set SR16 */
-       udelay(15);
+       usleep_range(15, 1015);
 
        xgifb_reg_set(P3c4, 0x18, 0x00); /* Set SR18 */ /* EMRS1 */
        xgifb_reg_set(P3c4, 0x19, 0x40); /* Set SR19 */
        xgifb_reg_set(P3c4, 0x16, 0x20); /* Set SR16 */
-       udelay(30);
+       usleep_range(30, 1030);
        xgifb_reg_set(P3c4, 0x16, 0xA0); /* Set SR16 */
-       udelay(15);
+       usleep_range(15, 1015);
 
        xgifb_reg_set(P3c4, 0x18, 0x42); /* Set SR18 */ /* MRS, DLL Enable */
        xgifb_reg_set(P3c4, 0x19, 0x0A); /* Set SR19 */
        xgifb_reg_set(P3c4, 0x16, 0x00); /* Set SR16 */
-       udelay(30);
+       usleep_range(30, 1030);
        xgifb_reg_set(P3c4, 0x16, 0x00); /* Set SR16 */
        xgifb_reg_set(P3c4, 0x16, 0x80); /* Set SR16 */
 
        xgifb_reg_set(P3c4, 0x1B, 0x04); /* Set SR1B */
-       udelay(60);
+       usleep_range(60, 1060);
        xgifb_reg_set(P3c4, 0x1B, 0x00); /* Set SR1B */
 
        xgifb_reg_set(P3c4, 0x18, 0x42); /* Set SR18 */ /* MRS, DLL Reset */
        xgifb_reg_set(P3c4, 0x19, 0x08); /* Set SR19 */
        xgifb_reg_set(P3c4, 0x16, 0x00); /* Set SR16 */
 
-       udelay(30);
+       usleep_range(30, 1030);
        xgifb_reg_set(P3c4, 0x16, 0x83); /* Set SR16 */
-       udelay(15);
+       usleep_range(15, 1015);
 
        xgifb_reg_set(P3c4, 0x18, 0x80); /* Set SR18 */ /* MRS, ODT */
        xgifb_reg_set(P3c4, 0x19, 0x46); /* Set SR19 */
        xgifb_reg_set(P3c4, 0x16, 0x20); /* Set SR16 */
-       udelay(30);
+       usleep_range(30, 1030);
        xgifb_reg_set(P3c4, 0x16, 0xA0); /* Set SR16 */
-       udelay(15);
+       usleep_range(15, 1015);
 
        xgifb_reg_set(P3c4, 0x18, 0x00); /* Set SR18 */ /* EMRS */
        xgifb_reg_set(P3c4, 0x19, 0x40); /* Set SR19 */
        xgifb_reg_set(P3c4, 0x16, 0x20); /* Set SR16 */
-       udelay(30);
+       usleep_range(30, 1030);
        xgifb_reg_set(P3c4, 0x16, 0xA0); /* Set SR16 */
-       udelay(15);
+       usleep_range(15, 1015);
 
        /* Set SR1B refresh control 000:close; 010:open */
        xgifb_reg_set(P3c4, 0x1B, 0x04);
-       udelay(200);
-
+       usleep_range(200, 1200);
 }
 
 static void XGINew_DDR2_MRS_XG20(struct xgi_hw_device_info *HwDeviceExtension,
@@ -208,7 +207,7 @@ static void XGINew_DDR2_MRS_XG20(struct xgi_hw_device_info *HwDeviceExtension,
 
        xgifb_reg_set(P3d4, 0x97, 0x11); /* CR97 */
 
-       udelay(200);
+       usleep_range(200, 1200);
        xgifb_reg_set(P3c4, 0x18, 0x00); /* EMRS2 */
        xgifb_reg_set(P3c4, 0x19, 0x80);
        xgifb_reg_set(P3c4, 0x16, 0x05);
@@ -229,18 +228,18 @@ static void XGINew_DDR2_MRS_XG20(struct xgi_hw_device_info *HwDeviceExtension,
        xgifb_reg_set(P3c4, 0x16, 0x05);
        xgifb_reg_set(P3c4, 0x16, 0x85);
 
-       udelay(15);
+       usleep_range(15, 1015);
        xgifb_reg_set(P3c4, 0x1B, 0x04); /* SR1B */
-       udelay(30);
+       usleep_range(30, 1030);
        xgifb_reg_set(P3c4, 0x1B, 0x00); /* SR1B */
-       udelay(100);
+       usleep_range(100, 1100);
 
        xgifb_reg_set(P3c4, 0x18, 0x42); /* MRS1 */
        xgifb_reg_set(P3c4, 0x19, 0x00);
        xgifb_reg_set(P3c4, 0x16, 0x05);
        xgifb_reg_set(P3c4, 0x16, 0x85);
 
-       udelay(200);
+       usleep_range(200, 1200);
 }
 
 static void XGINew_DDR1x_MRS_XG20(unsigned long P3c4,
@@ -250,20 +249,20 @@ static void XGINew_DDR1x_MRS_XG20(unsigned long P3c4,
        xgifb_reg_set(P3c4, 0x19, 0x40);
        xgifb_reg_set(P3c4, 0x16, 0x00);
        xgifb_reg_set(P3c4, 0x16, 0x80);
-       udelay(60);
+       usleep_range(60, 1060);
 
        xgifb_reg_set(P3c4, 0x18, 0x00);
        xgifb_reg_set(P3c4, 0x19, 0x40);
        xgifb_reg_set(P3c4, 0x16, 0x00);
        xgifb_reg_set(P3c4, 0x16, 0x80);
-       udelay(60);
+       usleep_range(60, 1060);
        xgifb_reg_set(P3c4, 0x18, pVBInfo->SR18[pVBInfo->ram_type]); /* SR18 */
        xgifb_reg_set(P3c4, 0x19, 0x01);
        xgifb_reg_set(P3c4, 0x16, 0x03);
        xgifb_reg_set(P3c4, 0x16, 0x83);
-       mdelay(1);
+       usleep_range(1, 1001);
        xgifb_reg_set(P3c4, 0x1B, 0x03);
-       udelay(500);
+       usleep_range(500, 1500);
        xgifb_reg_set(P3c4, 0x18, pVBInfo->SR18[pVBInfo->ram_type]); /* SR18 */
        xgifb_reg_set(P3c4, 0x19, 0x00);
        xgifb_reg_set(P3c4, 0x16, 0x03);
@@ -499,7 +498,6 @@ static void XGINew_SetDRAMDefaultRegister340(
        xgifb_reg_set(P3c4, 0x1B, 0x03); /* SR1B */
 }
 
-
 static unsigned short XGINew_SetDRAMSize20Reg(
                unsigned short dram_size,
                struct vb_device_info *pVBInfo)
@@ -533,7 +531,7 @@ static unsigned short XGINew_SetDRAMSize20Reg(
                              0x14,
                              (xgifb_reg_get(pVBInfo->P3c4, 0x14) & 0x0F) |
                                (data & 0xF0));
-               udelay(15);
+               usleep_range(15, 1015);
        }
        return memsize;
 }
@@ -552,7 +550,7 @@ static int XGINew_ReadWriteRest(unsigned short StopAddr,
                writel(Position, fbaddr + Position);
        }
 
-       udelay(500); /* Fix #1759 Memory Size error in Multi-Adapter. */
+       usleep_range(500, 1500); /* Fix #1759 Memory Size error in Multi-Adapter. */
 
        Position = 0;
 
@@ -597,12 +595,11 @@ static void XGINew_CheckChannel(struct xgi_hw_device_info *HwDeviceExtension,
 
                        if ((HwDeviceExtension->ulVideoMemorySize - 1)
                                        > 0x1000000) {
-
                                pVBInfo->ram_bus = 32; /* 32 bits */
                                /* 22bit + 2 rank + 32bit */
                                xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xB1);
                                xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x52);
-                               udelay(15);
+                               usleep_range(15, 1015);
 
                                if (XGINew_ReadWriteRest(24, 23, pVBInfo) == 1)
                                        return;
@@ -616,7 +613,7 @@ static void XGINew_CheckChannel(struct xgi_hw_device_info *HwDeviceExtension,
                                        xgifb_reg_set(pVBInfo->P3c4,
                                                      0x14,
                                                      0x42);
-                                       udelay(15);
+                                       usleep_range(15, 1015);
 
                                        if (XGINew_ReadWriteRest(23,
                                                                 23,
@@ -631,14 +628,14 @@ static void XGINew_CheckChannel(struct xgi_hw_device_info *HwDeviceExtension,
                                /* 22bit + 2 rank + 16bit */
                                xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xB1);
                                xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x41);
-                               udelay(15);
+                               usleep_range(15, 1015);
 
                                if (XGINew_ReadWriteRest(23, 22, pVBInfo) == 1)
                                        return;
                                xgifb_reg_set(pVBInfo->P3c4,
                                              0x13,
                                              0x31);
-                               udelay(15);
+                               usleep_range(15, 1015);
                        }
 
                } else { /* Dual_16_8 */
@@ -649,7 +646,7 @@ static void XGINew_CheckChannel(struct xgi_hw_device_info *HwDeviceExtension,
                                xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xB1);
                                /* 0x41:16Mx16 bit*/
                                xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x41);
-                               udelay(15);
+                               usleep_range(15, 1015);
 
                                if (XGINew_ReadWriteRest(23, 22, pVBInfo) == 1)
                                        return;
@@ -664,7 +661,7 @@ static void XGINew_CheckChannel(struct xgi_hw_device_info *HwDeviceExtension,
                                        xgifb_reg_set(pVBInfo->P3c4,
                                                      0x14,
                                                      0x31);
-                                       udelay(15);
+                                       usleep_range(15, 1015);
 
                                        if (XGINew_ReadWriteRest(22,
                                                                 22,
@@ -680,7 +677,7 @@ static void XGINew_CheckChannel(struct xgi_hw_device_info *HwDeviceExtension,
                                xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xB1);
                                /* 0x30:8Mx8 bit*/
                                xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x30);
-                               udelay(15);
+                               usleep_range(15, 1015);
 
                                if (XGINew_ReadWriteRest(22, 21, pVBInfo) == 1)
                                        return;
@@ -689,7 +686,7 @@ static void XGINew_CheckChannel(struct xgi_hw_device_info *HwDeviceExtension,
                                xgifb_reg_set(pVBInfo->P3c4,
                                              0x13,
                                              0x31);
-                               udelay(15);
+                               usleep_range(15, 1015);
                        }
                }
                break;
@@ -808,7 +805,7 @@ static int XGINew_DDRSizing340(struct xgi_hw_device_info *HwDeviceExtension,
        for (i = 0; i < size; i++) {
                /* SetDRAMSizingType */
                xgifb_reg_and_or(pVBInfo->P3c4, 0x13, 0x80, dram_table[i][1]);
-               udelay(15); /* should delay 50 ns */
+               usleep_range(50, 1050); /* should delay 50 ns */
 
                memsize = XGINew_SetDRAMSize20Reg(dram_table[i][0], pVBInfo);
 
@@ -817,7 +814,7 @@ static int XGINew_DDRSizing340(struct xgi_hw_device_info *HwDeviceExtension,
 
                memsize += (pVBInfo->ram_channel - 2) + 20;
                if ((HwDeviceExtension->ulVideoMemorySize - 1) <
-                       (unsigned long) (1 << memsize))
+                       (unsigned long)(1 << memsize))
                        continue;
 
                if (XGINew_ReadWriteRest(memsize, start_addr, pVBInfo) == 1)
@@ -838,13 +835,13 @@ static void XGINew_SetDRAMSize_340(struct xgifb_video_info *xgifb_info,
 
        data = xgifb_reg_get(pVBInfo->P3c4, 0x21);
        /* disable read cache */
-       xgifb_reg_set(pVBInfo->P3c4, 0x21, (unsigned short) (data & 0xDF));
+       xgifb_reg_set(pVBInfo->P3c4, 0x21, (unsigned short)(data & 0xDF));
        XGI_DisplayOff(xgifb_info, HwDeviceExtension, pVBInfo);
 
        XGINew_DDRSizing340(HwDeviceExtension, pVBInfo);
        data = xgifb_reg_get(pVBInfo->P3c4, 0x21);
        /* enable read cache */
-       xgifb_reg_set(pVBInfo->P3c4, 0x21, (unsigned short) (data | 0x20));
+       xgifb_reg_set(pVBInfo->P3c4, 0x21, (unsigned short)(data | 0x20));
 }
 
 static u8 *xgifb_copy_rom(struct pci_dev *dev, size_t *rom_size)
@@ -853,11 +850,11 @@ static u8 *xgifb_copy_rom(struct pci_dev *dev, size_t *rom_size)
        u8 *rom_copy;
 
        rom_address = pci_map_rom(dev, rom_size);
-       if (rom_address == NULL)
+       if (!rom_address)
                return NULL;
 
        rom_copy = vzalloc(XGIFB_ROM_SIZE);
-       if (rom_copy == NULL)
+       if (!rom_copy)
                goto done;
 
        *rom_size = min_t(size_t, *rom_size, XGIFB_ROM_SIZE);
@@ -879,7 +876,7 @@ static bool xgifb_read_vbios(struct pci_dev *pdev)
        int entry;
 
        vbios = xgifb_copy_rom(pdev, &vbios_size);
-       if (vbios == NULL) {
+       if (!vbios) {
                dev_err(&pdev->dev, "Video BIOS not available\n");
                return false;
        }
@@ -1059,7 +1056,6 @@ static void XGINew_SetModeScratch(struct vb_device_info *pVBInfo)
        CR38Data &= ~SetYPbPr;
        CR38Data |= tempch;
        xgifb_reg_set(pVBInfo->P3d4, 0x38, CR38Data);
-
 }
 
 static unsigned short XGINew_SenseLCD(struct xgi_hw_device_info
@@ -1134,7 +1130,6 @@ static void XGINew_GetXG27Sense(struct vb_device_info *pVBInfo)
                xgifb_reg_and_or(pVBInfo->P3d4, 0x38, ~0xE0, 0xA0);
        }
        xgifb_reg_or(pVBInfo->P3d4, 0x32, LCDSense);
-
 }
 
 static unsigned char GetXG21FPBits(struct vb_device_info *pVBInfo)
@@ -1191,7 +1186,7 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
 
        pVBInfo->FBAddr = HwDeviceExtension->pjVideoMemoryAddress;
 
-       if (pVBInfo->FBAddr == NULL) {
+       if (!pVBInfo->FBAddr) {
                dev_dbg(&pdev->dev, "pVBInfo->FBAddr == 0\n");
                return 0;
        }
@@ -1329,14 +1324,12 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
        XGI_SenseCRT1(pVBInfo);
 
        if (HwDeviceExtension->jChipType == XG21) {
-
                xgifb_reg_and_or(pVBInfo->P3d4,
                                 0x32,
                                 ~Monitor1Sense,
                                 Monitor1Sense); /* Z9 default has CRT */
                temp = GetXG21FPBits(pVBInfo);
                xgifb_reg_and_or(pVBInfo->P3d4, 0x37, ~0x01, temp);
-
        }
        if (HwDeviceExtension->jChipType == XG27) {
                xgifb_reg_and_or(pVBInfo->P3d4,