&ch->ch_cls_uart->isr_fcr);
ch->ch_t_tlevel = 16;
-
}
static inline void cls_set_ixon_flow_control(struct channel_t *ch)
writeb((UART_FCR_ENABLE_FIFO | UART_16654_FCR_RXTRIGGER_16 |
UART_16654_FCR_TXTRIGGER_16 | UART_FCR_CLEAR_RCVR),
&ch->ch_cls_uart->isr_fcr);
-
}
static inline void cls_set_no_output_flow_control(struct channel_t *ch)
ch->ch_r_watermark = 0;
ch->ch_t_tlevel = 16;
ch->ch_r_tlevel = 16;
-
}
static inline void cls_set_rts_flow_control(struct channel_t *ch)
ch->ch_r_watermark = 4;
ch->ch_r_tlevel = 8;
-
}
static inline void cls_set_ixoff_flow_control(struct channel_t *ch)
writeb((UART_FCR_ENABLE_FIFO | UART_16654_FCR_RXTRIGGER_16 |
UART_16654_FCR_TXTRIGGER_16 | UART_FCR_CLEAR_RCVR),
&ch->ch_cls_uart->isr_fcr);
-
}
static inline void cls_set_no_input_flow_control(struct channel_t *ch)
ch->ch_t_tlevel = 16;
ch->ch_r_tlevel = 16;
-
}
/*
return;
ch = brd->channels[port];
- if (!ch || ch->magic != DGNC_CHANNEL_MAGIC)
+ if (ch->magic != DGNC_CHANNEL_MAGIC)
return;
/* Here we try to figure out what caused the interrupt to happen */
while (1) {
-
isr = readb(&ch->ch_cls_uart->isr_fcr);
/* Bail if no pending interrupt on port */
if (!tty || tty->magic != TTY_MAGIC)
return;
- un = (struct un_t *) tty->driver_data;
+ un = (struct un_t *)tty->driver_data;
if (!un || un->magic != DGNC_UNIT_MAGIC)
return;
ch->ch_old_baud = 0;
return;
} else if (ch->ch_custom_speed) {
-
baud = ch->ch_custom_speed;
/* Handle transition from B0 */
if (ch->ch_flags & CH_BAUD0) {
* unit is NOT open
*/
if (!(ch->ch_tun.un_flags & UN_ISOPEN) &&
- (un->un_type == DGNC_PRINT))
+ (un->un_type == DGNC_PRINT))
baud = C_BAUD(ch->ch_pun.un_tty) & 0xff;
else
baud = C_BAUD(ch->ch_tun.un_tty) & 0xff;
jindex = baud;
if ((iindex >= 0) && (iindex < 4) && (jindex >= 0) &&
- (jindex < 16)) {
+ (jindex < 16)) {
baud = bauds[iindex][jindex];
} else {
baud = 0;
* we are in hardware flow control mode, or CLOCAL/FORCEDCD is not set.
*/
if ((ch->ch_digi.digi_flags & CTSPACE) ||
- (ch->ch_digi.digi_flags & RTSPACE) ||
- (ch->ch_c_cflag & CRTSCTS) ||
- !(ch->ch_digi.digi_flags & DIGI_FORCEDCD) ||
- !(ch->ch_c_cflag & CLOCAL))
- ier |= UART_IER_MSI;
+ (ch->ch_digi.digi_flags & RTSPACE) ||
+ (ch->ch_c_cflag & CRTSCTS) ||
+ !(ch->ch_digi.digi_flags & DIGI_FORCEDCD) ||
+ !(ch->ch_c_cflag & CLOCAL))
+ ier |= UART_IER_MSI;
else
- ier &= ~UART_IER_MSI;
+ ier &= ~UART_IER_MSI;
ier |= UART_IER_THRI;
* disable flow control
*/
if ((ch->ch_startc == _POSIX_VDISABLE) ||
- (ch->ch_stopc == _POSIX_VDISABLE))
+ (ch->ch_stopc == _POSIX_VDISABLE))
cls_set_no_output_flow_control(ch);
else
cls_set_ixon_flow_control(ch);
* flow control
*/
if ((ch->ch_startc == _POSIX_VDISABLE) ||
- (ch->ch_stopc == _POSIX_VDISABLE))
+ (ch->ch_stopc == _POSIX_VDISABLE))
cls_set_no_input_flow_control(ch);
else
cls_set_ixoff_flow_control(ch);
*/
static void cls_tasklet(unsigned long data)
{
- struct dgnc_board *bd = (struct dgnc_board *) data;
+ struct dgnc_board *bd = (struct dgnc_board *)data;
struct channel_t *ch;
unsigned long flags;
int i;
* If board is ready, parse deeper to see if there is anything to do.
*/
if ((state == BOARD_READY) && (ports > 0)) {
-
/* Loop on each port */
for (i = 0; i < ports; i++) {
ch = bd->channels[i];
- if (!ch)
- continue;
/*
* NOTE: Remember you CANNOT hold any channel
}
spin_unlock_irqrestore(&bd->bd_intr_lock, flags);
-
}
/*
* Discard character if we are ignoring the error mask.
*/
if (linestatus & error_mask) {
- unsigned char discard;
-
linestatus = 0;
- discard = readb(&ch->ch_cls_uart->txrx);
+ readb(&ch->ch_cls_uart->txrx);
continue;
}
if (!tty || tty->magic != TTY_MAGIC)
return -ENXIO;
- un = (struct un_t *) tty->driver_data;
+ un = (struct un_t *)tty->driver_data;
if (!un || un->magic != DGNC_UNIT_MAGIC)
return -ENXIO;
return;
writeb((UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_XMIT),
- &ch->ch_cls_uart->isr_fcr);
+ &ch->ch_cls_uart->isr_fcr);
udelay(10);
ch->ch_flags |= (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM);
/* If port is "stopped", don't send any data to the UART */
if ((ch->ch_flags & CH_FORCED_STOP) ||
- (ch->ch_flags & CH_BREAK_SENDING))
+ (ch->ch_flags & CH_BREAK_SENDING))
goto exit_unlock;
if (!(ch->ch_flags & (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM)))
n = min(n, qlen);
while (n > 0) {
-
/*
* If RTS Toggle mode is on, turn on RTS now if not already set,
* and make sure we get an event when the data transfer has
readb(&ch->ch_cls_uart->txrx);
writeb((UART_FCR_ENABLE_FIFO|UART_FCR_CLEAR_RCVR|UART_FCR_CLEAR_XMIT),
- &ch->ch_cls_uart->isr_fcr);
+ &ch->ch_cls_uart->isr_fcr);
udelay(10);
ch->ch_flags |= (CH_FIFO_ENABLED | CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM);
}
pr_info("\n");
- if (re_map_vpdbase)
- iounmap(re_map_vpdbase);
+ iounmap(re_map_vpdbase);
}