+/*
+ * Register I/O Map
+ *
+ * This board has two standard 8255 devices that provide six 8-bit DIO ports
+ * (48 channels total). Six 74HCT245 chips (one for each port) buffer the
+ * I/O lines to increase driving capability. Because the 74HCT245 is a
+ * bidirectional, tri-state line buffer, two additional I/O ports are used
+ * to control the direction of data and the enable of each port.
+ */
+#define PCM3724_8255_0_BASE 0x00
+#define PCM3724_8255_1_BASE 0x04
+#define PCM3724_DIO_DIR_REG 0x08
+#define PCM3724_DIO_DIR_C0_OUT BIT(0)
+#define PCM3724_DIO_DIR_B0_OUT BIT(1)
+#define PCM3724_DIO_DIR_A0_OUT BIT(2)
+#define PCM3724_DIO_DIR_C1_OUT BIT(3)
+#define PCM3724_DIO_DIR_B1_OUT BIT(4)
+#define PCM3724_DIO_DIR_A1_OUT BIT(5)
+#define PCM3724_GATE_CTRL_REG 0x09
+#define PCM3724_GATE_CTRL_C0_ENA BIT(0)
+#define PCM3724_GATE_CTRL_B0_ENA BIT(1)
+#define PCM3724_GATE_CTRL_A0_ENA BIT(2)
+#define PCM3724_GATE_CTRL_C1_ENA BIT(3)
+#define PCM3724_GATE_CTRL_B1_ENA BIT(4)
+#define PCM3724_GATE_CTRL_A1_ENA BIT(5)