*/
/*
-Driver: dt9812
-Description: Data Translation DT9812 USB module
-Author: anders.blomdell@control.lth.se (Anders Blomdell)
-Status: in development
-Devices: [Data Translation] DT9812 (dt9812)
-Updated: Sun Nov 20 20:18:34 EST 2005
-
-This driver works, but bulk transfers not implemented. Might be a starting point
-for someone else. I found out too late that USB has too high latencies (>1 ms)
-for my needs.
-*/
+ * Driver: dt9812
+ * Description: Data Translation DT9812 USB module
+ * Devices: [Data Translation] DT9812 (dt9812)
+ * Author: anders.blomdell@control.lth.se (Anders Blomdell)
+ * Status: in development
+ * Updated: Sun Nov 20 20:18:34 EST 2005
+ *
+ * This driver works, but bulk transfers not implemented. Might be a
+ * starting point for someone else. I found out too late that USB has
+ * too high latencies (>1 ms) for my needs.
+ */
/*
* Nota Bene:
#define F020_MASK_ADC0CN_AD0INT 0x20
#define F020_MASK_ADC0CN_AD0BUSY 0x10
-#define F020_MASK_DACxCN_DACxEN 0x80
+#define F020_MASK_DACXCN_DACXEN 0x80
enum {
/* A/D D/A DI DO CT */
};
struct dt9812_private {
- struct semaphore sem;
+ struct mutex mut;
struct {
__u8 addr;
size_t size;
u8 value[2];
int ret;
- down(&devpriv->sem);
+ mutex_lock(&devpriv->mut);
ret = dt9812_read_multiple_registers(dev, 2, reg, value);
if (ret == 0) {
/*
*/
*bits = (value[0] & 0x7f) | ((value[1] & 0x08) << 4);
}
- up(&devpriv->sem);
+ mutex_unlock(&devpriv->mut);
return ret;
}
u8 value[1] = { bits };
int ret;
- down(&devpriv->sem);
+ mutex_lock(&devpriv->mut);
ret = dt9812_write_multiple_registers(dev, 1, reg, value);
- up(&devpriv->sem);
+ mutex_unlock(&devpriv->mut);
return ret;
}
u8 val[3];
int ret;
- down(&devpriv->sem);
+ mutex_lock(&devpriv->mut);
/* 1 select the gain */
dt9812_configure_gain(dev, &rmw[0], gain);
}
exit:
- up(&devpriv->sem);
+ mutex_unlock(&devpriv->mut);
return ret;
}
struct dt9812_rmw_byte rmw[3];
int ret;
- down(&devpriv->sem);
+ mutex_lock(&devpriv->mut);
switch (channel) {
case 0:
/* 1. Set DAC mode */
rmw[0].address = F020_SFR_DAC0CN;
rmw[0].and_mask = 0xff;
- rmw[0].or_value = F020_MASK_DACxCN_DACxEN;
+ rmw[0].or_value = F020_MASK_DACXCN_DACXEN;
- /* 2 load low byte of DAC value first */
+ /* 2. load lsb of DAC value first */
rmw[1].address = F020_SFR_DAC0L;
rmw[1].and_mask = 0xff;
rmw[1].or_value = value & 0xff;
- /* 3 load high byte of DAC value next to latch the
- 12-bit value */
+ /* 3. load msb of DAC value next to latch the 12-bit value */
rmw[2].address = F020_SFR_DAC0H;
rmw[2].and_mask = 0xff;
rmw[2].or_value = (value >> 8) & 0xf;
/* 1. Set DAC mode */
rmw[0].address = F020_SFR_DAC1CN;
rmw[0].and_mask = 0xff;
- rmw[0].or_value = F020_MASK_DACxCN_DACxEN;
+ rmw[0].or_value = F020_MASK_DACXCN_DACXEN;
- /* 2 load low byte of DAC value first */
+ /* 2. load lsb of DAC value first */
rmw[1].address = F020_SFR_DAC1L;
rmw[1].and_mask = 0xff;
rmw[1].or_value = value & 0xff;
- /* 3 load high byte of DAC value next to latch the
- 12-bit value */
+ /* 3. load msb of DAC value next to latch the 12-bit value */
rmw[2].address = F020_SFR_DAC1H;
rmw[2].and_mask = 0xff;
rmw[2].or_value = (value >> 8) & 0xf;
}
ret = dt9812_rmw_multiple_registers(dev, 3, rmw);
- up(&devpriv->sem);
+ mutex_unlock(&devpriv->mut);
return ret;
}
struct dt9812_private *devpriv = dev->private;
int ret;
- down(&devpriv->sem);
+ mutex_lock(&devpriv->mut);
ret = comedi_readback_insn_read(dev, s, insn, data);
- up(&devpriv->sem);
+ mutex_unlock(&devpriv->mut);
return ret;
}
if (!devpriv)
return -ENOMEM;
- sema_init(&devpriv->sem, 1);
+ mutex_init(&devpriv->mut);
usb_set_intfdata(intf, devpriv);
ret = dt9812_find_endpoints(dev);
if (!devpriv)
return;
- down(&devpriv->sem);
+ mutex_lock(&devpriv->mut);
usb_set_intfdata(intf, NULL);
- up(&devpriv->sem);
+ mutex_unlock(&devpriv->mut);
}
static struct comedi_driver dt9812_driver = {