}
enum read_only_registers {
- /* hardware status register,
- * reading this apparently clears pending interrupts as well */
+ /*
+ * hardware status register,
+ * reading this apparently clears pending interrupts as well
+ */
HW_STATUS_REG = 0x0,
PIPE1_READ_REG = 0x4,
ADC_READ_PNTR_REG = 0x8,
ADC_SOFT_GATE_BITS = 0x1, /* software gate */
ADC_EXT_GATE_BITS = 0x2, /* external digital gate */
ADC_ANALOG_GATE_BITS = 0x3, /* analog level gate */
- ADC_GATE_LEVEL_BIT = 0x4, /* level-sensitive gate (for digital) */
+ /* level-sensitive gate (for digital) */
+ ADC_GATE_LEVEL_BIT = 0x4,
ADC_GATE_POLARITY_BIT = 0x8, /* gate active low */
ADC_START_TRIG_SOFT_BITS = 0x10,
ADC_START_TRIG_EXT_BITS = 0x20,
CAL_GAIN_BIT = 0x800,
};
-/* calibration sources for 6025 are:
+/*
+ * calibration sources for 6025 are:
* 0 : ground
* 1 : 10V
* 2 : 5V
.fifo_size_reg_mask = 0x7f,
};
-/* maximum number of dma transfers we will chain together into a ring
- * (and the maximum number of dma buffers we maintain) */
+/*
+ * maximum number of dma transfers we will chain together into a ring
+ * (and the maximum number of dma buffers we maintain)
+ */
#define MAX_AI_DMA_RING_COUNT (0x80000 / DMA_BUFFER_SIZE)
#define MIN_AI_DMA_RING_COUNT (0x10000 / DMA_BUFFER_SIZE)
#define AO_DMA_RING_COUNT (0x10000 / DMA_BUFFER_SIZE)
static inline unsigned short se_diff_bit_6xxx(struct comedi_device *dev,
int use_differential)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
- if ((thisboard->layout == LAYOUT_64XX && !use_differential) ||
- (thisboard->layout == LAYOUT_60XX && use_differential))
+ if ((board->layout == LAYOUT_64XX && !use_differential) ||
+ (board->layout == LAYOUT_60XX && use_differential))
return ADC_SE_DIFF_BIT;
return 0;
static unsigned int ai_range_bits_6xxx(const struct comedi_device *dev,
unsigned int range_index)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
- return thisboard->ai_range_code[range_index] << 8;
+ return board->ai_range_code[range_index] << 8;
}
static unsigned int hw_revision(const struct comedi_device *dev,
uint16_t hw_status_bits)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
- if (thisboard->layout == LAYOUT_4020)
+ if (board->layout == LAYOUT_4020)
return (hw_status_bits >> 13) & 0x7;
return (hw_status_bits >> 12) & 0xf;
uint16_t *bits, unsigned int channel,
unsigned int range)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
- unsigned int code = thisboard->ao_range_code[range];
+ const struct pcidas64_board *board = dev->board_ptr;
+ unsigned int code = board->ao_range_code[range];
if (channel > 1)
dev_err(dev->class_dev, "bug! bad channel?\n");
static void enable_ai_interrupts(struct comedi_device *dev,
const struct comedi_cmd *cmd)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
struct pcidas64_private *devpriv = dev->private;
uint32_t bits;
unsigned long flags;
bits = EN_ADC_OVERRUN_BIT | EN_ADC_DONE_INTR_BIT |
EN_ADC_ACTIVE_INTR_BIT | EN_ADC_STOP_INTR_BIT;
- /* Use pio transfer and interrupt on end of conversion
- * if CMDF_WAKE_EOS flag is set. */
+ /*
+ * Use pio transfer and interrupt on end of conversion
+ * if CMDF_WAKE_EOS flag is set.
+ */
if (cmd->flags & CMDF_WAKE_EOS) {
/* 4020 doesn't support pio transfers except for fifo dregs */
- if (thisboard->layout != LAYOUT_4020)
+ if (board->layout != LAYOUT_4020)
bits |= ADC_INTR_EOSCAN_BITS | EN_ADC_INTR_SRC_BIT;
}
spin_lock_irqsave(&dev->spinlock, flags);
/* initialize plx9080 chip */
static void init_plx9080(struct comedi_device *dev)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
struct pcidas64_private *devpriv = dev->private;
uint32_t bits;
void __iomem *plx_iobase = devpriv->plx9080_iobase;
/* enable local burst mode */
bits |= PLX_DMA_LOCAL_BURST_EN_BIT;
/* 4020 uses 32 bit dma */
- if (thisboard->layout == LAYOUT_4020)
+ if (board->layout == LAYOUT_4020)
bits |= PLX_LOCAL_BUS_32_WIDE_BITS;
else /* localspace0 bus is 16 bits wide */
bits |= PLX_LOCAL_BUS_16_WIDE_BITS;
writel(bits, plx_iobase + PLX_DMA1_MODE_REG);
- if (ao_cmd_is_supported(thisboard))
+ if (ao_cmd_is_supported(board))
writel(bits, plx_iobase + PLX_DMA0_MODE_REG);
/* enable interrupts on plx 9080 */
static int set_ai_fifo_segment_length(struct comedi_device *dev,
unsigned int num_entries)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
struct pcidas64_private *devpriv = dev->private;
static const int increment_size = 0x100;
- const struct hw_fifo_info *const fifo = thisboard->ai_fifo;
+ const struct hw_fifo_info *const fifo = board->ai_fifo;
unsigned int num_increments;
uint16_t bits;
return devpriv->ai_fifo_segment_length;
}
-/* adjusts the size of hardware fifo (which determines block size for dma xfers) */
+/*
+ * adjusts the size of hardware fifo (which determines block size for dma xfers)
+ */
static int set_ai_fifo_size(struct comedi_device *dev, unsigned int num_samples)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
unsigned int num_fifo_entries;
int retval;
- const struct hw_fifo_info *const fifo = thisboard->ai_fifo;
+ const struct hw_fifo_info *const fifo = board->ai_fifo;
num_fifo_entries = num_samples / fifo->sample_packing_ratio;
/* query length of fifo */
static unsigned int ai_fifo_size(struct comedi_device *dev)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
struct pcidas64_private *devpriv = dev->private;
return devpriv->ai_fifo_segment_length *
- thisboard->ai_fifo->num_segments *
- thisboard->ai_fifo->sample_packing_ratio;
+ board->ai_fifo->num_segments *
+ board->ai_fifo->sample_packing_ratio;
}
static void init_stc_registers(struct comedi_device *dev)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
struct pcidas64_private *devpriv = dev->private;
uint16_t bits;
unsigned long flags;
spin_lock_irqsave(&dev->spinlock, flags);
- /* bit should be set for 6025,
- * although docs say boards with <= 16 chans should be cleared XXX */
+ /*
+ * bit should be set for 6025,
+ * although docs say boards with <= 16 chans should be cleared XXX
+ */
if (1)
devpriv->adc_control1_bits |= ADC_QUEUE_CONFIG_BIT;
writew(devpriv->adc_control1_bits,
writew(0xff, devpriv->main_iobase + ADC_SAMPLE_INTERVAL_UPPER_REG);
bits = SLOW_DAC_BIT | DMA_CH_SELECT_BIT;
- if (thisboard->layout == LAYOUT_4020)
+ if (board->layout == LAYOUT_4020)
bits |= INTERNAL_CLOCK_4020_BITS;
devpriv->hw_config_bits |= bits;
writew(devpriv->hw_config_bits,
/* set fifos to maximum size */
devpriv->fifo_size_bits |= DAC_FIFO_BITS;
- set_ai_fifo_segment_length(dev,
- thisboard->ai_fifo->max_segment_length);
+ set_ai_fifo_segment_length(dev, board->ai_fifo->max_segment_length);
devpriv->dac_control1_bits = DAC_OUTPUT_ENABLE_BIT;
devpriv->intr_enable_bits =
static int alloc_and_init_dma_members(struct comedi_device *dev)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct pcidas64_private *devpriv = dev->private;
int i;
/* allocate pci dma buffers */
- for (i = 0; i < ai_dma_ring_count(thisboard); i++) {
+ for (i = 0; i < ai_dma_ring_count(board); i++) {
devpriv->ai_buffer[i] =
pci_alloc_consistent(pcidev, DMA_BUFFER_SIZE,
&devpriv->ai_buffer_bus_addr[i]);
return -ENOMEM;
}
for (i = 0; i < AO_DMA_RING_COUNT; i++) {
- if (ao_cmd_is_supported(thisboard)) {
+ if (ao_cmd_is_supported(board)) {
devpriv->ao_buffer[i] =
pci_alloc_consistent(pcidev, DMA_BUFFER_SIZE,
&devpriv->
/* allocate dma descriptors */
devpriv->ai_dma_desc =
pci_alloc_consistent(pcidev, sizeof(struct plx_dma_desc) *
- ai_dma_ring_count(thisboard),
+ ai_dma_ring_count(board),
&devpriv->ai_dma_desc_bus_addr);
if (!devpriv->ai_dma_desc)
return -ENOMEM;
- if (ao_cmd_is_supported(thisboard)) {
+ if (ao_cmd_is_supported(board)) {
devpriv->ao_dma_desc =
pci_alloc_consistent(pcidev,
sizeof(struct plx_dma_desc) *
return -ENOMEM;
}
/* initialize dma descriptors */
- for (i = 0; i < ai_dma_ring_count(thisboard); i++) {
+ for (i = 0; i < ai_dma_ring_count(board); i++) {
devpriv->ai_dma_desc[i].pci_start_addr =
cpu_to_le32(devpriv->ai_buffer_bus_addr[i]);
- if (thisboard->layout == LAYOUT_4020)
+ if (board->layout == LAYOUT_4020)
devpriv->ai_dma_desc[i].local_start_addr =
cpu_to_le32(devpriv->local1_iobase +
ADC_FIFO_REG);
devpriv->ai_dma_desc[i].transfer_size = cpu_to_le32(0);
devpriv->ai_dma_desc[i].next =
cpu_to_le32((devpriv->ai_dma_desc_bus_addr +
- ((i + 1) % ai_dma_ring_count(thisboard)) *
+ ((i + 1) % ai_dma_ring_count(board)) *
sizeof(devpriv->ai_dma_desc[0])) |
PLX_DESC_IN_PCI_BIT | PLX_INTR_TERM_COUNT |
PLX_XFER_LOCAL_TO_PCI);
}
- if (ao_cmd_is_supported(thisboard)) {
+ if (ao_cmd_is_supported(board)) {
for (i = 0; i < AO_DMA_RING_COUNT; i++) {
devpriv->ao_dma_desc[i].pci_start_addr =
cpu_to_le32(devpriv->ao_buffer_bus_addr[i]);
static void cb_pcidas64_free_dma(struct comedi_device *dev)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct pcidas64_private *devpriv = dev->private;
int i;
return;
/* free pci dma buffers */
- for (i = 0; i < ai_dma_ring_count(thisboard); i++) {
+ for (i = 0; i < ai_dma_ring_count(board); i++) {
if (devpriv->ai_buffer[i])
pci_free_consistent(pcidev,
DMA_BUFFER_SIZE,
if (devpriv->ai_dma_desc)
pci_free_consistent(pcidev,
sizeof(struct plx_dma_desc) *
- ai_dma_ring_count(thisboard),
+ ai_dma_ring_count(board),
devpriv->ai_dma_desc,
devpriv->ai_dma_desc_bus_addr);
if (devpriv->ao_dma_desc)
"Use internal AI channel queue (channels must be consecutive and use same range/aref)\n");
}
-/* Their i2c requires a huge delay on setting clock or data high for some reason */
+/*
+ * their i2c requires a huge delay on setting clock or data high for some reason
+ */
static const int i2c_high_udelay = 1000;
static const int i2c_low_udelay = 10;
uint8_t bitstream;
static const int read_bit = 0x1;
- /* XXX need mutex to prevent simultaneous attempts to access
- * eeprom and i2c bus */
+ /*
+ * XXX need mutex to prevent simultaneous attempts to access
+ * eeprom and i2c bus
+ */
/* make sure we dont send anything to eeprom */
devpriv->plx_control_bits &= ~CTL_EE_CS;
struct comedi_insn *insn,
unsigned long context)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
struct pcidas64_private *devpriv = dev->private;
unsigned int status;
status = readw(devpriv->main_iobase + HW_STATUS_REG);
- if (thisboard->layout == LAYOUT_4020) {
+ if (board->layout == LAYOUT_4020) {
status = readw(devpriv->main_iobase + ADC_WRITE_PNTR_REG);
if (status)
return 0;
static int ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
struct pcidas64_private *devpriv = dev->private;
unsigned int bits = 0, n;
unsigned int channel, range, aref;
devpriv->main_iobase + ADC_CONTROL1_REG);
spin_unlock_irqrestore(&dev->spinlock, flags);
- if (thisboard->layout != LAYOUT_4020) {
+ if (board->layout != LAYOUT_4020) {
/* use internal queue */
devpriv->hw_config_bits &= ~EXT_QUEUE_BIT;
writew(devpriv->hw_config_bits,
if (insn->chanspec & CR_ALT_SOURCE) {
unsigned int cal_en_bit;
- if (thisboard->layout == LAYOUT_60XX)
+ if (board->layout == LAYOUT_60XX)
cal_en_bit = CAL_EN_60XX_BIT;
else
cal_en_bit = CAL_EN_64XX_BIT;
- /* select internal reference source to connect
- * to channel 0 */
+ /*
+ * select internal reference source to connect
+ * to channel 0
+ */
writew(cal_en_bit |
adc_src_bits(devpriv->calibration_source),
devpriv->main_iobase + CALIBRATION_REG);
} else {
- /* make sure internal calibration source
- * is turned off */
+ /*
+ * make sure internal calibration source
+ * is turned off
+ */
writew(0, devpriv->main_iobase + CALIBRATION_REG);
}
/* load internal queue */
devpriv->i2c_cal_range_bits |= attenuate_bit(channel);
else
devpriv->i2c_cal_range_bits &= ~attenuate_bit(channel);
- /* update calibration/range i2c register only if necessary,
- * as it is very slow */
+ /*
+ * update calibration/range i2c register only if necessary,
+ * as it is very slow
+ */
if (old_cal_range_bits != devpriv->i2c_cal_range_bits) {
uint8_t i2c_data = devpriv->i2c_cal_range_bits;
sizeof(i2c_data));
}
- /* 4020 manual asks that sample interval register to be set
+ /*
+ * 4020 manual asks that sample interval register to be set
* before writing to convert register.
* Using somewhat arbitrary setting of 4 master clock ticks
- * = 0.1 usec */
+ * = 0.1 usec
+ */
writew(0, devpriv->main_iobase + ADC_SAMPLE_INTERVAL_UPPER_REG);
writew(2, devpriv->main_iobase + ADC_SAMPLE_INTERVAL_LOWER_REG);
}
if (ret)
return ret;
- if (thisboard->layout == LAYOUT_4020)
+ if (board->layout == LAYOUT_4020)
data[n] = readl(dev->mmio + ADC_FIFO_REG) & 0xffff;
else
data[n] = readw(devpriv->main_iobase + PIPE1_READ_REG);
static int ai_config_calibration_source(struct comedi_device *dev,
unsigned int *data)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
struct pcidas64_private *devpriv = dev->private;
unsigned int source = data[1];
int num_calibration_sources;
- if (thisboard->layout == LAYOUT_60XX)
+ if (board->layout == LAYOUT_60XX)
num_calibration_sources = 16;
else
num_calibration_sources = 8;
static int ai_config_block_size(struct comedi_device *dev, unsigned int *data)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
int fifo_size;
- const struct hw_fifo_info *const fifo = thisboard->ai_fifo;
+ const struct hw_fifo_info *const fifo = board->ai_fifo;
unsigned int block_size, requested_block_size;
int retval;
/* XXX could add support for 60xx series */
static int ai_config_master_clock(struct comedi_device *dev, unsigned int *data)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
- switch (thisboard->layout) {
+ switch (board->layout) {
case LAYOUT_4020:
return ai_config_master_clock_4020(dev, data);
default:
return -EINVAL;
}
-/* Gets nearest achievable timing given master clock speed, does not
+/*
+ * Gets nearest achievable timing given master clock speed, does not
* take into account possible minimum/maximum divisor values. Used
- * by other timing checking functions. */
+ * by other timing checking functions.
+ */
static unsigned int get_divisor(unsigned int ns, unsigned int flags)
{
unsigned int divisor;
return divisor;
}
-/* utility function that rounds desired timing to an achievable time, and
+/*
+ * utility function that rounds desired timing to an achievable time, and
* sets cmd members appropriately.
- * adc paces conversions from master clock by dividing by (x + 3) where x is 24 bit number
+ * adc paces conversions from master clock by dividing by (x + 3) where x is
+ * 24 bit number
*/
static void check_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
unsigned long long convert_divisor = 0;
unsigned int scan_divisor;
static const int min_convert_divisor = 3;
unsigned long long max_scan_divisor, min_scan_divisor;
if (cmd->convert_src == TRIG_TIMER) {
- if (thisboard->layout == LAYOUT_4020) {
+ if (board->layout == LAYOUT_4020) {
cmd->convert_arg = 0;
} else {
convert_divisor = get_divisor(cmd->convert_arg,
static int ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
struct comedi_cmd *cmd)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
int err = 0;
unsigned int tmp_arg, tmp_arg2;
unsigned int triggers;
err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
triggers = TRIG_TIMER;
- if (thisboard->layout == LAYOUT_4020)
+ if (board->layout == LAYOUT_4020)
triggers |= TRIG_OTHER;
else
triggers |= TRIG_FOLLOW;
err |= comedi_check_trigger_src(&cmd->scan_begin_src, triggers);
triggers = TRIG_TIMER;
- if (thisboard->layout == LAYOUT_4020)
+ if (board->layout == LAYOUT_4020)
triggers |= TRIG_NOW;
else
triggers |= TRIG_EXT;
}
if (cmd->convert_src == TRIG_TIMER) {
- if (thisboard->layout == LAYOUT_4020) {
+ if (board->layout == LAYOUT_4020) {
err |= comedi_check_trigger_arg_is(&cmd->convert_arg,
0);
} else {
err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
- thisboard->
- ai_speed);
+ board->ai_speed);
/*
* if scans are timed faster than conversion rate
* allows
static inline unsigned int dma_transfer_size(struct comedi_device *dev)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
struct pcidas64_private *devpriv = dev->private;
unsigned int num_samples;
num_samples = devpriv->ai_fifo_segment_length *
- thisboard->ai_fifo->sample_packing_ratio;
+ board->ai_fifo->sample_packing_ratio;
if (num_samples > DMA_BUFFER_SIZE / sizeof(uint16_t))
num_samples = DMA_BUFFER_SIZE / sizeof(uint16_t);
static void select_master_clock(struct comedi_device *dev,
const struct comedi_cmd *cmd)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
- switch (thisboard->layout) {
+ switch (board->layout) {
case LAYOUT_4020:
select_master_clock_4020(dev, cmd);
break;
static void set_ai_pacing(struct comedi_device *dev, struct comedi_cmd *cmd)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
struct pcidas64_private *devpriv = dev->private;
uint32_t convert_counter = 0, scan_counter = 0;
select_master_clock(dev, cmd);
- if (thisboard->layout == LAYOUT_4020) {
+ if (board->layout == LAYOUT_4020) {
convert_counter = ai_convert_counter_4020(dev, cmd);
} else {
convert_counter = ai_convert_counter_6xxx(dev, cmd);
static int setup_channel_queue(struct comedi_device *dev,
const struct comedi_cmd *cmd)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
struct pcidas64_private *devpriv = dev->private;
unsigned short bits;
int i;
- if (thisboard->layout != LAYOUT_4020) {
+ if (board->layout != LAYOUT_4020) {
if (use_internal_queue_6xxx(cmd)) {
devpriv->hw_config_bits &= ~EXT_QUEUE_BIT;
writew(devpriv->hw_config_bits,
devpriv->main_iobase +
ADC_QUEUE_FIFO_REG);
}
- /* doing a queue clear is not specified in board docs,
- * but required for reliable operation */
+ /*
+ * doing a queue clear is not specified in board docs,
+ * but required for reliable operation
+ */
writew(0, devpriv->main_iobase + ADC_QUEUE_CLEAR_REG);
/* prime queue holding register */
writew(0, devpriv->main_iobase + ADC_QUEUE_LOAD_REG);
devpriv->i2c_cal_range_bits &=
~attenuate_bit(channel);
}
- /* update calibration/range i2c register only if necessary,
- * as it is very slow */
+ /*
+ * update calibration/range i2c register only if necessary,
+ * as it is very slow
+ */
if (old_cal_range_bits != devpriv->i2c_cal_range_bits) {
uint8_t i2c_data = devpriv->i2c_cal_range_bits;
{
struct pcidas64_private *devpriv = dev->private;
- /* The transfer size, pci address, and local address registers
+ /*
+ * The transfer size, pci address, and local address registers
* are supposedly unused during chained dma,
* but I have found that left over values from last operation
* occasionally cause problems with transfer of first dma
- * block. Initializing them to zero seems to fix the problem. */
+ * block. Initializing them to zero seems to fix the problem.
+ */
if (dma_channel) {
writel(0,
devpriv->plx9080_iobase + PLX_DMA1_TRANSFER_SIZE_REG);
static int ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
struct pcidas64_private *devpriv = dev->private;
struct comedi_async *async = s->async;
struct comedi_cmd *cmd = &async->cmd;
/* set mode, allow conversions through software gate */
devpriv->adc_control1_bits |= ADC_SW_GATE_BIT;
devpriv->adc_control1_bits &= ~ADC_DITHER_BIT;
- if (thisboard->layout != LAYOUT_4020) {
+ if (board->layout != LAYOUT_4020) {
devpriv->adc_control1_bits &= ~ADC_MODE_MASK;
if (cmd->convert_src == TRIG_EXT)
/* good old mode 13 */
writew(0, devpriv->main_iobase + ADC_BUFFER_CLEAR_REG);
if ((cmd->flags & CMDF_WAKE_EOS) == 0 ||
- thisboard->layout == LAYOUT_4020) {
+ board->layout == LAYOUT_4020) {
devpriv->ai_dma_index = 0;
/* set dma transfer size */
- for (i = 0; i < ai_dma_ring_count(thisboard); i++)
+ for (i = 0; i < ai_dma_ring_count(board); i++)
devpriv->ai_dma_desc[i].transfer_size =
cpu_to_le32(dma_transfer_size(dev) *
sizeof(uint16_t));
dma_start_sync(dev, 1);
}
- if (thisboard->layout == LAYOUT_4020) {
+ if (board->layout == LAYOUT_4020) {
/* set source for external triggers */
bits = 0;
if (cmd->start_src == TRIG_EXT && CR_CHAN(cmd->start_arg))
0x7fff;
write_index = readw(devpriv->main_iobase + ADC_WRITE_PNTR_REG) &
0x7fff;
- /* Get most significant bits (grey code).
+ /*
+ * Get most significant bits (grey code).
* Different boards use different code so use a scheme
* that doesn't depend on encoding. This read must
* occur after reading least significant 15 bits to avoid race
- * with fifo switching to next segment. */
+ * with fifo switching to next segment.
+ */
prepost_bits = readw(devpriv->main_iobase + PREPOST_REG);
- /* if read and write pointers are not on the same fifo segment,
- * read to the end of the read segment */
+ /*
+ * if read and write pointers are not on the same fifo segment,
+ * read to the end of the read segment
+ */
read_segment = adc_upper_read_ptr_code(prepost_bits);
write_segment = adc_upper_write_ptr_code(prepost_bits);
} while (read_segment != write_segment);
}
-/* Read from 32 bit wide ai fifo of 4020 - deal with insane grey coding of
+/*
+ * Read from 32 bit wide ai fifo of 4020 - deal with insane grey coding of
* pointers. The pci-4020 hardware only supports dma transfers (it only
* supports the use of pio for draining the last remaining points from the
* fifo when a data acquisition operation has completed).
/* empty fifo */
static void pio_drain_ai_fifo(struct comedi_device *dev)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
- if (thisboard->layout == LAYOUT_4020)
+ if (board->layout == LAYOUT_4020)
pio_drain_ai_fifo_32(dev);
else
pio_drain_ai_fifo_16(dev);
static void drain_dma_buffers(struct comedi_device *dev, unsigned int channel)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
struct pcidas64_private *devpriv = dev->private;
struct comedi_subdevice *s = dev->read_subdev;
uint32_t next_transfer_addr;
devpriv->ai_buffer_bus_addr[devpriv->ai_dma_index] ||
next_transfer_addr >=
devpriv->ai_buffer_bus_addr[devpriv->ai_dma_index] +
- DMA_BUFFER_SIZE) && j < ai_dma_ring_count(thisboard); j++) {
+ DMA_BUFFER_SIZE) && j < ai_dma_ring_count(board); j++) {
/* transfer data from dma buffer to comedi buffer */
num_samples = comedi_nsamples_left(s, dma_transfer_size(dev));
comedi_buf_write_samples(s,
devpriv->ai_buffer[devpriv->ai_dma_index],
num_samples);
devpriv->ai_dma_index = (devpriv->ai_dma_index + 1) %
- ai_dma_ring_count(thisboard);
+ ai_dma_ring_count(board);
}
- /* XXX check for dma ring buffer overrun
- * (use end-of-chain bit to mark last unused buffer) */
+ /*
+ * XXX check for dma ring buffer overrun
+ * (use end-of-chain bit to mark last unused buffer)
+ */
}
static void handle_ai_interrupt(struct comedi_device *dev,
unsigned short status,
unsigned int plx_status)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
struct pcidas64_private *devpriv = dev->private;
struct comedi_subdevice *s = dev->read_subdev;
struct comedi_async *async = s->async;
if ((status & ADC_DONE_BIT) ||
((cmd->flags & CMDF_WAKE_EOS) &&
(status & ADC_INTR_PENDING_BIT) &&
- (thisboard->layout != LAYOUT_4020))) {
+ (board->layout != LAYOUT_4020))) {
spin_lock_irqsave(&dev->spinlock, flags);
if (devpriv->ai_cmd_running) {
spin_unlock_irqrestore(&dev->spinlock, flags);
next_bits = le32_to_cpu(devpriv->ao_dma_desc[buffer_index].next);
next_bits |= PLX_END_OF_CHAIN_BIT;
devpriv->ao_dma_desc[buffer_index].next = cpu_to_le32(next_bits);
- /* clear end of chain bit on previous buffer now that we have set it
- * for the last buffer */
+ /*
+ * clear end of chain bit on previous buffer now that we have set it
+ * for the last buffer
+ */
next_bits = le32_to_cpu(devpriv->ao_dma_desc[prev_buffer_index].next);
next_bits &= ~PLX_END_OF_CHAIN_BIT;
devpriv->ao_dma_desc[prev_buffer_index].next = cpu_to_le32(next_bits);
plx_status = readl(devpriv->plx9080_iobase + PLX_INTRCS_REG);
status = readw(devpriv->main_iobase + HW_STATUS_REG);
- /* an interrupt before all the postconfig stuff gets done could
+ /*
+ * an interrupt before all the postconfig stuff gets done could
* cause a NULL dereference if we continue through the
- * interrupt handler */
+ * interrupt handler
+ */
if (!dev->attached)
return IRQ_HANDLED;
static int ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
struct pcidas64_private *devpriv = dev->private;
int chan = CR_CHAN(insn->chanspec);
int range = CR_RANGE(insn->chanspec);
devpriv->main_iobase + DAC_CONTROL1_REG);
/* write to channel */
- if (thisboard->layout == LAYOUT_4020) {
+ if (board->layout == LAYOUT_4020) {
writew(data[0] & 0xff,
devpriv->main_iobase + dac_lsb_4020_reg(chan));
writew((data[0] >> 8) & 0xf,
unsigned int nbytes;
int i;
- /* clear queue pointer too, since external queue has
- * weird interactions with ao fifo */
+ /*
+ * clear queue pointer too, since external queue has
+ * weird interactions with ao fifo
+ */
writew(0, devpriv->main_iobase + ADC_QUEUE_CLEAR_REG);
writew(0, devpriv->main_iobase + DAC_BUFFER_CLEAR_REG);
struct comedi_subdevice *s,
struct comedi_cmd *cmd)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
if (s->busy)
return 0;
- if (thisboard->layout == LAYOUT_4020)
+ if (board->layout == LAYOUT_4020)
return 0;
else if (use_internal_queue_6xxx(cmd))
return 0;
static int ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
struct comedi_cmd *cmd)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
int err = 0;
unsigned int tmp_arg;
if (cmd->scan_begin_src == TRIG_TIMER) {
err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
- thisboard->ao_scan_speed);
+ board->ao_scan_speed);
if (get_ao_divisor(cmd->scan_begin_arg, cmd->flags) >
max_counter_value) {
cmd->scan_begin_arg = (max_counter_value + 2) *
return insn->n;
}
-/* pci-6025 8800 caldac:
+/*
+ * pci-6025 8800 caldac:
* address 0 == dac channel 0 offset
* address 1 == dac channel 0 gain
* address 2 == dac channel 1 offset
* address 6 == coarse adc gain
* address 7 == fine adc gain
*/
-/* pci-6402/16 uses all 8 channels for dac:
+/*
+ * pci-6402/16 uses all 8 channels for dac:
* address 0 == dac channel 0 fine gain
* address 1 == dac channel 0 coarse gain
* address 2 == dac channel 0 coarse offset
* address 5 == dac channel 1 coarse gain
* address 6 == dac channel 0 fine offset
* address 7 == dac channel 1 fine offset
-*/
+ */
static int caldac_8800_write(struct comedi_device *dev, unsigned int address,
uint8_t value)
static void caldac_write(struct comedi_device *dev, unsigned int channel,
unsigned int value)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
- switch (thisboard->layout) {
+ switch (board->layout) {
case LAYOUT_60XX:
case LAYOUT_64XX:
caldac_8800_write(dev, channel, value);
return 1;
}
-/* Allocate and initialize the subdevice structures.
+/*
+ * Allocate and initialize the subdevice structures.
*/
static int setup_subdevices(struct comedi_device *dev)
{
- const struct pcidas64_board *thisboard = dev->board_ptr;
+ const struct pcidas64_board *board = dev->board_ptr;
struct pcidas64_private *devpriv = dev->private;
struct comedi_subdevice *s;
int i;
dev->read_subdev = s;
s->type = COMEDI_SUBD_AI;
s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DITHER | SDF_CMD_READ;
- if (thisboard->layout == LAYOUT_60XX)
+ if (board->layout == LAYOUT_60XX)
s->subdev_flags |= SDF_COMMON | SDF_DIFF;
- else if (thisboard->layout == LAYOUT_64XX)
+ else if (board->layout == LAYOUT_64XX)
s->subdev_flags |= SDF_DIFF;
/* XXX Number of inputs in differential mode is ignored */
- s->n_chan = thisboard->ai_se_chans;
+ s->n_chan = board->ai_se_chans;
s->len_chanlist = 0x2000;
- s->maxdata = (1 << thisboard->ai_bits) - 1;
- s->range_table = thisboard->ai_range_table;
+ s->maxdata = (1 << board->ai_bits) - 1;
+ s->range_table = board->ai_range_table;
s->insn_read = ai_rinsn;
s->insn_config = ai_config_insn;
s->do_cmd = ai_cmd;
s->do_cmdtest = ai_cmdtest;
s->cancel = ai_cancel;
- if (thisboard->layout == LAYOUT_4020) {
+ if (board->layout == LAYOUT_4020) {
uint8_t data;
- /* set adc to read from inputs
- * (not internal calibration sources) */
+ /*
+ * set adc to read from inputs
+ * (not internal calibration sources)
+ */
devpriv->i2c_cal_range_bits = adc_src_4020_bits(4);
/* set channels to +-5 volt input ranges */
for (i = 0; i < s->n_chan; i++)
/* analog output subdevice */
s = &dev->subdevices[1];
- if (thisboard->ao_nchan) {
+ if (board->ao_nchan) {
s->type = COMEDI_SUBD_AO;
s->subdev_flags = SDF_READABLE | SDF_WRITABLE |
SDF_GROUND | SDF_CMD_WRITE;
- s->n_chan = thisboard->ao_nchan;
- s->maxdata = (1 << thisboard->ao_bits) - 1;
- s->range_table = thisboard->ao_range_table;
+ s->n_chan = board->ao_nchan;
+ s->maxdata = (1 << board->ao_bits) - 1;
+ s->range_table = board->ao_range_table;
s->insn_write = ao_winsn;
ret = comedi_alloc_subdev_readback(s);
if (ret)
return ret;
- if (ao_cmd_is_supported(thisboard)) {
+ if (ao_cmd_is_supported(board)) {
dev->write_subdev = s;
s->do_cmdtest = ao_cmdtest;
s->do_cmd = ao_cmd;
- s->len_chanlist = thisboard->ao_nchan;
+ s->len_chanlist = board->ao_nchan;
s->cancel = ao_cancel;
}
} else {
/* digital input */
s = &dev->subdevices[2];
- if (thisboard->layout == LAYOUT_64XX) {
+ if (board->layout == LAYOUT_64XX) {
s->type = COMEDI_SUBD_DI;
s->subdev_flags = SDF_READABLE;
s->n_chan = 4;
}
/* digital output */
- if (thisboard->layout == LAYOUT_64XX) {
+ if (board->layout == LAYOUT_64XX) {
s = &dev->subdevices[3];
s->type = COMEDI_SUBD_DO;
s->subdev_flags = SDF_WRITABLE;
/* 8255 */
s = &dev->subdevices[4];
- if (thisboard->has_8255) {
- if (thisboard->layout == LAYOUT_4020) {
+ if (board->has_8255) {
+ if (board->layout == LAYOUT_4020) {
ret = subdev_8255_init(dev, s, dio_callback_4020,
I8255_4020_REG);
} else {
/* 8 channel dio for 60xx */
s = &dev->subdevices[5];
- if (thisboard->layout == LAYOUT_60XX) {
+ if (board->layout == LAYOUT_60XX) {
s->type = COMEDI_SUBD_DIO;
s->subdev_flags = SDF_WRITABLE | SDF_READABLE;
s->n_chan = 8;
s->type = COMEDI_SUBD_CALIB;
s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
s->n_chan = 8;
- if (thisboard->layout == LAYOUT_4020)
+ if (board->layout == LAYOUT_4020)
s->maxdata = 0xfff;
else
s->maxdata = 0xff;
/* 2 channel ad8402 potentiometer */
s = &dev->subdevices[7];
- if (thisboard->layout == LAYOUT_64XX) {
+ if (board->layout == LAYOUT_64XX) {
s->type = COMEDI_SUBD_CALIB;
s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
s->n_chan = 2;
unsigned long context)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
- const struct pcidas64_board *thisboard = NULL;
+ const struct pcidas64_board *board = NULL;
struct pcidas64_private *devpriv;
uint32_t local_range, local_decode;
int retval;
if (context < ARRAY_SIZE(pcidas64_boards))
- thisboard = &pcidas64_boards[context];
- if (!thisboard)
+ board = &pcidas64_boards[context];
+ if (!board)
return -ENODEV;
- dev->board_ptr = thisboard;
+ dev->board_ptr = board;
devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
if (!devpriv)
pci_set_master(pcidev);
/* Initialize dev->board_name */
- dev->board_name = thisboard->name;
+ dev->board_name = board->name;
devpriv->main_phys_iobase = pci_resource_start(pcidev, 2);
devpriv->dio_counter_phys_iobase = pci_resource_start(pcidev, 3);
Code Review / kvmfornfv.git / blobdiff