These changes are a raw update to a vanilla kernel 4.1.10, with the

[kvmfornfv.git] / kernel / drivers / spi / spi-dw.h

diff --git a/kernel/drivers/spi/spi-dw.h b/kernel/drivers/spi/spi-dw.h
index 6c91391..b75ed32 100644 (file)
--- a/kernel/drivers/spi/spi-dw.h
+++ b/kernel/drivers/spi/spi-dw.h
@@ -109,6 +109,7 @@ struct dw_spi {
        u32                     fifo_len;       /* depth of the FIFO buffer */
        u32                     max_freq;       /* max bus freq supported */
 
+       u32                     reg_io_width;   /* DR I/O width in bytes */
        u16                     bus_num;
        u16                     num_cs;         /* supported slave numbers */
 
@@ -145,11 +146,45 @@ static inline u32 dw_readl(struct dw_spi *dws, u32 offset)
        return __raw_readl(dws->regs + offset);
 }
 
+static inline u16 dw_readw(struct dw_spi *dws, u32 offset)
+{
+       return __raw_readw(dws->regs + offset);
+}
+
 static inline void dw_writel(struct dw_spi *dws, u32 offset, u32 val)
 {
        __raw_writel(val, dws->regs + offset);
 }
 
+static inline void dw_writew(struct dw_spi *dws, u32 offset, u16 val)
+{
+       __raw_writew(val, dws->regs + offset);
+}
+
+static inline u32 dw_read_io_reg(struct dw_spi *dws, u32 offset)
+{
+       switch (dws->reg_io_width) {
+       case 2:
+               return dw_readw(dws, offset);
+       case 4:
+       default:
+               return dw_readl(dws, offset);
+       }
+}
+
+static inline void dw_write_io_reg(struct dw_spi *dws, u32 offset, u32 val)
+{
+       switch (dws->reg_io_width) {
+       case 2:
+               dw_writew(dws, offset, val);
+               break;
+       case 4:
+       default:
+               dw_writel(dws, offset, val);
+               break;
+       }
+}
+
 static inline void spi_enable_chip(struct dw_spi *dws, int enable)
 {
        dw_writel(dws, DW_SPI_SSIENR, (enable ? 1 : 0));