These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / drivers / net / ethernet / chelsio / cxgb4vf / t4vf_hw.c

diff --git a/kernel/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c b/kernel/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c
index 966ee90..63dd5fd 100644 (file)
--- a/kernel/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c
+++ b/kernel/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c
@@ -428,7 +428,7 @@ int t4vf_set_params(struct adapter *adapter, unsigned int nparams,
 }
 
 /**
- *     t4_bar2_sge_qregs - return BAR2 SGE Queue register information
+ *     t4vf_bar2_sge_qregs - return BAR2 SGE Queue register information
  *     @adapter: the adapter
  *     @qid: the Queue ID
  *     @qtype: the Ingress or Egress type for @qid
@@ -452,11 +452,11 @@ int t4vf_set_params(struct adapter *adapter, unsigned int nparams,
  *     Write Combining Doorbell Buffer. If the BAR2 Queue ID is not 0,
  *     then these "Inferred Queue ID" register may not be used.
  */
-int t4_bar2_sge_qregs(struct adapter *adapter,
-                     unsigned int qid,
-                     enum t4_bar2_qtype qtype,
-                     u64 *pbar2_qoffset,
-                     unsigned int *pbar2_qid)
+int t4vf_bar2_sge_qregs(struct adapter *adapter,
+                       unsigned int qid,
+                       enum t4_bar2_qtype qtype,
+                       u64 *pbar2_qoffset,
+                       unsigned int *pbar2_qid)
 {
        unsigned int page_shift, page_size, qpp_shift, qpp_mask;
        u64 bar2_page_offset, bar2_qoffset;
@@ -619,7 +619,8 @@ int t4vf_get_sge_params(struct adapter *adapter)
                 */
                whoami = t4_read_reg(adapter,
                                     T4VF_PL_BASE_ADDR + PL_VF_WHOAMI_A);
-               pf = SOURCEPF_G(whoami);
+               pf = CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5 ?
+                       SOURCEPF_G(whoami) : T6_SOURCEPF_G(whoami);
 
                s_hps = (HOSTPAGESIZEPF0_S +
                         (HOSTPAGESIZEPF1_S - HOSTPAGESIZEPF0_S) * pf);
@@ -1191,9 +1192,7 @@ int t4vf_alloc_mac_filt(struct adapter *adapter, unsigned int viid, bool free,
        unsigned nfilters = 0;
        unsigned int rem = naddr;
        struct fw_vi_mac_cmd cmd, rpl;
-       unsigned int max_naddr = is_t4(adapter->params.chip) ?
-                                NUM_MPS_CLS_SRAM_L_INSTANCES :
-                                NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
+       unsigned int max_naddr = adapter->params.arch.mps_tcam_size;
 
        if (naddr > max_naddr)
                return -EINVAL;
@@ -1285,9 +1284,7 @@ int t4vf_change_mac(struct adapter *adapter, unsigned int viid,
        struct fw_vi_mac_exact *p = &cmd.u.exact[0];
        size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd,
                                             u.exact[1]), 16);
-       unsigned int max_naddr = is_t4(adapter->params.chip) ?
-                                NUM_MPS_CLS_SRAM_L_INSTANCES :
-                                NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
+       unsigned int max_mac_addr = adapter->params.arch.mps_tcam_size;
 
        /*
         * If this is a new allocation, determine whether it should be
@@ -1310,7 +1307,7 @@ int t4vf_change_mac(struct adapter *adapter, unsigned int viid,
        if (ret == 0) {
                p = &rpl.u.exact[0];
                ret = FW_VI_MAC_CMD_IDX_G(be16_to_cpu(p->valid_to_idx));
-               if (ret >= max_naddr)
+               if (ret >= max_mac_addr)
                        ret = -ENOMEM;
        }
        return ret;
@@ -1590,11 +1587,25 @@ int t4vf_prep_adapter(struct adapter *adapter)
        switch (CHELSIO_PCI_ID_VER(adapter->pdev->device)) {
        case CHELSIO_T4:
                adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T4, 0);
+               adapter->params.arch.sge_fl_db = DBPRIO_F;
+               adapter->params.arch.mps_tcam_size =
+                               NUM_MPS_CLS_SRAM_L_INSTANCES;
                break;
 
        case CHELSIO_T5:
                chipid = REV_G(t4_read_reg(adapter, PL_VF_REV_A));
                adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T5, chipid);
+               adapter->params.arch.sge_fl_db = DBPRIO_F | DBTYPE_F;
+               adapter->params.arch.mps_tcam_size =
+                               NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
+               break;
+
+       case CHELSIO_T6:
+               chipid = REV_G(t4_read_reg(adapter, PL_VF_REV_A));
+               adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T6, chipid);
+               adapter->params.arch.sge_fl_db = 0;
+               adapter->params.arch.mps_tcam_size =
+                               NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
                break;
        }