These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / drivers / net / ethernet / brocade / bna / bna_hw_defs.h

diff --git a/kernel/drivers/net/ethernet/brocade/bna/bna_hw_defs.h b/kernel/drivers/net/ethernet/brocade/bna/bna_hw_defs.h
index 174af0e..52b45c9 100644 (file)
--- a/kernel/drivers/net/ethernet/brocade/bna/bna_hw_defs.h
+++ b/kernel/drivers/net/ethernet/brocade/bna/bna_hw_defs.h
@@ -213,7 +213,7 @@ do {                                                                        \
  * 15 bits (32K) should  be large enough to accumulate, anyways, and the max.
  * acked events to h/w can be (32K + max poll weight) (currently 64).
  */
-#define        BNA_IB_MAX_ACK_EVENTS           (1 << 15)
+#define BNA_IB_MAX_ACK_EVENTS          BIT(15)
 
 /* These macros build the data portion of the TxQ/RxQ doorbell */
 #define BNA_DOORBELL_Q_PRD_IDX(_pi)    (0x80000000 | (_pi))
@@ -282,13 +282,13 @@ do {                                                                      \
 #define BNA_TXQ_WI_EXTENSION           (0x104) /* Extension WI */
 
 /* TxQ Entry Control Flags */
-#define BNA_TXQ_WI_CF_FCOE_CRC         (1 << 8)
-#define BNA_TXQ_WI_CF_IPID_MODE                (1 << 5)
-#define BNA_TXQ_WI_CF_INS_PRIO         (1 << 4)
-#define BNA_TXQ_WI_CF_INS_VLAN         (1 << 3)
-#define BNA_TXQ_WI_CF_UDP_CKSUM                (1 << 2)
-#define BNA_TXQ_WI_CF_TCP_CKSUM                (1 << 1)
-#define BNA_TXQ_WI_CF_IP_CKSUM         (1 << 0)
+#define BNA_TXQ_WI_CF_FCOE_CRC         BIT(8)
+#define BNA_TXQ_WI_CF_IPID_MODE                BIT(5)
+#define BNA_TXQ_WI_CF_INS_PRIO         BIT(4)
+#define BNA_TXQ_WI_CF_INS_VLAN         BIT(3)
+#define BNA_TXQ_WI_CF_UDP_CKSUM                BIT(2)
+#define BNA_TXQ_WI_CF_TCP_CKSUM                BIT(1)
+#define BNA_TXQ_WI_CF_IP_CKSUM         BIT(0)
 
 #define BNA_TXQ_WI_L4_HDR_N_OFFSET(_hdr_size, _offset) \
                (((_hdr_size) << 10) | ((_offset) & 0x3FF))
@@ -297,36 +297,36 @@ do {                                                                      \
  * Completion Q defines
  */
 /* CQ Entry Flags */
-#define        BNA_CQ_EF_MAC_ERROR     (1 <<  0)
-#define        BNA_CQ_EF_FCS_ERROR     (1 <<  1)
-#define        BNA_CQ_EF_TOO_LONG      (1 <<  2)
-#define        BNA_CQ_EF_FC_CRC_OK     (1 <<  3)
-
-#define        BNA_CQ_EF_RSVD1         (1 <<  4)
-#define        BNA_CQ_EF_L4_CKSUM_OK   (1 <<  5)
-#define        BNA_CQ_EF_L3_CKSUM_OK   (1 <<  6)
-#define        BNA_CQ_EF_HDS_HEADER    (1 <<  7)
-
-#define        BNA_CQ_EF_UDP           (1 <<  8)
-#define        BNA_CQ_EF_TCP           (1 <<  9)
-#define        BNA_CQ_EF_IP_OPTIONS    (1 << 10)
-#define        BNA_CQ_EF_IPV6          (1 << 11)
-
-#define        BNA_CQ_EF_IPV4          (1 << 12)
-#define        BNA_CQ_EF_VLAN          (1 << 13)
-#define        BNA_CQ_EF_RSS           (1 << 14)
-#define        BNA_CQ_EF_RSVD2         (1 << 15)
-
-#define        BNA_CQ_EF_MCAST_MATCH   (1 << 16)
-#define        BNA_CQ_EF_MCAST         (1 << 17)
-#define BNA_CQ_EF_BCAST                (1 << 18)
-#define        BNA_CQ_EF_REMOTE        (1 << 19)
-
-#define        BNA_CQ_EF_LOCAL         (1 << 20)
+#define BNA_CQ_EF_MAC_ERROR    BIT(0)
+#define BNA_CQ_EF_FCS_ERROR    BIT(1)
+#define BNA_CQ_EF_TOO_LONG     BIT(2)
+#define BNA_CQ_EF_FC_CRC_OK    BIT(3)
+
+#define BNA_CQ_EF_RSVD1                BIT(4)
+#define BNA_CQ_EF_L4_CKSUM_OK  BIT(5)
+#define BNA_CQ_EF_L3_CKSUM_OK  BIT(6)
+#define BNA_CQ_EF_HDS_HEADER   BIT(7)
+
+#define BNA_CQ_EF_UDP          BIT(8)
+#define BNA_CQ_EF_TCP          BIT(9)
+#define BNA_CQ_EF_IP_OPTIONS   BIT(10)
+#define BNA_CQ_EF_IPV6         BIT(11)
+
+#define BNA_CQ_EF_IPV4         BIT(12)
+#define BNA_CQ_EF_VLAN         BIT(13)
+#define BNA_CQ_EF_RSS          BIT(14)
+#define BNA_CQ_EF_RSVD2                BIT(15)
+
+#define BNA_CQ_EF_MCAST_MATCH   BIT(16)
+#define BNA_CQ_EF_MCAST                BIT(17)
+#define BNA_CQ_EF_BCAST                BIT(18)
+#define BNA_CQ_EF_REMOTE       BIT(19)
+
+#define BNA_CQ_EF_LOCAL                BIT(20)
 /* CAT2 ASIC does not use bit 21 as per the SPEC.
  * Bit 31 is set in every end of frame completion
  */
-#define BNA_CQ_EF_EOP          (1 << 31)
+#define BNA_CQ_EF_EOP          BIT(31)
 
 /* Data structures */