These changes are the raw update to linux-4.4.6-rt14. Kernel sources
[kvmfornfv.git] / kernel / drivers / mtd / nand / lpc32xx_mlc.c
index 79c3b78..3475109 100644 (file)
@@ -495,7 +495,8 @@ static int lpc32xx_read_page(struct mtd_info *mtd, struct nand_chip *chip,
 
 static int lpc32xx_write_page_lowlevel(struct mtd_info *mtd,
                                       struct nand_chip *chip,
-                                      const uint8_t *buf, int oob_required)
+                                      const uint8_t *buf, int oob_required,
+                                      int page)
 {
        struct lpc32xx_nand_host *host = chip->priv;
        const uint8_t *oobbuf = chip->oob_poi;
@@ -682,7 +683,6 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
 
        nand_chip->priv = host;         /* link the private data structures */
        mtd->priv = nand_chip;
-       mtd->owner = THIS_MODULE;
        mtd->dev.parent = &pdev->dev;
 
        /* Get NAND clock */
@@ -692,7 +692,7 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
                res = -ENOENT;
                goto err_exit1;
        }
-       clk_enable(host->clk);
+       clk_prepare_enable(host->clk);
 
        nand_chip->cmd_ctrl = lpc32xx_nand_cmd_ctrl;
        nand_chip->dev_ready = lpc32xx_nand_device_ready;
@@ -800,7 +800,7 @@ err_exit3:
        if (use_dma)
                dma_release_channel(host->dma_chan);
 err_exit2:
-       clk_disable(host->clk);
+       clk_disable_unprepare(host->clk);
        clk_put(host->clk);
 err_exit1:
        lpc32xx_wp_enable(host);
@@ -822,7 +822,7 @@ static int lpc32xx_nand_remove(struct platform_device *pdev)
        if (use_dma)
                dma_release_channel(host->dma_chan);
 
-       clk_disable(host->clk);
+       clk_disable_unprepare(host->clk);
        clk_put(host->clk);
 
        lpc32xx_wp_enable(host);
@@ -837,7 +837,7 @@ static int lpc32xx_nand_resume(struct platform_device *pdev)
        struct lpc32xx_nand_host *host = platform_get_drvdata(pdev);
 
        /* Re-enable NAND clock */
-       clk_enable(host->clk);
+       clk_prepare_enable(host->clk);
 
        /* Fresh init of NAND controller */
        lpc32xx_nand_setup(host);
@@ -856,7 +856,7 @@ static int lpc32xx_nand_suspend(struct platform_device *pdev, pm_message_t pm)
        lpc32xx_wp_enable(host);
 
        /* Disable clock */
-       clk_disable(host->clk);
+       clk_disable_unprepare(host->clk);
        return 0;
 }