These changes are the raw update to linux-4.4.6-rt14. Kernel sources
[kvmfornfv.git] / kernel / drivers / irqchip / irq-versatile-fpga.c
index 1ab4517..cadf104 100644 (file)
@@ -4,6 +4,7 @@
 #include <linux/bitops.h>
 #include <linux/irq.h>
 #include <linux/io.h>
+#include <linux/irqchip.h>
 #include <linux/irqchip/versatile-fpga.h>
 #include <linux/irqdomain.h>
 #include <linux/module.h>
@@ -14,8 +15,6 @@
 #include <asm/exception.h>
 #include <asm/mach/irq.h>
 
-#include "irqchip.h"
-
 #define IRQ_STATUS             0x00
 #define IRQ_RAW_STATUS         0x04
 #define IRQ_ENABLE_SET         0x08
@@ -66,18 +65,19 @@ static void fpga_irq_unmask(struct irq_data *d)
        writel(mask, f->base + IRQ_ENABLE_SET);
 }
 
-static void fpga_irq_handle(unsigned int irq, struct irq_desc *desc)
+static void fpga_irq_handle(struct irq_desc *desc)
 {
        struct fpga_irq_data *f = irq_desc_get_handler_data(desc);
        u32 status = readl(f->base + IRQ_STATUS);
 
        if (status == 0) {
-               do_bad_IRQ(irq, desc);
+               do_bad_IRQ(desc);
                return;
        }
 
        do {
-               irq = ffs(status) - 1;
+               unsigned int irq = ffs(status) - 1;
+
                status &= ~(1 << irq);
                generic_handle_irq(irq_find_mapping(f->domain, irq));
        } while (status);
@@ -128,11 +128,11 @@ static int fpga_irqdomain_map(struct irq_domain *d, unsigned int irq,
        irq_set_chip_data(irq, f);
        irq_set_chip_and_handler(irq, &f->chip,
                                handle_level_irq);
-       set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+       irq_set_probe(irq);
        return 0;
 }
 
-static struct irq_domain_ops fpga_irqdomain_ops = {
+static const struct irq_domain_ops fpga_irqdomain_ops = {
        .map = fpga_irqdomain_map,
        .xlate = irq_domain_xlate_onetwocell,
 };
@@ -156,8 +156,8 @@ void __init fpga_irq_init(void __iomem *base, const char *name, int irq_start,
        f->valid = valid;
 
        if (parent_irq != -1) {
-               irq_set_handler_data(parent_irq, f);
-               irq_set_chained_handler(parent_irq, fpga_irq_handle);
+               irq_set_chained_handler_and_data(parent_irq, fpga_irq_handle,
+                                                f);
        }
 
        /* This will also allocate irq descriptors */
@@ -210,7 +210,12 @@ int __init fpga_irq_of_init(struct device_node *node,
                parent_irq = -1;
        }
 
+#ifdef CONFIG_ARCH_VERSATILE
+       fpga_irq_init(base, node->name, IRQ_SIC_START, parent_irq, valid_mask,
+                                 node);
+#else
        fpga_irq_init(base, node->name, 0, parent_irq, valid_mask, node);
+#endif
 
        writel(clear_mask, base + IRQ_ENABLE_CLEAR);
        writel(clear_mask, base + FIQ_ENABLE_CLEAR);