These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / drivers / iommu / amd_iommu_types.h

diff --git a/kernel/drivers/iommu/amd_iommu_types.h b/kernel/drivers/iommu/amd_iommu_types.h
index 05030e5..b08cf57 100644 (file)
--- a/kernel/drivers/iommu/amd_iommu_types.h
+++ b/kernel/drivers/iommu/amd_iommu_types.h
@@ -295,8 +295,9 @@
 #define IOMMU_PTE_IR (1ULL << 61)
 #define IOMMU_PTE_IW (1ULL << 62)
 
-#define DTE_FLAG_IOTLB (0x01UL << 32)
-#define DTE_FLAG_GV    (0x01ULL << 55)
+#define DTE_FLAG_IOTLB (1ULL << 32)
+#define DTE_FLAG_GV    (1ULL << 55)
+#define DTE_FLAG_MASK  (0x3ffULL << 32)
 #define DTE_GLX_SHIFT  (56)
 #define DTE_GLX_MASK   (3)
 
@@ -398,6 +399,7 @@ struct amd_iommu_fault {
 
 
 struct iommu_domain;
+struct irq_domain;
 
 /*
  * This structure contains generic data for  IOMMU protection domains
@@ -446,8 +448,6 @@ struct aperture_range {
  * Data container for a dma_ops specific protection domain
  */
 struct dma_ops_domain {
-       struct list_head list;
-
        /* generic protection domain information */
        struct protection_domain domain;
 
@@ -462,12 +462,6 @@ struct dma_ops_domain {
 
        /* This will be set to true when TLB needs to be flushed */
        bool need_flush;
-
-       /*
-        * if this is a preallocated domain, keep the device for which it was
-        * preallocated in this variable
-        */
-       u16 target_dev;
 };
 
 /*
@@ -523,11 +517,6 @@ struct amd_iommu {
        /* pci domain of this IOMMU */
        u16 pci_seg;
 
-       /* first device this IOMMU handles. read from PCI */
-       u16 first_device;
-       /* last device this IOMMU handles. read from PCI */
-       u16 last_device;
-
        /* start of exclusion range of that IOMMU */
        u64 exclusion_start;
        /* length of exclusion range of that IOMMU */
@@ -535,11 +524,7 @@ struct amd_iommu {
 
        /* command buffer virtual address */
        u8 *cmd_buf;
-       /* size of command buffer */
-       u32 cmd_buf_size;
 
-       /* size of event buffer */
-       u32 evt_buf_size;
        /* event buffer virtual address */
        u8 *evt_buf;
 
@@ -552,9 +537,6 @@ struct amd_iommu {
        /* if one, we need to send a completion wait command */
        bool need_sync;
 
-       /* default dma_ops domain for that IOMMU */
-       struct dma_ops_domain *default_dom;
-
        /* IOMMU sysfs device */
        struct device *iommu_dev;
 
@@ -579,6 +561,10 @@ struct amd_iommu {
        /* The maximum PC banks and counters/bank (PCSup=1) */
        u8 max_banks;
        u8 max_counters;
+#ifdef CONFIG_IRQ_REMAP
+       struct irq_domain *ir_domain;
+       struct irq_domain *msi_domain;
+#endif
 };
 
 struct devid_map {
@@ -680,7 +666,7 @@ extern unsigned long *amd_iommu_pd_alloc_bitmap;
  * If true, the addresses will be flushed on unmap time, not when
  * they are reused
  */
-extern u32 amd_iommu_unmap_flush;
+extern bool amd_iommu_unmap_flush;
 
 /* Smallest max PASID supported by any IOMMU in the system */
 extern u32 amd_iommu_max_pasid;