These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / drivers / gpu / drm / nouveau / nvkm / subdev / mc / nv04.c

diff --git a/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c b/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c
index 3271382..d282ec1 100644 (file)
--- a/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c
+++ b/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c
@@ -21,58 +21,63 @@
  *
  * Authors: Ben Skeggs
  */
-#include "nv04.h"
+#include "priv.h"
 
 const struct nvkm_mc_intr
 nv04_mc_intr[] = {
-       { 0x00000001, NVDEV_ENGINE_MPEG },      /* NV17- MPEG/ME */
-       { 0x00000100, NVDEV_ENGINE_FIFO },
-       { 0x00001000, NVDEV_ENGINE_GR },
-       { 0x00010000, NVDEV_ENGINE_DISP },
-       { 0x00020000, NVDEV_ENGINE_VP },        /* NV40- */
-       { 0x00100000, NVDEV_SUBDEV_TIMER },
-       { 0x01000000, NVDEV_ENGINE_DISP },      /* NV04- PCRTC0 */
-       { 0x02000000, NVDEV_ENGINE_DISP },      /* NV11- PCRTC1 */
-       { 0x10000000, NVDEV_SUBDEV_BUS },
-       { 0x80000000, NVDEV_ENGINE_SW },
+       { 0x00000001, NVKM_ENGINE_MPEG },       /* NV17- MPEG/ME */
+       { 0x00000100, NVKM_ENGINE_FIFO },
+       { 0x00001000, NVKM_ENGINE_GR },
+       { 0x00010000, NVKM_ENGINE_DISP },
+       { 0x00020000, NVKM_ENGINE_VP }, /* NV40- */
+       { 0x00100000, NVKM_SUBDEV_TIMER },
+       { 0x01000000, NVKM_ENGINE_DISP },       /* NV04- PCRTC0 */
+       { 0x02000000, NVKM_ENGINE_DISP },       /* NV11- PCRTC1 */
+       { 0x10000000, NVKM_SUBDEV_BUS },
+       { 0x80000000, NVKM_ENGINE_SW },
        {}
 };
 
-int
-nv04_mc_init(struct nvkm_object *object)
+void
+nv04_mc_intr_unarm(struct nvkm_mc *mc)
 {
-       struct nv04_mc_priv *priv = (void *)object;
-
-       nv_wr32(priv, 0x000200, 0xffffffff); /* everything enabled */
-       nv_wr32(priv, 0x001850, 0x00000001); /* disable rom access */
-
-       return nvkm_mc_init(&priv->base);
+       struct nvkm_device *device = mc->subdev.device;
+       nvkm_wr32(device, 0x000140, 0x00000000);
+       nvkm_rd32(device, 0x000140);
 }
 
-int
-nv04_mc_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
-            struct nvkm_oclass *oclass, void *data, u32 size,
-            struct nvkm_object **pobject)
+void
+nv04_mc_intr_rearm(struct nvkm_mc *mc)
 {
-       struct nv04_mc_priv *priv;
-       int ret;
+       struct nvkm_device *device = mc->subdev.device;
+       nvkm_wr32(device, 0x000140, 0x00000001);
+}
 
-       ret = nvkm_mc_create(parent, engine, oclass, &priv);
-       *pobject = nv_object(priv);
-       if (ret)
-               return ret;
+u32
+nv04_mc_intr_mask(struct nvkm_mc *mc)
+{
+       return nvkm_rd32(mc->subdev.device, 0x000100);
+}
 
-       return 0;
+void
+nv04_mc_init(struct nvkm_mc *mc)
+{
+       struct nvkm_device *device = mc->subdev.device;
+       nvkm_wr32(device, 0x000200, 0xffffffff); /* everything enabled */
+       nvkm_wr32(device, 0x001850, 0x00000001); /* disable rom access */
 }
 
-struct nvkm_oclass *
-nv04_mc_oclass = &(struct nvkm_mc_oclass) {
-       .base.handle = NV_SUBDEV(MC, 0x04),
-       .base.ofuncs = &(struct nvkm_ofuncs) {
-               .ctor = nv04_mc_ctor,
-               .dtor = _nvkm_mc_dtor,
-               .init = nv04_mc_init,
-               .fini = _nvkm_mc_fini,
-       },
+static const struct nvkm_mc_func
+nv04_mc = {
+       .init = nv04_mc_init,
        .intr = nv04_mc_intr,
-}.base;
+       .intr_unarm = nv04_mc_intr_unarm,
+       .intr_rearm = nv04_mc_intr_rearm,
+       .intr_mask = nv04_mc_intr_mask,
+};
+
+int
+nv04_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
+{
+       return nvkm_mc_new_(&nv04_mc, device, index, pmc);
+}