These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / drivers / gpu / drm / nouveau / nvkm / subdev / mc / gf100.c

diff --git a/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c b/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c
index 2425984..122fe69 100644 (file)
--- a/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c
+++ b/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c
@@ -21,56 +21,77 @@
  *
  * Authors: Ben Skeggs
  */
-#include "nv04.h"
+#include "priv.h"
 
 const struct nvkm_mc_intr
 gf100_mc_intr[] = {
-       { 0x04000000, NVDEV_ENGINE_DISP },  /* DISP first, so pageflip timestamps work. */
-       { 0x00000001, NVDEV_ENGINE_MSPPP },
-       { 0x00000020, NVDEV_ENGINE_CE0 },
-       { 0x00000040, NVDEV_ENGINE_CE1 },
-       { 0x00000080, NVDEV_ENGINE_CE2 },
-       { 0x00000100, NVDEV_ENGINE_FIFO },
-       { 0x00001000, NVDEV_ENGINE_GR },
-       { 0x00002000, NVDEV_SUBDEV_FB },
-       { 0x00008000, NVDEV_ENGINE_MSVLD },
-       { 0x00040000, NVDEV_SUBDEV_THERM },
-       { 0x00020000, NVDEV_ENGINE_MSPDEC },
-       { 0x00100000, NVDEV_SUBDEV_TIMER },
-       { 0x00200000, NVDEV_SUBDEV_GPIO },      /* PMGR->GPIO */
-       { 0x00200000, NVDEV_SUBDEV_I2C },       /* PMGR->I2C/AUX */
-       { 0x01000000, NVDEV_SUBDEV_PMU },
-       { 0x02000000, NVDEV_SUBDEV_LTC },
-       { 0x08000000, NVDEV_SUBDEV_FB },
-       { 0x10000000, NVDEV_SUBDEV_BUS },
-       { 0x40000000, NVDEV_SUBDEV_IBUS },
-       { 0x80000000, NVDEV_ENGINE_SW },
+       { 0x04000000, NVKM_ENGINE_DISP },  /* DISP first, so pageflip timestamps work. */
+       { 0x00000001, NVKM_ENGINE_MSPPP },
+       { 0x00000020, NVKM_ENGINE_CE0 },
+       { 0x00000040, NVKM_ENGINE_CE1 },
+       { 0x00000080, NVKM_ENGINE_CE2 },
+       { 0x00000100, NVKM_ENGINE_FIFO },
+       { 0x00001000, NVKM_ENGINE_GR },
+       { 0x00002000, NVKM_SUBDEV_FB },
+       { 0x00008000, NVKM_ENGINE_MSVLD },
+       { 0x00040000, NVKM_SUBDEV_THERM },
+       { 0x00020000, NVKM_ENGINE_MSPDEC },
+       { 0x00100000, NVKM_SUBDEV_TIMER },
+       { 0x00200000, NVKM_SUBDEV_GPIO },       /* PMGR->GPIO */
+       { 0x00200000, NVKM_SUBDEV_I2C },        /* PMGR->I2C/AUX */
+       { 0x01000000, NVKM_SUBDEV_PMU },
+       { 0x02000000, NVKM_SUBDEV_LTC },
+       { 0x08000000, NVKM_SUBDEV_FB },
+       { 0x10000000, NVKM_SUBDEV_BUS },
+       { 0x40000000, NVKM_SUBDEV_IBUS },
+       { 0x80000000, NVKM_ENGINE_SW },
        {},
 };
 
-static void
-gf100_mc_msi_rearm(struct nvkm_mc *pmc)
+void
+gf100_mc_intr_unarm(struct nvkm_mc *mc)
+{
+       struct nvkm_device *device = mc->subdev.device;
+       nvkm_wr32(device, 0x000140, 0x00000000);
+       nvkm_wr32(device, 0x000144, 0x00000000);
+       nvkm_rd32(device, 0x000140);
+}
+
+void
+gf100_mc_intr_rearm(struct nvkm_mc *mc)
+{
+       struct nvkm_device *device = mc->subdev.device;
+       nvkm_wr32(device, 0x000140, 0x00000001);
+       nvkm_wr32(device, 0x000144, 0x00000001);
+}
+
+u32
+gf100_mc_intr_mask(struct nvkm_mc *mc)
 {
-       struct nv04_mc_priv *priv = (void *)pmc;
-       nv_wr32(priv, 0x088704, 0x00000000);
+       struct nvkm_device *device = mc->subdev.device;
+       u32 intr0 = nvkm_rd32(device, 0x000100);
+       u32 intr1 = nvkm_rd32(device, 0x000104);
+       return intr0 | intr1;
 }
 
 void
-gf100_mc_unk260(struct nvkm_mc *pmc, u32 data)
+gf100_mc_unk260(struct nvkm_mc *mc, u32 data)
 {
-       nv_wr32(pmc, 0x000260, data);
+       nvkm_wr32(mc->subdev.device, 0x000260, data);
 }
 
-struct nvkm_oclass *
-gf100_mc_oclass = &(struct nvkm_mc_oclass) {
-       .base.handle = NV_SUBDEV(MC, 0xc0),
-       .base.ofuncs = &(struct nvkm_ofuncs) {
-               .ctor = nv04_mc_ctor,
-               .dtor = _nvkm_mc_dtor,
-               .init = nv50_mc_init,
-               .fini = _nvkm_mc_fini,
-       },
+static const struct nvkm_mc_func
+gf100_mc = {
+       .init = nv50_mc_init,
        .intr = gf100_mc_intr,
-       .msi_rearm = gf100_mc_msi_rearm,
+       .intr_unarm = gf100_mc_intr_unarm,
+       .intr_rearm = gf100_mc_intr_rearm,
+       .intr_mask = gf100_mc_intr_mask,
        .unk260 = gf100_mc_unk260,
-}.base;
+};
+
+int
+gf100_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
+{
+       return nvkm_mc_new_(&gf100_mc, device, index, pmc);
+}