These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / drivers / gpu / drm / nouveau / nvkm / subdev / fb / gddr3.c

diff --git a/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr3.c b/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr3.c
index 15b462a..60ece0a 100644 (file)
--- a/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr3.c
+++ b/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr3.c
@@ -22,7 +22,7 @@
  * Authors: Ben Skeggs <bskeggs@redhat.com>
  *         Roy Spliet <rspliet@eclipso.eu>
  */
-#include "priv.h"
+#include "ram.h"
 
 struct ramxlat {
        int id;
@@ -42,9 +42,9 @@ ramxlat(const struct ramxlat *xlat, int id)
 
 static const struct ramxlat
 ramgddr3_cl_lo[] = {
-       { 7, 7 }, { 8, 0 }, { 9, 1 }, { 10, 2 }, { 11, 3 },
+       { 5, 5 }, { 7, 7 }, { 8, 0 }, { 9, 1 }, { 10, 2 }, { 11, 3 }, { 12, 8 },
        /* the below are mentioned in some, but not all, gddr3 docs */
-       { 12, 4 }, { 13, 5 }, { 14, 6 },
+       { 13, 9 }, { 14, 6 },
        /* XXX: Per Samsung docs, are these used? They overlap with Qimonda */
        /* { 4, 4 }, { 5, 5 }, { 6, 6 }, { 12, 8 }, { 13, 9 }, { 14, 10 },
         * { 15, 11 }, */
@@ -61,24 +61,25 @@ ramgddr3_cl_hi[] = {
 static const struct ramxlat
 ramgddr3_wr_lo[] = {
        { 5, 2 }, { 7, 4 }, { 8, 5 }, { 9, 6 }, { 10, 7 },
-       { 11, 0 },
+       { 11, 0 }, { 13 , 1 },
        /* the below are mentioned in some, but not all, gddr3 docs */
-       { 4, 1 }, { 6, 3 }, { 12, 1 }, { 13 , 2 },
+       { 4, 0 }, { 6, 3 }, { 12, 1 },
        { -1 }
 };
 
 int
 nvkm_gddr3_calc(struct nvkm_ram *ram)
 {
-       int CL, WR, CWL, DLL = 0, ODT = 0, hi;
+       int CL, WR, CWL, DLL = 0, ODT = 0, RON, hi;
 
        switch (ram->next->bios.timing_ver) {
        case 0x10:
                CWL = ram->next->bios.timing_10_CWL;
                CL  = ram->next->bios.timing_10_CL;
                WR  = ram->next->bios.timing_10_WR;
-               DLL = !ram->next->bios.ramcfg_10_DLLoff;
+               DLL = !ram->next->bios.ramcfg_DLLoff;
                ODT = ram->next->bios.timing_10_ODT;
+               RON = ram->next->bios.ramcfg_RON;
                break;
        case 0x20:
                CWL = (ram->next->bios.timing[1] & 0x00000f80) >> 7;
@@ -86,14 +87,17 @@ nvkm_gddr3_calc(struct nvkm_ram *ram)
                WR  = (ram->next->bios.timing[2] & 0x007f0000) >> 16;
                /* XXX: Get these values from the VBIOS instead */
                DLL = !(ram->mr[1] & 0x1);
-               ODT =  (ram->mr[1] & 0x004) >> 2 |
-                      (ram->mr[1] & 0x040) >> 5 |
-                      (ram->mr[1] & 0x200) >> 7;
+               RON = !(ram->mr[1] & 0x300) >> 8;
                break;
        default:
                return -ENOSYS;
        }
 
+       if (ram->next->bios.timing_ver == 0x20 ||
+           ram->next->bios.ramcfg_timing == 0xff) {
+               ODT =  (ram->mr[1] & 0xc) >> 2;
+       }
+
        hi = ram->mr[2] & 0x1;
        CL  = ramxlat(hi ? ramgddr3_cl_hi : ramgddr3_cl_lo, CL);
        WR  = ramxlat(ramgddr3_wr_lo, WR);
@@ -107,7 +111,7 @@ nvkm_gddr3_calc(struct nvkm_ram *ram)
 
        ram->mr[1] &= ~0x3fc;
        ram->mr[1] |= (ODT & 0x03) << 2;
-       ram->mr[1] |= (ODT & 0x03) << 8;
+       ram->mr[1] |= (RON & 0x03) << 8;
        ram->mr[1] |= (WR  & 0x03) << 4;
        ram->mr[1] |= (WR  & 0x04) << 5;
        ram->mr[1] |= !DLL << 6;