These changes are the raw update to linux-4.4.6-rt14. Kernel sources
[kvmfornfv.git] / kernel / drivers / gpu / drm / nouveau / nvkm / subdev / devinit / nv05.c
index def8649..9891ead 100644 (file)
@@ -32,7 +32,7 @@
 #include <subdev/vga.h>
 
 static void
-nv05_devinit_meminit(struct nvkm_devinit *devinit)
+nv05_devinit_meminit(struct nvkm_devinit *init)
 {
        static const u8 default_config_tab[][2] = {
                { 0x24, 0x00 },
@@ -44,8 +44,9 @@ nv05_devinit_meminit(struct nvkm_devinit *devinit)
                { 0x06, 0x00 },
                { 0x00, 0x00 }
        };
-       struct nv04_devinit_priv *priv = (void *)devinit;
-       struct nvkm_bios *bios = nvkm_bios(priv);
+       struct nvkm_subdev *subdev = &init->subdev;
+       struct nvkm_device *device = subdev->device;
+       struct nvkm_bios *bios = device->bios;
        struct io_mapping *fb;
        u32 patt = 0xdeadbeef;
        u16 data;
@@ -53,88 +54,90 @@ nv05_devinit_meminit(struct nvkm_devinit *devinit)
        int i, v;
 
        /* Map the framebuffer aperture */
-       fb = fbmem_init(nv_device(priv));
+       fb = fbmem_init(device);
        if (!fb) {
-               nv_error(priv, "failed to map fb\n");
+               nvkm_error(subdev, "failed to map fb\n");
                return;
        }
 
-       strap = (nv_rd32(priv, 0x101000) & 0x0000003c) >> 2;
+       strap = (nvkm_rd32(device, 0x101000) & 0x0000003c) >> 2;
        if ((data = bmp_mem_init_table(bios))) {
-               ramcfg[0] = nv_ro08(bios, data + 2 * strap + 0);
-               ramcfg[1] = nv_ro08(bios, data + 2 * strap + 1);
+               ramcfg[0] = nvbios_rd08(bios, data + 2 * strap + 0);
+               ramcfg[1] = nvbios_rd08(bios, data + 2 * strap + 1);
        } else {
                ramcfg[0] = default_config_tab[strap][0];
                ramcfg[1] = default_config_tab[strap][1];
        }
 
        /* Sequencer off */
-       nv_wrvgas(priv, 0, 1, nv_rdvgas(priv, 0, 1) | 0x20);
+       nvkm_wrvgas(device, 0, 1, nvkm_rdvgas(device, 0, 1) | 0x20);
 
-       if (nv_rd32(priv, NV04_PFB_BOOT_0) & NV04_PFB_BOOT_0_UMA_ENABLE)
+       if (nvkm_rd32(device, NV04_PFB_BOOT_0) & NV04_PFB_BOOT_0_UMA_ENABLE)
                goto out;
 
-       nv_mask(priv, NV04_PFB_DEBUG_0, NV04_PFB_DEBUG_0_REFRESH_OFF, 0);
+       nvkm_mask(device, NV04_PFB_DEBUG_0, NV04_PFB_DEBUG_0_REFRESH_OFF, 0);
 
        /* If present load the hardcoded scrambling table */
        if (data) {
                for (i = 0, data += 0x10; i < 8; i++, data += 4) {
-                       u32 scramble = nv_ro32(bios, data);
-                       nv_wr32(priv, NV04_PFB_SCRAMBLE(i), scramble);
+                       u32 scramble = nvbios_rd32(bios, data);
+                       nvkm_wr32(device, NV04_PFB_SCRAMBLE(i), scramble);
                }
        }
 
        /* Set memory type/width/length defaults depending on the straps */
-       nv_mask(priv, NV04_PFB_BOOT_0, 0x3f, ramcfg[0]);
+       nvkm_mask(device, NV04_PFB_BOOT_0, 0x3f, ramcfg[0]);
 
        if (ramcfg[1] & 0x80)
-               nv_mask(priv, NV04_PFB_CFG0, 0, NV04_PFB_CFG0_SCRAMBLE);
+               nvkm_mask(device, NV04_PFB_CFG0, 0, NV04_PFB_CFG0_SCRAMBLE);
 
-       nv_mask(priv, NV04_PFB_CFG1, 0x700001, (ramcfg[1] & 1) << 20);
-       nv_mask(priv, NV04_PFB_CFG1, 0, 1);
+       nvkm_mask(device, NV04_PFB_CFG1, 0x700001, (ramcfg[1] & 1) << 20);
+       nvkm_mask(device, NV04_PFB_CFG1, 0, 1);
 
        /* Probe memory bus width */
        for (i = 0; i < 4; i++)
                fbmem_poke(fb, 4 * i, patt);
 
        if (fbmem_peek(fb, 0xc) != patt)
-               nv_mask(priv, NV04_PFB_BOOT_0,
+               nvkm_mask(device, NV04_PFB_BOOT_0,
                          NV04_PFB_BOOT_0_RAM_WIDTH_128, 0);
 
        /* Probe memory length */
-       v = nv_rd32(priv, NV04_PFB_BOOT_0) & NV04_PFB_BOOT_0_RAM_AMOUNT;
+       v = nvkm_rd32(device, NV04_PFB_BOOT_0) & NV04_PFB_BOOT_0_RAM_AMOUNT;
 
        if (v == NV04_PFB_BOOT_0_RAM_AMOUNT_32MB &&
            (!fbmem_readback(fb, 0x1000000, ++patt) ||
             !fbmem_readback(fb, 0, ++patt)))
-               nv_mask(priv, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
+               nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
                          NV04_PFB_BOOT_0_RAM_AMOUNT_16MB);
 
        if (v == NV04_PFB_BOOT_0_RAM_AMOUNT_16MB &&
            !fbmem_readback(fb, 0x800000, ++patt))
-               nv_mask(priv, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
+               nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
                          NV04_PFB_BOOT_0_RAM_AMOUNT_8MB);
 
        if (!fbmem_readback(fb, 0x400000, ++patt))
-               nv_mask(priv, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
+               nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
                          NV04_PFB_BOOT_0_RAM_AMOUNT_4MB);
 
 out:
        /* Sequencer on */
-       nv_wrvgas(priv, 0, 1, nv_rdvgas(priv, 0, 1) & ~0x20);
+       nvkm_wrvgas(device, 0, 1, nvkm_rdvgas(device, 0, 1) & ~0x20);
        fbmem_fini(fb);
 }
 
-struct nvkm_oclass *
-nv05_devinit_oclass = &(struct nvkm_devinit_impl) {
-       .base.handle = NV_SUBDEV(DEVINIT, 0x05),
-       .base.ofuncs = &(struct nvkm_ofuncs) {
-               .ctor = nv04_devinit_ctor,
-               .dtor = nv04_devinit_dtor,
-               .init = nv04_devinit_init,
-               .fini = nv04_devinit_fini,
-       },
+static const struct nvkm_devinit_func
+nv05_devinit = {
+       .dtor = nv04_devinit_dtor,
+       .preinit = nv04_devinit_preinit,
+       .post = nv04_devinit_post,
        .meminit = nv05_devinit_meminit,
        .pll_set = nv04_devinit_pll_set,
-       .post = nvbios_init,
-}.base;
+};
+
+int
+nv05_devinit_new(struct nvkm_device *device, int index,
+                struct nvkm_devinit **pinit)
+{
+       return nv04_devinit_new_(&nv05_devinit, device, index, pinit);
+}