These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / drivers / gpu / drm / nouveau / nvkm / subdev / devinit / gt215.c

diff --git a/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c b/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c
index 6a3e8d4..9a8522f 100644 (file)
--- a/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c
+++ b/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c
@@ -29,32 +29,32 @@
 #include <subdev/clk/pll.h>
 
 int
-gt215_devinit_pll_set(struct nvkm_devinit *devinit, u32 type, u32 freq)
+gt215_devinit_pll_set(struct nvkm_devinit *init, u32 type, u32 freq)
 {
-       struct nv50_devinit_priv *priv = (void *)devinit;
-       struct nvkm_bios *bios = nvkm_bios(priv);
+       struct nvkm_subdev *subdev = &init->subdev;
+       struct nvkm_device *device = subdev->device;
        struct nvbios_pll info;
        int N, fN, M, P;
        int ret;
 
-       ret = nvbios_pll_parse(bios, type, &info);
+       ret = nvbios_pll_parse(device->bios, type, &info);
        if (ret)
                return ret;
 
-       ret = gt215_pll_calc(nv_subdev(devinit), &info, freq, &N, &fN, &M, &P);
+       ret = gt215_pll_calc(subdev, &info, freq, &N, &fN, &M, &P);
        if (ret < 0)
                return ret;
 
        switch (info.type) {
        case PLL_VPLL0:
        case PLL_VPLL1:
-               nv_wr32(priv, info.reg + 0, 0x50000610);
-               nv_mask(priv, info.reg + 4, 0x003fffff,
-                                           (P << 16) | (M << 8) | N);
-               nv_wr32(priv, info.reg + 8, fN);
+               nvkm_wr32(device, info.reg + 0, 0x50000610);
+               nvkm_mask(device, info.reg + 4, 0x003fffff,
+                                               (P << 16) | (M << 8) | N);
+               nvkm_wr32(device, info.reg + 8, fN);
                break;
        default:
-               nv_warn(priv, "0x%08x/%dKhz unimplemented\n", type, freq);
+               nvkm_warn(subdev, "%08x/%dKhz unimplemented\n", type, freq);
                ret = -EINVAL;
                break;
        }
@@ -63,24 +63,24 @@ gt215_devinit_pll_set(struct nvkm_devinit *devinit, u32 type, u32 freq)
 }
 
 static u64
-gt215_devinit_disable(struct nvkm_devinit *devinit)
+gt215_devinit_disable(struct nvkm_devinit *init)
 {
-       struct nv50_devinit_priv *priv = (void *)devinit;
-       u32 r001540 = nv_rd32(priv, 0x001540);
-       u32 r00154c = nv_rd32(priv, 0x00154c);
+       struct nvkm_device *device = init->subdev.device;
+       u32 r001540 = nvkm_rd32(device, 0x001540);
+       u32 r00154c = nvkm_rd32(device, 0x00154c);
        u64 disable = 0ULL;
 
        if (!(r001540 & 0x40000000)) {
-               disable |= (1ULL << NVDEV_ENGINE_MSPDEC);
-               disable |= (1ULL << NVDEV_ENGINE_MSPPP);
+               disable |= (1ULL << NVKM_ENGINE_MSPDEC);
+               disable |= (1ULL << NVKM_ENGINE_MSPPP);
        }
 
        if (!(r00154c & 0x00000004))
-               disable |= (1ULL << NVDEV_ENGINE_DISP);
+               disable |= (1ULL << NVKM_ENGINE_DISP);
        if (!(r00154c & 0x00000020))
-               disable |= (1ULL << NVDEV_ENGINE_MSVLD);
+               disable |= (1ULL << NVKM_ENGINE_MSVLD);
        if (!(r00154c & 0x00000200))
-               disable |= (1ULL << NVDEV_ENGINE_CE0);
+               disable |= (1ULL << NVKM_ENGINE_CE0);
 
        return disable;
 }
@@ -99,9 +99,10 @@ gt215_devinit_mmio_part[] = {
 };
 
 static u32
-gt215_devinit_mmio(struct nvkm_devinit *devinit, u32 addr)
+gt215_devinit_mmio(struct nvkm_devinit *base, u32 addr)
 {
-       struct nv50_devinit_priv *priv = (void *)devinit;
+       struct nv50_devinit *init = nv50_devinit(base);
+       struct nvkm_device *device = init->base.subdev.device;
        u32 *mmio = gt215_devinit_mmio_part;
 
        /* the init tables on some boards have INIT_RAM_RESTRICT_ZM_REG_GROUP
@@ -113,7 +114,7 @@ gt215_devinit_mmio(struct nvkm_devinit *devinit, u32 addr)
         *
         * the binary driver avoids touching these registers at all, however,
         * the video bios doesn't care and does what the scripts say.  it's
-        * presumed that the io-port access to priv registers isn't effected
+        * presumed that the io-port access to init registers isn't effected
         * by the screw-up bug mentioned above.
         *
         * really, a new opcode should've been invented to handle these
@@ -122,9 +123,9 @@ gt215_devinit_mmio(struct nvkm_devinit *devinit, u32 addr)
        while (mmio[0]) {
                if (addr >= mmio[0] && addr <= mmio[1]) {
                        u32 part = (addr / mmio[2]) & 7;
-                       if (!priv->r001540)
-                               priv->r001540 = nv_rd32(priv, 0x001540);
-                       if (part >= hweight8((priv->r001540 >> 16) & 0xff))
+                       if (!init->r001540)
+                               init->r001540 = nvkm_rd32(device, 0x001540);
+                       if (part >= hweight8((init->r001540 >> 16) & 0xff))
                                return ~0;
                        return addr;
                }
@@ -134,17 +135,19 @@ gt215_devinit_mmio(struct nvkm_devinit *devinit, u32 addr)
        return addr;
 }
 
-struct nvkm_oclass *
-gt215_devinit_oclass = &(struct nvkm_devinit_impl) {
-       .base.handle = NV_SUBDEV(DEVINIT, 0xa3),
-       .base.ofuncs = &(struct nvkm_ofuncs) {
-               .ctor = nv50_devinit_ctor,
-               .dtor = _nvkm_devinit_dtor,
-               .init = nv50_devinit_init,
-               .fini = _nvkm_devinit_fini,
-       },
+static const struct nvkm_devinit_func
+gt215_devinit = {
+       .preinit = nv50_devinit_preinit,
+       .init = nv50_devinit_init,
+       .post = nv04_devinit_post,
+       .mmio = gt215_devinit_mmio,
        .pll_set = gt215_devinit_pll_set,
        .disable = gt215_devinit_disable,
-       .mmio    = gt215_devinit_mmio,
-       .post = nvbios_init,
-}.base;
+};
+
+int
+gt215_devinit_new(struct nvkm_device *device, int index,
+               struct nvkm_devinit **pinit)
+{
+       return nv50_devinit_new_(&gt215_devinit, device, index, pinit);
+}