These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / drivers / gpu / drm / nouveau / nvkm / engine / pm / gk104.c

diff --git a/kernel/drivers/gpu/drm/nouveau/nvkm/engine/pm/gk104.c b/kernel/drivers/gpu/drm/nouveau/nvkm/engine/pm/gk104.c
index 75b9ff3..07f946d 100644 (file)
--- a/kernel/drivers/gpu/drm/nouveau/nvkm/engine/pm/gk104.c
+++ b/kernel/drivers/gpu/drm/nouveau/nvkm/engine/pm/gk104.c
@@ -23,6 +23,52 @@
  */
 #include "gf100.h"
 
+static const struct nvkm_specsrc
+gk104_pmfb_sources[] = {
+       { 0x140028, (const struct nvkm_specmux[]) {
+                       { 0x3fff, 0, "unk0" },
+                       { 0x7, 16, "unk16" },
+                       { 0x3, 24, "unk24" },
+                       { 0x2, 28, "unk28" },
+                       {}
+               }, "pmfb0_pm_unk28" },
+       { 0x14125c, (const struct nvkm_specmux[]) {
+                       { 0x3fff, 0, "unk0" },
+                       {}
+               }, "pmfb0_subp0_pm_unk25c" },
+       { 0x14165c, (const struct nvkm_specmux[]) {
+                       { 0x3fff, 0, "unk0" },
+                       {}
+               }, "pmfb0_subp1_pm_unk25c" },
+       { 0x141a5c, (const struct nvkm_specmux[]) {
+                       { 0x3fff, 0, "unk0" },
+                       {}
+               }, "pmfb0_subp2_pm_unk25c" },
+       { 0x141e5c, (const struct nvkm_specmux[]) {
+                       { 0x3fff, 0, "unk0" },
+                       {}
+               }, "pmfb0_subp3_pm_unk25c" },
+       {}
+};
+
+static const struct nvkm_specsrc
+gk104_tex_sources[] = {
+       { 0x5042c0, (const struct nvkm_specmux[]) {
+                       { 0xf, 0, "sel0", true },
+                       { 0x7, 8, "sel1", true },
+                       {}
+               }, "pgraph_gpc0_tpc0_tex_pm_mux_c_d" },
+       { 0x5042c8, (const struct nvkm_specmux[]) {
+                       { 0x1f, 0, "sel", true },
+                       {}
+               }, "pgraph_gpc0_tpc0_tex_pm_unkc8" },
+       { 0x5042b8, (const struct nvkm_specmux[]) {
+                       { 0xff, 0, "sel", true },
+                       {}
+               }, "pgraph_gpc0_tpc0_tex_pm_unkb8" },
+       {}
+};
+
 static const struct nvkm_specdom
 gk104_pm_hub[] = {
        { 0x60, (const struct nvkm_specsig[]) {
@@ -69,12 +115,51 @@ gk104_pm_gpc[] = {
                        { 0xc7, "gpc00_user_0" },
                        {}
                }, &gf100_perfctr_func },
+       { 0x20, (const struct nvkm_specsig[]) {
+                       {}
+               }, &gf100_perfctr_func },
+       { 0x20, (const struct nvkm_specsig[]) {
+                       { 0x00, "gpc02_tex_00", gk104_tex_sources },
+                       { 0x01, "gpc02_tex_01", gk104_tex_sources },
+                       { 0x02, "gpc02_tex_02", gk104_tex_sources },
+                       { 0x03, "gpc02_tex_03", gk104_tex_sources },
+                       { 0x04, "gpc02_tex_04", gk104_tex_sources },
+                       { 0x05, "gpc02_tex_05", gk104_tex_sources },
+                       { 0x06, "gpc02_tex_06", gk104_tex_sources },
+                       { 0x07, "gpc02_tex_07", gk104_tex_sources },
+                       { 0x08, "gpc02_tex_08", gk104_tex_sources },
+                       { 0x0a, "gpc02_tex_0a", gk104_tex_sources },
+                       { 0x0b, "gpc02_tex_0b", gk104_tex_sources },
+                       { 0x0d, "gpc02_tex_0c", gk104_tex_sources },
+                       { 0x0c, "gpc02_tex_0d", gk104_tex_sources },
+                       { 0x0e, "gpc02_tex_0e", gk104_tex_sources },
+                       { 0x0f, "gpc02_tex_0f", gk104_tex_sources },
+                       { 0x10, "gpc02_tex_10", gk104_tex_sources },
+                       { 0x11, "gpc02_tex_11", gk104_tex_sources },
+                       { 0x12, "gpc02_tex_12", gk104_tex_sources },
+                       {}
+               }, &gf100_perfctr_func },
        {}
 };
 
 static const struct nvkm_specdom
 gk104_pm_part[] = {
        { 0x60, (const struct nvkm_specsig[]) {
+                       { 0x00, "part00_pbfb_00", gf100_pbfb_sources },
+                       { 0x01, "part00_pbfb_01", gf100_pbfb_sources },
+                       { 0x0c, "part00_pmfb_00", gk104_pmfb_sources },
+                       { 0x0d, "part00_pmfb_01", gk104_pmfb_sources },
+                       { 0x0e, "part00_pmfb_02", gk104_pmfb_sources },
+                       { 0x0f, "part00_pmfb_03", gk104_pmfb_sources },
+                       { 0x10, "part00_pmfb_04", gk104_pmfb_sources },
+                       { 0x12, "part00_pmfb_05", gk104_pmfb_sources },
+                       { 0x15, "part00_pmfb_06", gk104_pmfb_sources },
+                       { 0x16, "part00_pmfb_07", gk104_pmfb_sources },
+                       { 0x18, "part00_pmfb_08", gk104_pmfb_sources },
+                       { 0x21, "part00_pmfb_09", gk104_pmfb_sources },
+                       { 0x25, "part00_pmfb_0a", gk104_pmfb_sources },
+                       { 0x26, "part00_pmfb_0b", gk104_pmfb_sources },
+                       { 0x27, "part00_pmfb_0c", gk104_pmfb_sources },
                        { 0x47, "part00_user_0" },
                        {}
                }, &gf100_perfctr_func },
@@ -85,64 +170,15 @@ gk104_pm_part[] = {
        {}
 };
 
-static int
-gk104_pm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
-             struct nvkm_oclass *oclass, void *data, u32 size,
-             struct nvkm_object **pobject)
-{
-       struct gf100_pm_priv *priv;
-       u32 mask;
-       int ret;
-
-       ret = nvkm_pm_create(parent, engine, oclass, &priv);
-       *pobject = nv_object(priv);
-       if (ret)
-               return ret;
-
-       /* PDAEMON */
-       ret = nvkm_perfdom_new(&priv->base, "pwr", 0, 0, 0, 0, gk104_pm_pwr);
-       if (ret)
-               return ret;
-
-       /* HUB */
-       ret = nvkm_perfdom_new(&priv->base, "hub", 0, 0x1b0000, 0, 0x200,
-                              gk104_pm_hub);
-       if (ret)
-               return ret;
-
-       /* GPC */
-       mask  = (1 << nv_rd32(priv, 0x022430)) - 1;
-       mask &= ~nv_rd32(priv, 0x022504);
-       mask &= ~nv_rd32(priv, 0x022584);
-
-       ret = nvkm_perfdom_new(&priv->base, "gpc", mask, 0x180000,
-                              0x1000, 0x200, gk104_pm_gpc);
-       if (ret)
-               return ret;
-
-       /* PART */
-       mask  = (1 << nv_rd32(priv, 0x022438)) - 1;
-       mask &= ~nv_rd32(priv, 0x022548);
-       mask &= ~nv_rd32(priv, 0x0225c8);
-
-       ret = nvkm_perfdom_new(&priv->base, "part", mask, 0x1a0000,
-                              0x1000, 0x200, gk104_pm_part);
-       if (ret)
-               return ret;
+static const struct gf100_pm_func
+gk104_pm = {
+       .doms_gpc = gk104_pm_gpc,
+       .doms_hub = gk104_pm_hub,
+       .doms_part = gk104_pm_part,
+};
 
-       nv_engine(priv)->cclass = &nvkm_pm_cclass;
-       nv_engine(priv)->sclass =  nvkm_pm_sclass;
-       priv->base.last = 7;
-       return 0;
+int
+gk104_pm_new(struct nvkm_device *device, int index, struct nvkm_pm **ppm)
+{
+       return gf100_pm_new_(&gk104_pm, device, index, ppm);
 }
-
-struct nvkm_oclass
-gk104_pm_oclass = {
-       .handle = NV_ENGINE(PM, 0xe0),
-       .ofuncs = &(struct nvkm_ofuncs) {
-               .ctor = gk104_pm_ctor,
-               .dtor = _nvkm_pm_dtor,
-               .init = _nvkm_pm_init,
-               .fini = gf100_pm_fini,
-       },
-};