Add the rt linux 4.1.3-rt3 as base

[kvmfornfv.git] / kernel / drivers / gpu / drm / nouveau / nvkm / engine / gr / gf104.c

diff --git a/kernel/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf104.c b/kernel/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf104.c
new file mode 100644 (file)
index 0000000..20d3b85
--- /dev/null
+++ b/kernel/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf104.c
@@ -0,0 +1,127 @@
+/*
+ * Copyright 2013 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs <bskeggs@redhat.com>
+ */
+#include "gf100.h"
+#include "ctxgf100.h"
+
+/*******************************************************************************
+ * PGRAPH register lists
+ ******************************************************************************/
+
+const struct gf100_gr_init
+gf104_gr_init_ds_0[] = {
+       { 0x405844,   1, 0x04, 0x00ffffff },
+       { 0x405850,   1, 0x04, 0x00000000 },
+       { 0x405900,   1, 0x04, 0x00002834 },
+       { 0x405908,   1, 0x04, 0x00000000 },
+       {}
+};
+
+const struct gf100_gr_init
+gf104_gr_init_tex_0[] = {
+       { 0x419ab0,   1, 0x04, 0x00000000 },
+       { 0x419ac8,   1, 0x04, 0x00000000 },
+       { 0x419ab8,   1, 0x04, 0x000000e7 },
+       { 0x419abc,   2, 0x04, 0x00000000 },
+       {}
+};
+
+static const struct gf100_gr_init
+gf104_gr_init_pe_0[] = {
+       { 0x41980c,   3, 0x04, 0x00000000 },
+       { 0x419844,   1, 0x04, 0x00000000 },
+       { 0x41984c,   1, 0x04, 0x00005bc5 },
+       { 0x419850,   4, 0x04, 0x00000000 },
+       { 0x419880,   1, 0x04, 0x00000002 },
+       {}
+};
+
+const struct gf100_gr_init
+gf104_gr_init_sm_0[] = {
+       { 0x419e00,   1, 0x04, 0x00000000 },
+       { 0x419ea0,   1, 0x04, 0x00000000 },
+       { 0x419ea4,   1, 0x04, 0x00000100 },
+       { 0x419ea8,   1, 0x04, 0x00001100 },
+       { 0x419eac,   1, 0x04, 0x11100702 },
+       { 0x419eb0,   1, 0x04, 0x00000003 },
+       { 0x419eb4,   4, 0x04, 0x00000000 },
+       { 0x419ec8,   1, 0x04, 0x0e063818 },
+       { 0x419ecc,   1, 0x04, 0x0e060e06 },
+       { 0x419ed0,   1, 0x04, 0x00003818 },
+       { 0x419ed4,   1, 0x04, 0x011104f1 },
+       { 0x419edc,   1, 0x04, 0x00000000 },
+       { 0x419f00,   1, 0x04, 0x00000000 },
+       { 0x419f2c,   1, 0x04, 0x00000000 },
+       {}
+};
+
+static const struct gf100_gr_pack
+gf104_gr_pack_mmio[] = {
+       { gf100_gr_init_main_0 },
+       { gf100_gr_init_fe_0 },
+       { gf100_gr_init_pri_0 },
+       { gf100_gr_init_rstr2d_0 },
+       { gf100_gr_init_pd_0 },
+       { gf104_gr_init_ds_0 },
+       { gf100_gr_init_scc_0 },
+       { gf100_gr_init_prop_0 },
+       { gf100_gr_init_gpc_unk_0 },
+       { gf100_gr_init_setup_0 },
+       { gf100_gr_init_crstr_0 },
+       { gf100_gr_init_setup_1 },
+       { gf100_gr_init_zcull_0 },
+       { gf100_gr_init_gpm_0 },
+       { gf100_gr_init_gpc_unk_1 },
+       { gf100_gr_init_gcc_0 },
+       { gf100_gr_init_tpccs_0 },
+       { gf104_gr_init_tex_0 },
+       { gf104_gr_init_pe_0 },
+       { gf100_gr_init_l1c_0 },
+       { gf100_gr_init_wwdx_0 },
+       { gf100_gr_init_tpccs_1 },
+       { gf100_gr_init_mpc_0 },
+       { gf104_gr_init_sm_0 },
+       { gf100_gr_init_be_0 },
+       { gf100_gr_init_fe_1 },
+       {}
+};
+
+/*******************************************************************************
+ * PGRAPH engine/subdev functions
+ ******************************************************************************/
+
+struct nvkm_oclass *
+gf104_gr_oclass = &(struct gf100_gr_oclass) {
+       .base.handle = NV_ENGINE(GR, 0xc3),
+       .base.ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = gf100_gr_ctor,
+               .dtor = gf100_gr_dtor,
+               .init = gf100_gr_init,
+               .fini = _nvkm_gr_fini,
+       },
+       .cclass = &gf104_grctx_oclass,
+       .sclass = gf100_gr_sclass,
+       .mmio = gf104_gr_pack_mmio,
+       .fecs.ucode = &gf100_gr_fecs_ucode,
+       .gpccs.ucode = &gf100_gr_gpccs_ucode,
+}.base;