These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / drivers / gpu / drm / nouveau / nvkm / engine / disp / sorgm204.c

diff --git a/kernel/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm204.c b/kernel/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm204.c
index 1e40dfe..029e5f1 100644 (file)
--- a/kernel/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm204.c
+++ b/kernel/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm204.c
@@ -41,17 +41,17 @@ gm204_sor_loff(struct nvkm_output_dp *outp)
 void
 gm204_sor_magic(struct nvkm_output *outp)
 {
-       struct nv50_disp_priv *priv = (void *)nvkm_disp(outp);
+       struct nvkm_device *device = outp->disp->engine.subdev.device;
        const u32 soff = outp->or * 0x100;
        const u32 data = outp->or + 1;
        if (outp->info.sorconf.link & 1)
-               nv_mask(priv, 0x612308 + soff, 0x0000001f, 0x00000000 | data);
+               nvkm_mask(device, 0x612308 + soff, 0x0000001f, 0x00000000 | data);
        if (outp->info.sorconf.link & 2)
-               nv_mask(priv, 0x612388 + soff, 0x0000001f, 0x00000010 | data);
+               nvkm_mask(device, 0x612388 + soff, 0x0000001f, 0x00000010 | data);
 }
 
 static inline u32
-gm204_sor_dp_lane_map(struct nv50_disp_priv *priv, u8 lane)
+gm204_sor_dp_lane_map(struct nvkm_device *device, u8 lane)
 {
        return lane * 0x08;
 }
@@ -59,30 +59,33 @@ gm204_sor_dp_lane_map(struct nv50_disp_priv *priv, u8 lane)
 static int
 gm204_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern)
 {
-       struct nv50_disp_priv *priv = (void *)nvkm_disp(outp);
+       struct nvkm_device *device = outp->base.disp->engine.subdev.device;
        const u32 soff = gm204_sor_soff(outp);
        const u32 data = 0x01010101 * pattern;
        if (outp->base.info.sorconf.link & 1)
-               nv_mask(priv, 0x61c110 + soff, 0x0f0f0f0f, data);
+               nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, data);
        else
-               nv_mask(priv, 0x61c12c + soff, 0x0f0f0f0f, data);
+               nvkm_mask(device, 0x61c12c + soff, 0x0f0f0f0f, data);
        return 0;
 }
 
 static int
 gm204_sor_dp_lnk_pwr(struct nvkm_output_dp *outp, int nr)
 {
-       struct nv50_disp_priv *priv = (void *)nvkm_disp(outp);
+       struct nvkm_device *device = outp->base.disp->engine.subdev.device;
        const u32 soff = gm204_sor_soff(outp);
        const u32 loff = gm204_sor_loff(outp);
        u32 mask = 0, i;
 
        for (i = 0; i < nr; i++)
-               mask |= 1 << (gm204_sor_dp_lane_map(priv, i) >> 3);
+               mask |= 1 << (gm204_sor_dp_lane_map(device, i) >> 3);
 
-       nv_mask(priv, 0x61c130 + loff, 0x0000000f, mask);
-       nv_mask(priv, 0x61c034 + soff, 0x80000000, 0x80000000);
-       nv_wait(priv, 0x61c034 + soff, 0x80000000, 0x00000000);
+       nvkm_mask(device, 0x61c130 + loff, 0x0000000f, mask);
+       nvkm_mask(device, 0x61c034 + soff, 0x80000000, 0x80000000);
+       nvkm_msec(device, 2000,
+               if (!(nvkm_rd32(device, 0x61c034 + soff) & 0x80000000))
+                       break;
+       );
        return 0;
 }
 
@@ -90,9 +93,9 @@ static int
 gm204_sor_dp_drv_ctl(struct nvkm_output_dp *outp,
                     int ln, int vs, int pe, int pc)
 {
-       struct nv50_disp_priv *priv = (void *)nvkm_disp(outp);
-       struct nvkm_bios *bios = nvkm_bios(priv);
-       const u32 shift = gm204_sor_dp_lane_map(priv, ln);
+       struct nvkm_device *device = outp->base.disp->engine.subdev.device;
+       struct nvkm_bios *bios = device->bios;
+       const u32 shift = gm204_sor_dp_lane_map(device, ln);
        const u32 loff = gm204_sor_loff(outp);
        u32 addr, data[4];
        u8  ver, hdr, cnt, len;
@@ -109,31 +112,32 @@ gm204_sor_dp_drv_ctl(struct nvkm_output_dp *outp,
                                  &ver, &hdr, &cnt, &len, &ocfg);
        if (!addr)
                return -EINVAL;
+       ocfg.tx_pu &= 0x0f;
 
-       data[0] = nv_rd32(priv, 0x61c118 + loff) & ~(0x000000ff << shift);
-       data[1] = nv_rd32(priv, 0x61c120 + loff) & ~(0x000000ff << shift);
-       data[2] = nv_rd32(priv, 0x61c130 + loff);
-       if ((data[2] & 0x0000ff00) < (ocfg.tx_pu << 8) || ln == 0)
-               data[2] = (data[2] & ~0x0000ff00) | (ocfg.tx_pu << 8);
-       nv_wr32(priv, 0x61c118 + loff, data[0] | (ocfg.dc << shift));
-       nv_wr32(priv, 0x61c120 + loff, data[1] | (ocfg.pe << shift));
-       nv_wr32(priv, 0x61c130 + loff, data[2] | (ocfg.tx_pu << 8));
-       data[3] = nv_rd32(priv, 0x61c13c + loff) & ~(0x000000ff << shift);
-       nv_wr32(priv, 0x61c13c + loff, data[3] | (ocfg.pc << shift));
+       data[0] = nvkm_rd32(device, 0x61c118 + loff) & ~(0x000000ff << shift);
+       data[1] = nvkm_rd32(device, 0x61c120 + loff) & ~(0x000000ff << shift);
+       data[2] = nvkm_rd32(device, 0x61c130 + loff);
+       if ((data[2] & 0x00000f00) < (ocfg.tx_pu << 8) || ln == 0)
+               data[2] = (data[2] & ~0x00000f00) | (ocfg.tx_pu << 8);
+       nvkm_wr32(device, 0x61c118 + loff, data[0] | (ocfg.dc << shift));
+       nvkm_wr32(device, 0x61c120 + loff, data[1] | (ocfg.pe << shift));
+       nvkm_wr32(device, 0x61c130 + loff, data[2]);
+       data[3] = nvkm_rd32(device, 0x61c13c + loff) & ~(0x000000ff << shift);
+       nvkm_wr32(device, 0x61c13c + loff, data[3] | (ocfg.pc << shift));
        return 0;
 }
 
-struct nvkm_output_dp_impl
-gm204_sor_dp_impl = {
-       .base.base.handle = DCB_OUTPUT_DP,
-       .base.base.ofuncs = &(struct nvkm_ofuncs) {
-               .ctor = _nvkm_output_dp_ctor,
-               .dtor = _nvkm_output_dp_dtor,
-               .init = _nvkm_output_dp_init,
-               .fini = _nvkm_output_dp_fini,
-       },
+static const struct nvkm_output_dp_func
+gm204_sor_dp_func = {
        .pattern = gm204_sor_dp_pattern,
        .lnk_pwr = gm204_sor_dp_lnk_pwr,
-       .lnk_ctl = gf110_sor_dp_lnk_ctl,
+       .lnk_ctl = gf119_sor_dp_lnk_ctl,
        .drv_ctl = gm204_sor_dp_drv_ctl,
 };
+
+int
+gm204_sor_dp_new(struct nvkm_disp *disp, int index, struct dcb_output *dcbE,
+                struct nvkm_output **poutp)
+{
+       return nvkm_output_dp_new_(&gm204_sor_dp_func, disp, index, dcbE, poutp);
+}