These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / drivers / gpu / drm / exynos / regs-hdmi.h

diff --git a/kernel/drivers/gpu/drm/exynos/regs-hdmi.h b/kernel/drivers/gpu/drm/exynos/regs-hdmi.h
index 3f35ac6..8c891e5 100644 (file)
--- a/kernel/drivers/gpu/drm/exynos/regs-hdmi.h
+++ b/kernel/drivers/gpu/drm/exynos/regs-hdmi.h
@@ -72,7 +72,6 @@
 #define HDMI_V13_V_SYNC_GEN_3_0                HDMI_CORE_BASE(0x0150)
 #define HDMI_V13_V_SYNC_GEN_3_1                HDMI_CORE_BASE(0x0154)
 #define HDMI_V13_V_SYNC_GEN_3_2                HDMI_CORE_BASE(0x0158)
-#define HDMI_V13_ACR_CON               HDMI_CORE_BASE(0x0180)
 #define HDMI_V13_AVI_CON               HDMI_CORE_BASE(0x0300)
 #define HDMI_V13_AVI_BYTE(n)           HDMI_CORE_BASE(0x0320 + 4 * (n))
 #define HDMI_V13_DC_CONTROL            HDMI_CORE_BASE(0x05C0)
@@ -171,7 +170,7 @@
 #define HDMI_HPD_ST                    HDMI_CTRL_BASE(0x0044)
 #define HDMI_HPD_TH_X                  HDMI_CTRL_BASE(0x0050)
 #define HDMI_AUDIO_CLKSEL              HDMI_CTRL_BASE(0x0070)
-#define HDMI_PHY_RSTOUT                        HDMI_CTRL_BASE(0x0074)
+#define HDMI_V14_PHY_RSTOUT            HDMI_CTRL_BASE(0x0074)
 #define HDMI_PHY_VPLL                  HDMI_CTRL_BASE(0x0078)
 #define HDMI_PHY_CMU                   HDMI_CTRL_BASE(0x007C)
 #define HDMI_CORE_RSTOUT               HDMI_CTRL_BASE(0x0080)
@@ -277,16 +276,26 @@
 #define HDMI_ASP_CHCFG2                        HDMI_CORE_BASE(0x0318)
 #define HDMI_ASP_CHCFG3                        HDMI_CORE_BASE(0x031C)
 
-#define HDMI_ACR_CON                   HDMI_CORE_BASE(0x0400)
-#define HDMI_ACR_MCTS0                 HDMI_CORE_BASE(0x0410)
-#define HDMI_ACR_MCTS1                 HDMI_CORE_BASE(0x0414)
-#define HDMI_ACR_MCTS2                 HDMI_CORE_BASE(0x0418)
-#define HDMI_ACR_CTS0                  HDMI_CORE_BASE(0x0420)
-#define HDMI_ACR_CTS1                  HDMI_CORE_BASE(0x0424)
-#define HDMI_ACR_CTS2                  HDMI_CORE_BASE(0x0428)
-#define HDMI_ACR_N0                    HDMI_CORE_BASE(0x0430)
-#define HDMI_ACR_N1                    HDMI_CORE_BASE(0x0434)
-#define HDMI_ACR_N2                    HDMI_CORE_BASE(0x0438)
+#define HDMI_V13_ACR_CON               HDMI_CORE_BASE(0x0180)
+#define HDMI_V13_ACR_MCTS0             HDMI_CORE_BASE(0x0184)
+#define HDMI_V13_ACR_MCTS1             HDMI_CORE_BASE(0x0188)
+#define HDMI_V13_ACR_MCTS2             HDMI_CORE_BASE(0x018C)
+#define HDMI_V13_ACR_CTS0              HDMI_CORE_BASE(0x0190)
+#define HDMI_V13_ACR_CTS1              HDMI_CORE_BASE(0x0194)
+#define HDMI_V13_ACR_CTS2              HDMI_CORE_BASE(0x0198)
+#define HDMI_V13_ACR_N0                        HDMI_CORE_BASE(0x01A0)
+#define HDMI_V13_ACR_N1                        HDMI_CORE_BASE(0x01A4)
+#define HDMI_V13_ACR_N2                        HDMI_CORE_BASE(0x01A8)
+#define HDMI_V14_ACR_CON               HDMI_CORE_BASE(0x0400)
+#define HDMI_V14_ACR_MCTS0             HDMI_CORE_BASE(0x0410)
+#define HDMI_V14_ACR_MCTS1             HDMI_CORE_BASE(0x0414)
+#define HDMI_V14_ACR_MCTS2             HDMI_CORE_BASE(0x0418)
+#define HDMI_V14_ACR_CTS0              HDMI_CORE_BASE(0x0420)
+#define HDMI_V14_ACR_CTS1              HDMI_CORE_BASE(0x0424)
+#define HDMI_V14_ACR_CTS2              HDMI_CORE_BASE(0x0428)
+#define HDMI_V14_ACR_N0                        HDMI_CORE_BASE(0x0430)
+#define HDMI_V14_ACR_N1                        HDMI_CORE_BASE(0x0434)
+#define HDMI_V14_ACR_N2                        HDMI_CORE_BASE(0x0438)
 
 /* Packet related registers */
 #define HDMI_ACP_CON                   HDMI_CORE_BASE(0x0500)