These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / drivers / clk / sirf / clk-common.c

diff --git a/kernel/drivers/clk/sirf/clk-common.c b/kernel/drivers/clk/sirf/clk-common.c
index 37af51c..77e1e24 100644 (file)
--- a/kernel/drivers/clk/sirf/clk-common.c
+++ b/kernel/drivers/clk/sirf/clk-common.c
@@ -7,11 +7,13 @@
  * Licensed under GPLv2 or later.
  */
 
+#include <linux/clk.h>
+
 #define KHZ     1000
 #define MHZ     (KHZ * KHZ)
 
-static void *sirfsoc_clk_vbase;
-static void *sirfsoc_rsc_vbase;
+static void __iomem *sirfsoc_clk_vbase;
+static void __iomem *sirfsoc_rsc_vbase;
 static struct clk_onecell_data clk_data;
 
 /*
@@ -165,10 +167,10 @@ static long cpu_clk_round_rate(struct clk_hw *hw, unsigned long rate,
         * SiRF SoC has not cpu clock control,
         * So bypass to it's parent pll.
         */
-       struct clk *parent_clk = clk_get_parent(hw->clk);
-       struct clk *pll_parent_clk = clk_get_parent(parent_clk);
-       unsigned long pll_parent_rate = clk_get_rate(pll_parent_clk);
-       return pll_clk_round_rate(__clk_get_hw(parent_clk), rate, &pll_parent_rate);
+       struct clk_hw *parent_clk = clk_hw_get_parent(hw);
+       struct clk_hw *pll_parent_clk = clk_hw_get_parent(parent_clk);
+       unsigned long pll_parent_rate = clk_hw_get_rate(pll_parent_clk);
+       return pll_clk_round_rate(parent_clk, rate, &pll_parent_rate);
 }
 
 static unsigned long cpu_clk_recalc_rate(struct clk_hw *hw,
@@ -178,8 +180,8 @@ static unsigned long cpu_clk_recalc_rate(struct clk_hw *hw,
         * SiRF SoC has not cpu clock control,
         * So return the parent pll rate.
         */
-       struct clk *parent_clk = clk_get_parent(hw->clk);
-       return __clk_get_rate(parent_clk);
+       struct clk_hw *parent_clk = clk_hw_get_parent(hw);
+       return clk_hw_get_rate(parent_clk);
 }
 
 static struct clk_ops std_pll_ops = {
@@ -188,7 +190,7 @@ static struct clk_ops std_pll_ops = {
        .set_rate = pll_clk_set_rate,
 };
 
-static const char *pll_clk_parents[] = {
+static const char * const pll_clk_parents[] = {
        "osc",
 };
 
@@ -284,7 +286,7 @@ static struct clk_hw usb_pll_clk_hw = {
  * clock domains - cpu, mem, sys/io, dsp, gfx
  */
 
-static const char *dmn_clk_parents[] = {
+static const char * const dmn_clk_parents[] = {
        "rtc",
        "osc",
        "pll1",
@@ -673,7 +675,7 @@ static void std_clk_disable(struct clk_hw *hw)
        clkc_writel(val, reg);
 }
 
-static const char *std_clk_io_parents[] = {
+static const char * const std_clk_io_parents[] = {
        "io",
 };
 
@@ -949,7 +951,7 @@ static struct clk_std clk_pulse = {
        },
 };
 
-static const char *std_clk_dsp_parents[] = {
+static const char * const std_clk_dsp_parents[] = {
        "dsp",
 };
 
@@ -981,7 +983,7 @@ static struct clk_std clk_mf = {
        },
 };
 
-static const char *std_clk_sys_parents[] = {
+static const char * const std_clk_sys_parents[] = {
        "sys",
 };
 
@@ -999,7 +1001,7 @@ static struct clk_std clk_security = {
        },
 };
 
-static const char *std_clk_usb_parents[] = {
+static const char * const std_clk_usb_parents[] = {
        "usb_pll",
 };