These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / drivers / clk / berlin / bg2q.c

diff --git a/kernel/drivers/clk/berlin/bg2q.c b/kernel/drivers/clk/berlin/bg2q.c
index 440ef81..f144547 100644 (file)
--- a/kernel/drivers/clk/berlin/bg2q.c
+++ b/kernel/drivers/clk/berlin/bg2q.c
@@ -45,7 +45,7 @@
 #define REG_SDIO0XIN_CLKCTL    0x0158
 #define REG_SDIO1XIN_CLKCTL    0x015c
 
-#define        MAX_CLKS 27
+#define        MAX_CLKS 28
 static struct clk *clks[MAX_CLKS];
 static struct clk_onecell_data clk_data;
 static DEFINE_SPINLOCK(lock);
@@ -283,25 +283,26 @@ static const struct berlin2_gate_data bg2q_gates[] __initconst = {
        { "usb2",       "perif",        13 },
        { "usb3",       "perif",        14 },
        { "pbridge",    "perif",        15, CLK_IGNORE_UNUSED },
-       { "sdio",       "perif",        16, CLK_IGNORE_UNUSED },
+       { "sdio",       "perif",        16 },
        { "nfc",        "perif",        18 },
        { "pcie",       "perif",        22 },
 };
 
 static void __init berlin2q_clock_setup(struct device_node *np)
 {
+       struct device_node *parent_np = of_get_parent(np);
        const char *parent_names[9];
        struct clk *clk;
        int n;
 
-       gbase = of_iomap(np, 0);
+       gbase = of_iomap(parent_np, 0);
        if (!gbase) {
                pr_err("%s: Unable to map global base\n", np->full_name);
                return;
        }
 
        /* BG2Q CPU PLL is not part of global registers */
-       cpupll_base = of_iomap(np, 1);
+       cpupll_base = of_iomap(parent_np, 1);
        if (!cpupll_base) {
                pr_err("%s: Unable to map cpupll base\n", np->full_name);
                iounmap(gbase);
@@ -355,13 +356,13 @@ static void __init berlin2q_clock_setup(struct device_node *np)
                            gd->bit_idx, 0, &lock);
        }
 
-       /*
-        * twdclk is derived from cpu/3
-        * TODO: use cpupll until cpuclk is not available
-        */
+       /* cpuclk divider is fixed to 1 */
+       clks[CLKID_CPU] =
+               clk_register_fixed_factor(NULL, "cpu", clk_names[CPUPLL],
+                                         0, 1, 1);
+       /* twdclk is derived from cpu/3 */
        clks[CLKID_TWD] =
-               clk_register_fixed_factor(NULL, "twd", clk_names[CPUPLL],
-                                         0, 1, 3);
+               clk_register_fixed_factor(NULL, "twd", "cpu", 0, 1, 3);
 
        /* check for errors on leaf clocks */
        for (n = 0; n < MAX_CLKS; n++) {
@@ -384,5 +385,5 @@ bg2q_fail:
        iounmap(cpupll_base);
        iounmap(gbase);
 }
-CLK_OF_DECLARE(berlin2q_clock, "marvell,berlin2q-chip-ctrl",
+CLK_OF_DECLARE(berlin2q_clk, "marvell,berlin2q-clk",
               berlin2q_clock_setup);